The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate various aspects of the invention and, together with the description, serve to explain its principles. Wherever convenient, the same reference numbers will be used throughout the drawings to refer to the same or like elements.
Charge storage devices such as those used in mobile devices (e.g., batteries or supercapacitors) tend to provide energy that lasts a limited period of time. From time to time, they therefore need to he charged using a supply. During such charging, the temperature may rise rapidly as current flows to the charge storage device. It may therefore be of interest to limit the amount of power, and thus current, flowing to the charge storage device to control the temperature.
Accordingly, various embodiments of the invention include devices and methods for limiting power to a charge storage device in order to control current, temperature, or both during charging. A charge power control scheme may include temperature control combined with a soft start component to ease the temperature transient in a controlled manner.
In a digital soft start implementation, the operation of which is illustrated in
The soft start component allows the temperature to increase gradually, easing the temperature transient. Essentially, a digital soft start component allows the temperature to increase in a quantized controlled manner. Combining soft start with, the temperature control enables the step-wise controlling of the current level. An analog soft start component yields substantially similar performance as that of the digital soft start component except that the changes are typically smooth, rather than step-wise incremental. Analog soft start is shown in
One configuration of a charge power control scheme utilizes a temperature sensor for thermal cycling.
The temperature sensor may cooperate with control circuitry to limit the charge power. One approach to limiting power flowing to a charge storage device is to use a power loop control circuit.
The supply 504 may comprise any power source, such as a battery, chemical fuel cell, DC power supply, or any other energy storage system. The system load 512 may comprise any device capable of drawing current in operation. Examples of system loads 512 include a PCMCIA card and a camera flash LED.
The charge power control device 502 may be implemented as a supercapacitor or ultracapacitor charge IC, one example of which is illustrated in
The charge storage device 506 operates as an energy reservoir adapted to supply high levels of power such as burst power. Examples of charge storage devices 506 include boost converters and energy storage devices such as supercapacitors. Generally, a boost converter is a voltage step-up converter that is often regarded as a switching mode power supply. Energy storage devices, unlike boost converters, are based on charge storage and may be used as a power source. A supercapacitor is a type of high-energy storage device designed to be charged and recharged repeatedly and to provide instantaneous high discharge currents with rapid recharge between discharge operations. The charge storage device 506 may also include a combination of boost converter, supercapacitor, and any other type of energy storage device. In this embodiment, the charge storage device 506 includes a supercapacitor comprising two capacitors, C1 and C2, coupled in series and two resistors, R1 and R2, coupled in series with each other and in parallel with the capacitors C1, C2.
In operation, the charge power control scheme 500 limits the power dissipation across the pass element 510 to a level at or below a set power limit value. Assume that the power limit value is 2 Watt, i.e., that the IC package can tolerate a power of 2 Watt. However, the initial power dissipation may tend to be higher. The supply 504 may supply a voltage of 4.5 V. Power, P, is computed as voltage, V, multiplied by current, I, or P=V×I. The power may be, for example, 4.5 W (P=4.5 Volt×1.0 Ampere=4.5 Watt). If so, the power should be limited to below the power limit value of 2 W. Limiting the power may be achieved by limiting the current using the power loop control circuit 508. The power loop control circuit 508 may, for example, regulate the current so that the total power does not exceed 2 Watt. Such regulation may include cycling the current ON/OFF with temperature variations. Such regulation may further include regulating the current level.
Specifically, in operation, the voltage across the charge storage device 506, i.e., at terminal A, may ramp up as the charge storage device 506 is charging. Initially the voltage drop across the charge storage device 506 (i.e., capacitors C1, C2) may be zero Volt, i.e., the voltage at terminal A may be 0 V. Thus, before it is charged, the charge storage device 506 may behave like a short circuit to ground. Correspondingly, the charge current may be initially high, and the voltage across the pass element 510 may be high. The resulting power dissipated across the pass element 510 may likewise be high. When the voltage reaches, for example, 0.5 V, if the current is 0.5 A, then the power may be 2 W (computed as (4.5−0.5) V×0.5 A=2 W) across the pass element 510. The power across the pass element 510 may be monitored, and the charge power control device 502 may regulate the current to maintain the power at or below the power limit value of 2 Watt. That is, the charge power control device 502 may start controlling the current when the power dissipation across the pass element 510 reaches 2 Watt. As the voltage at terminal A increases, the voltage difference across the pass element 510 may decrease and may allow for a higher charge current. In one example, when the voltage at point A reaches 1.5 V, the voltage across the pass element 510 may equal 3 V (4.5−1.5 V). The charge power control device 510 may allow the current to increase up to the maximum while maintaining the power at or below the power limit value. Thus, the current may be allowed to increase to 0.66 A (2 W/3 V=0.66 A).
In another example, when the voltage at terminal A reaches 2.5 V, the charge power control device 502 may allow the current to increase to 1 A (2 W/(4.5−2.5) V=1 A). As shown in
The power loop control circuit 608 includes a soft start controller 614, a soft start component 616, current limit controller 618 with a current limit detector 620, and a supply 632. The soft start controller 614 is operatively coupled to the temperature sensor 612, to the soft start component 616 and to the supply 632. The soft start component 616 is operatively coupled to the current limit controller 618. The current limit controller 618 is operatively coupled, via the current limit converter 630, to the pass element 610.
The power loop control circuit 608 is adapted to regulate the current that is delivered to one or more elements of the charge power control device 602. The purpose of regulating the current is to protect the charge power control device 602 from harmful effects due to a short circuit event, overheating, or similar problem. The current limit controller 618 regulates the current relative to a predetermined upper current limit. It includes the current limit detector 620, which is operative to detect the level of the current limit and to communicate such current limit to the current limit controller 618. Various current limit detectors and current limit controllers would be familiar to a person of skill in the art. Exemplary implementations thereof are illustrated in
The soft start controller 614 and the current limit controller 618 are adapted to cooperate in limiting the current. Essentially, the current limit controller 618 is adapted to detect the current limit and to regulate the current to be reduced to and thereafter be maintained substantially at or below the current limit. The soft start controller 614 is adapted to aid in regulating the current as current charging starts by regulating the current in incremental current steps (digital or analog). Thus, in operation, the soft start controller 614 regulates the current by allowing it to be increased incrementally until the current substantially reaches the current limit. At such time, the current limit controller 618 regulates the current to be maintained substantially at or below the current limit.
In this instance, the soft start controller 614 includes a constant current source 628, a comparator 622 having two inputs and an output, and logic circuitry 624. The constant current source 628 is operatively coupled to, and adapted to receive current from, the supply 632. The constant current source 628 is also operatively, at its output, the temperature sensor 612 and to the comparator 622. The constant current source 628 is operative to supply current that flows through the temperature sensor 612 and produces voltage relative to the temperature at one input of the comparator 622. The constant current source 628 may be any current source or system capable of delivering and/or absorbing a substantially constant current. The other input of the comparator 622 is coupled to a temperature controlled voltage source, VREF. The voltage at terminal B tends to decrease with temperature. The comparator 622 is adapted to compare the voltages at its inputs and to output to the logic circuitry 624 a signal, UP/DN, in response to the comparison. At its output, the comparator 622 is coupled, to the logic circuitry 624, which is adapted to increase and decrease the current increment steps. In one embodiment, the logic circuitry 624 includes a counter 624. In such embodiment, the counter 624 is operative to count up and down between an upper and a lower limit based on the UP/DN signal. The logic circuitry 624 is further adapted to output a control signal 626 to the soft start component 616. The soft start component 616 is adapted to receive such control signal 626 and to regulate the current, and thus the power, incrementally as shown in
In one embodiment, the temperature sensor 712 comprises one or more temperature sensitive elements D1-D3 operatively coupled in series with each other (not shown). The temperature sensitive elements D1-D3 are typically adapted to allow current to flow in one direction (normal ON position) and to prevent current from flowing in the opposite direction. Examples of temperature sensitive elements D1-D3 include bipolar junction diodes, thermistors, transistors, and any other temperature sensitive devices that exhibit inverse proportionality characteristics. When a temperature sensitive element D1-D3 operates in the normal ON position, the forward voltage drop, V6, is inversely proportional to its absolute temperature. In operation, collectively, the combination of temperature sensitive elements D1-D3 regulates the output current (i.e., the charge current flowing to the charge storage device) to maintain a certain temperature level. Regulating may include increasing the output current one or more incremental steps followed by decreasing the output current one or more incremental steps as illustrated in
In this example, the soft start controller 714 comprises a comparator 722 and logic circuitry 724. The comparator 722 is operatively coupled, at terminal B, to the temperature sensor 712. The comparator 722 may include two inputs and an output. One of the inputs may be an on the chip (OTC) input operatively coupled to terminal B and adapted to receive the voltage at terminal B. The voltage at terminal B tends to decrease with temperature. Another one of the inputs may be a VREF input adapted to receive a bandgap reference voltage. A bandgap reference voltage may be a zero temperature coefficient voltage reference. Generally, a component exhibiting a zero temperature coefficient of resistivity changes from negative to positive values at an absolute zero temperature (i.e., at zero Kelvin). Thus, the zero temperature voltage reference does not vary with temperature in a typical charge power control scheme.
The comparator 722 is adapted to compare the voltages (i.e., VREF and the voltage at terminal B) applied at its inputs and to output a signal, UP/DN, for commanding the logic circuitry 724 to increase or decrease the charge current. In one embodiment, the logic circuitry 724 includes a counter 724 adapted to count up or down. Such counter 724 may be adapted to receive the UP/DN signal and to count up and down between an upper and a lower limit and to count only down if it reaches the upper limit. Likewise, the counter 724 may be adapted to count only up if it reaches the lower limit. The counter 724 may further be adapted to output a control signal 726. The control signal 726 may include control bits (e.g., BIT0-BIT 5). The number of bits in the control signal 726 may depend on a desired resolution of current steps, such as the resolution of the incremental steps shown in
The counter 724 is also adapted to receive a clock, signal CLK, which controls the timing of the counting up or down. The counter 724 can be reset in response to a RESET signal.
For example, based on the voltages applied to its inputs, the comparator 722 may determine that the current should he increased and output an UP signal. At the next CLK signal, the counter 724 may, in response to the UP signal, count up one or more steps, provided that the upper limit has not been reached. The counter 724 then outputs control bits 726 which may include a change to the state of one or more of the bits. For example, BIT4 may be asserted (or BIT2 negated). Upon receipt of the asserted BIT4, the soft start component (not shown) may switch one of its current switches, e.g., SW4, to an ON state, allowing current to flow through that current switch which in turn may increase the charge current. Negated BIT2 may cause SW2 to switch to an OFF state and to cut off current flow through it, reducing the current somewhat (i.e., producing current decrease with an UP count). Similarly, in response to a DN signal, the counter 724 may count down one or more steps (provided that it has not reached its lower limit) and may output control bits 726 that command the soft start component to switch one or more current switches OFF so as to decrease the charge current. Returning to the first example, if the counter 724 has already reached its upper limit, the counter 724 may output the same control bits 726 in response to an UP signal. The control bits 726 may not be changed until the counter 724 receives a DN signal from the comparator 722. In some embodiments, the upper and/or lower limit of the counter 724 may be determined by or otherwise related to the current limit, for example, the current limit detected by the current limit controller 618.
In this embodiment, the current switch T10 is a large scale transistor and the current switch T11 is a small scale transistor. T10 is scaled 1X and T11 is scaled 0.002X. Size matching may be important to match transistor criteria, for transistor scaling (i.e., decreasing device dimensions), and the like. Transistors of a particular scale (i.e., size) are typically laid out in the same region on the IC die (e.g., on IC die 400 of
When turned ON, the small scale transistor T11 is operative to output a small scale current, I, to the non-inverting input of the operational amplifier 804. When, turned ON, the large scale transistor T10 is operative to output a large scale current, IOUT, to the inverting input of the operational amplifier 804. The currents have a substantially fixed ratio between them determined by the size ratio of T10 and T11. In the illustrated embodiment, that size ratio is 500 (1/0.002=500). T10 is thus a current mirror to T11 and magnifies the small scale current by a factor of 500.
In the illustrated embodiment, RS is connected between the inverting and the non-inverting inputs of the operational amplifier 804. As described, the operational amplifier 804 receives I at its non-inverting input and IOUT at its inverting input. The differential input voltage to the operational amplifier 804 is therefore RS×(I˜ILIM). The operational amplifier 804 is operative to output a current responsive to the differential input voltage. Such output current is fed back to the respective gates of T10 and T11. As noted with reference to
Briefly, if the small scale current, I, is greater than the current limit ILIM, the operational amplifier 804 tries to reduce the current until I substantially equals ILIM. The reduction may be obtained by turning OFF the small scale transistor T11. If I is below ILIM, the operational amplifier 804 substantially maintains I at or below ILIM. Such maintaining may be obtained by turning both transistors T10 and T11 ON, resulting in a higher current.
If More specifically, if the small scale current, I, is greater than the current limit, ILIM, the balance of current (i.e., I−ILIM) flows via RS. The differential input voltage to the operational amplifier becomes (I−ILIM)×RS, which triggers the operational amplifier 804 to reduce the current until I substantially equals ILIM. The output current from the operational amplifier 804 thus causes the transistor T11 to be turned OFF, which reduces the current output from T11. This reduction may occur gradually or fast depending on, at least in part, the gain of the operational amplifier 804. In some embodiments, a faster turn-off may be advantageous.
If I is below ILIM, the output current from the operational amplifier 804 may cause T10 and T11 to be turned ON, thereby exhibiting low resistance and in turn increasing I. This may cause I to be substantially maintained at or below ILIM. The value of IOUT may be, for example, 500×1. The net effect is that the charge power control scheme 800 regulates the current to decrease to ILIM and to thereafter remain substantially at or below ILIM.
The resistor, RS, may be a current sensing resistor adapted to translate current into a voltage. In general, current sensing resistors are designed for low resistance so as to minimize power consumption. The calibrated resistance senses the current flowing through it in the form of a voltage drop, which may be detected and monitored by control circuitry (e.g., by the operational amplifier 804).
Various configurations of the embodiments disclosed herein are possible. For example, the current switches T10, T11 may include transistors, such as FETs, such, as JFETs, MOSFETs, or any combination thereof. The current switches may also include BJTs, in which ease the earlier reference to gate and source (the terms for N-channel FETs) corresponds to base and emitter (the terms for NPN BJTs). The resistor, RS, may include a resistor other than a current sensing resistor; however, in some configurations, this may result in less than optimal performance. For example, the power consumption may be less than optimally minimized, more components may need to be used, or the like.
In this embodiment, the soft start component 616 includes switches SW1-SW5 for controlling incremental current steps of the soft start, operational amplifier 902, current switches T1-T9, and a soft start resistor, RSS. The current switches T1-T9 may be transistors. The operational amplifier 902 is coupled, at one of its inputs, to the current limit detector 620 and at another one of its inputs to a terminal C. The operational amplifier 902 is operative to receive the current limit detected by the current limit detector 620 and to compare the received current limit with the soft start current ISS, which is the sum of the currents I1-I5. The soft start current is further related to the output current, IOUT, for example, by a factor dependent on the size ratios of the current mirrors.
The soft start component 616 is operative to receive the control signal 626 output from the logic circuitry 624 (included, in the soft start control 614) and to change the state of one or more of the switches SW1-SW5 in response thereto (ON/OFF). In operation, for example, if only current switch T1 is turned ON (i.e., T2-T5 are turned OFF), current I1 will flow to the gates of current switches T6 and T7. This may cause current switches T6 and/or T7 to turn ON, which may cause current to flow to the soft start controller 614. The current switch T7 is operatively coupled to the gates of current switches T8 and T9. Current flowing from current switch T7 may turn ON current switches T8 and/or T9. Current may then flow from current switch T9 via the current limit converter 630 to the pass element 802.
The current switches T1-T5 may be scaled, in one embodiment, T1 may be scaled 1X, T2 scaled 2X, T3 scaled 4X, T4 scaled 8X, and T5 maybe scaled 16X. In order to increase resolution, in this embodiment, the control signal 626 comprises five control bits, BIT0-BIT4, each control bit controlling one of the switches SW1-SW5. Generally, as the number of control bits included in the control signal 626 increases, the resolution achievable in the incremental steps of die charge current, IOUT, output from the pass element 802 increases as well. If the control, signal 626 is (from most significant bit to least significant bit) 00001, i.e., BIT0 is high, current I1 will flow to the gates of transistors T6 and T7 as SW1 is turned ON. If instead the control signal 626 is 10000, current I5 will flow to the soft start controller 614 and to the source of transistors T6 and T7. In this example, with five control bits, I5 may be thirty-two times greater than I1 (because 25=32), based on the size ratio of T5 and T1. In another embodiment, the current switches T1-T5 may be scaled differently, for example logarithmically, exponentially, or the like. The level of the currents I1-I5 may then be likewise related logarithmically, exponentially, etc. Other combinations of current switches T1-T5, switches SW1-SW5, or both are possible.
In the illustrated embodiment, current switches T6 and T7 form one current mirror and current switches T8 and T9 another current mirror. In this embodiment, the soft start current, ISS, flowing through the soft start resistor, RSS, may need to be small by design. By including multiple current mirrors, the current eventually output as IOUT can be successively increased. For example, the size ratio between the scales of the current switches T8 and T9 may be higher than the size ratio of T6 and T7. The successive increase in size ratios between the current mirrors may be linear, logarithmic, exponential, or have any other relationship.
The charge current is thus controlled by the soft start controller 614 and the soft start component 616 and thereby increased in incremental steps up to a current limit. The charge current is further controlled by the current limit controller 618 so as not to exceed the current limit. The current limit is detected by the current limit detector 620 and is associated with a predetermined power limit value of power dissipated across the pass element 802. Collectively, the elements of the charge power control scheme 900 cooperate to control the power and thus the current flowing in the pass element 802, which in turn regulates the charge current, IOUT, flowing to the charge storage device, the system load, or both (not shown).
One or more elements of the charge power control scheme, such as the charge power control device, may be implemented in a number of ways. An implementation may use discrete components, or, preferably, be embodied in an IC or as a functional block in an IC. Such IC may further be adapted for use in a mobile device. Examples of mobile devices include laptops, cell phones, digital cameras, personal digital assistants (PDAs), game boys, other battery-operated toys, and the like.
In sum, although the invention has been described in considerable detail with reference to certain preferred embodiments thereof other embodiments are possible. Therefore, the spirit and scope of the appended claims should not be limited to the description of the preferred embodiments contained herein.
This application claims the benefit of and incorporates by reference U.S. Provisional Application, Ser. No. 60/853,282 filed Oct. 21, 2006, titled “Power Loop Control with Soft Start” and U.S. Provisional Application, Ser. No. 60/912,920 filed Apr. 19, 2007 titled “Supply Power Control with Soft Start.”
Number | Date | Country | |
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60853282 | Oct 2006 | US | |
60912920 | Apr 2007 | US |