Patent Application
20250141187
A technology according to the present disclosure (hereinafter, also referred to as a “present technology”) relates to a surface emitting laser and a manufacturing method for the surface emitting laser.
Conventionally, there is known a surface emitting laser that includes a plurality of active regions laminated between first and second reflection mirrors to achieve a high output (see, for example, PTL 1).
Furthermore, conventionally, there is known a surface emitting laser that includes a semiconductor structure that includes an active layer and a buried tunnel junction and is disposed between the first and second reflection mirrors (see, for example, PTL 2). The buried tunnel junction functions as a current constriction region.
However, to achieve a high output by laminating a plurality of semiconductor structures each including the active layer and the buried tunnel junction, etching and subsequent burial regrowth need to be performed on tunnel junction layers a number of times the number of which is the same as the number of the buried tunnel junctions, and increases manufacturing cost.
It is therefore a main object of the present technology to provide a surface emitting laser that can achieve a high output while suppressing an increase in manufacturing cost, and includes a current constriction region.
The present technology includes: first and second reflection mirrors that are mutually laminated; and a middle part that is disposed between the first and second reflection mirrors, the middle part has a laminated structure formed by laminating a plurality of semiconductor structures including each of a mutually laminated active layer and tunnel junction layer as an intermediate layer, and a peripheral part of at least the tunnel junction layer of the at least one semiconductor structure has higher resistance than resistance of a center part.
A top layer of the laminated structure on a side of the second reflection mirror 107 may have lower resistance than the resistance of the peripheral part of the tunnel junction layer.
The top layer may be formed of an n-type semiconductor layer.
The top layer may be formed of an n-InP type layer.
A top layer of the laminated structure on a side of the first reflection mirror may have lower resistance than the resistance of the peripheral part of the tunnel junction layer.
The top layer may be formed of an n-type semiconductor layer.
The top layer may be formed of an n-InP type layer.
The semiconductor structure may include a p-type semiconductor layer that is disposed between the active layer and the tunnel junction layer, a first n-type semiconductor layer that is disposed on an opposite side of the active layer to a side of the p-type semiconductor layer, and a second n-type semiconductor layer that is disposed on an opposite side of the tunnel junction layer to the side of the p-type semiconductor layer.
The peripheral part of the p-type semiconductor layer may have the higher resistance than the resistance of the center part in the semiconductor structure. The semiconductor structure may be disposed such that the first n-type semiconductor layer is located on a side of the first reflection mirror, and the second n-type semiconductor layer is located on a side of the second reflection mirror, and the second n-type semiconductor layer of the semiconductor structure closest to the second reflection mirror, and the first n-type semiconductor layer of the semiconductor structure closest to the first reflection mirror may have lower resistance than the resistance of the peripheral part of the p-type semiconductor layer.
Peripheral parts of all layers other than the second n-type semiconductor layer of the semiconductor structure closest to the second reflection mirror, and the first n-type semiconductor layer of the semiconductor structure closest to the first reflection mirror may have higher resistance than the resistance of the center part in the laminated structure.
Peripheral parts of the second n-type semiconductor layer of the semiconductor structure closest to the second reflection mirror, the first n-type semiconductor layer of the semiconductor structure closest to the first reflection mirror, and all layers other than the first and second n-type semiconductor layers of the semiconductor structure located at a middle of the laminated structure may have higher resistance than the resistance of the center part in the laminated structure.
The semiconductor structure may be disposed such that the first n-type semiconductor layer is located on a side of the second reflection mirror, and the second n-type semiconductor layer is located on a side of the first reflection mirror, and the first n-type semiconductor layer of the semiconductor structure closest to the second reflection mirror, and the second n-type semiconductor layer of the semiconductor structure closest to the first reflection mirror may have lower resistance than the resistance of the peripheral part of the p-type semiconductor layer.
Peripheral parts of all layers other than the first n-type semiconductor layer of the semiconductor structure closest to the second reflection mirror, and the second n-type semiconductor layer of the semiconductor structure closest to the first reflection mirror may have higher resistance than the resistance of the center part in the laminated structure.
Peripheral parts of the first n-type semiconductor layer of the semiconductor structure closest to the second reflection mirror, the second n-type semiconductor layer of the semiconductor structure closest to the first reflection mirror, and all layers other than the first and second n-type semiconductor layers of the semiconductor structure located at a middle of the laminated structure may have higher resistance than the resistance of the center part in the laminated structure.
The tunnel junction layer of the semiconductor structure that is part of a plurality of the semiconductor structures is a burial type.
One of the first and second reflection mirrors may be a dielectric multilayer film reflection mirror that has a photonic crystal structure.
The middle part may include a heat dissipation member between one of the first and second reflection mirrors and the laminated structure.
The present technology also provides a manufacturing method for a surface emitting laser, including:
A top surface on one side and/or a top surface on an other side of the laminated body may be an n-type semiconductor layer, in the step of making the resistance higher, resistance of a peripheral part of the n-type semiconductor layer is made higher than the resistance of the center part, and the manufacturing method for the surface emitting laser may further include a step of performing annealing treatment on the laminated body after the step of making the resistance higher, and making the resistance of the peripheral part of the n-type semiconductor layer lower.
A preferred embodiment of the present technology will be described in detail with reference to the accompanying figures below. In the present specification and the drawings, components having substantially the same functional configuration will be denoted by the same reference numerals, and thus repeated descriptions thereof will be omitted. The embodiment to be described below shows a representative embodiment of the present technology, and the scope of the present technology should not be narrowly instructed on the basis of this. Even when the present specification describes that a surface emitting laser and a manufacturing method for the surface emitting laser according to the present technology have a plurality of effects, the surface emitting laser and a manufacturing method for the surface emitting laser according to the present technology may have at least one effect. The advantageous effects described in the present specification are merely exemplary and are not limited, and other advantageous effects may be obtained.
Furthermore, the description will be made in the following order.
In recent years, development of infrared surface emitting lasers used for 3D sensing and face recognition has been advancing. Currently, the infrared surface emitting laser mainly uses, for example, a 940 nm band as an oscillation wavelength, yet is desired to have a longer wavelength in future. For example, a 1.4 μm band in particular has an advantage that the 1.4 μm band is an eye safe band at which a damage threshold for eyes substantially increases and, in addition, noise at a time of sensing is suppressed low since the strength of sunlight is low.
On the other hand, an InP-based surface emitting laser that is suitable for a long wavelength equal to or more than, for example, 1.3 μm as the oscillation wavelength has a problem that it is difficult to make, for example, a current constriction structure due to oxidation of an AlAs layer used by a GaAs-based surface emitting laser. Hence, although a Buried Tunnel Junction (BTJ) structure is frequently used as the current constriction structure for the InP-based surface emitting laser, this BTJ structure needs etching and then buried regrowth of Tunnel Junction layers (TJ layers), and increases the number of processes.
By the way, there is proposed a surface emitting laser that is formed by laminating a plurality of active layers to achieve a high output (see, for example, Patent Literature 1). However, in a case where the BTJ structure for current constriction is provided to each active layer in this surface emitting laser, etching and subsequent burial regrowth need to be performed on tunnel junction layers a number of times the number of which is the same as the number of the active layers, and increases manufacturing cost.
Hence, as a result of earnest study, the inventors have developed a surface emitting laser according to the present technology as a surface emitting laser that can achieve a high output while suppressing an increase in manufacturing cost, and includes a current constriction region.
Hereinafter, some examples of the embodiment of the surface emitting laser according to the present technology will be described in detail.
The surface emitting laser 10-1 is a Vertical Cavity Surface Emitting Laser (VCSEL). The surface emitting laser 10-1 includes first and second reflection mirrors 106 and 107 that are mutually laminated, and a middle part MP that is disposed between the first and second reflection mirrors 106 and 107. The surface emitting laser 10-1 is driven by, for example, a laser driver.
The middle part MP has a laminated structure LS formed by laminating a plurality of (e.g., three) semiconductor structures SS (that are, for example, first to third semiconductor structures SS1 to SS3 and structures surrounded by broken lines in
The middle part MP further includes a substrate 100 disposed between the laminated structure LS and the first reflection mirror 106. For example, the back surface (lower surface) of the substrate 100 is provided with the first reflection mirror 106.
The first to third semiconductor structures SS1 to SS3 are laminated in this order from the side (lower side) of the substrate 100.
The first semiconductor structure SS1 includes an active layer 102-1 and a tunnel junction layer 104-1 that are mutually laminated, a p-type semiconductor layer 103-1 that is disposed between the active layer 102-1 and the tunnel junction layer 104-1, an n-type semiconductor layer 101-1 (first n-type semiconductor layer) that is disposed on an opposite side to a p-type semiconductor layer 103-1 side of the active layer 102-1, and an n-type semiconductor layer 105-12 (second n-type semiconductor layer) that is disposed on an opposite side to the p-type semiconductor layer 103-1 side of the tunnel junction layer 104-1. The first semiconductor structure SS1 is disposed such that the n-type semiconductor layer 101-1 is located on a first reflection mirror 106 side and the n-type semiconductor layer 105-12 is located on a second reflection mirror 107 side.
The second semiconductor structure SS2 includes an active layer 102-2 and a tunnel junction layer 104-2 that are mutually laminated, a p-type semiconductor layer 103-2 that is disposed between the active layer 102-2 and the tunnel junction layer 104-2, the n-type semiconductor layer 105-12 (first n-type semiconductor layer) that is disposed on an opposite side to a p-type semiconductor layer 103-2 side of the active layer 102-2, and an n-type semiconductor layer 105-23 (second n-type semiconductor layer) that is disposed on an opposite side to the p-type semiconductor layer 103-2 side of the tunnel junction layer 104-2. The second semiconductor structure SS2 is disposed such that the n-type semiconductor layer 105-12 is located on the first reflection mirror 106 side and the n-type semiconductor layer 105-23 is located on the second reflection mirror 107 side.
The third semiconductor structure SS3 includes an active layer 102-3 and a tunnel junction layer 104-3 that are mutually laminated, a p-type semiconductor layer 103-3 that is disposed between the active layer 102-3 and the tunnel junction layer 104-3, the n-type semiconductor layer 105-23 (first n-type semiconductor layer) that is disposed on an opposite side to a p-type semiconductor layer 103-3 side of the active layer 102-3, and an n-type semiconductor layer 101-3 (second n-type semiconductor layer) that is disposed on an opposite side to the p-type semiconductor layer 103-3 side of the tunnel junction layer 104-3. The third semiconductor structure SS3 is disposed such that the n-type semiconductor layer 105-23 is located on the first reflection mirror 106 side and the n-type semiconductor layer 101-3 is located on the second reflection mirror 107 side.
The first and second semiconductor structures SS1 and SS2 share the n-type semiconductor layer 105-12. That is, the n-type semiconductor layer 105-12 functions as both of the second n-type semiconductor layer of the first semiconductor structure SS1 and the first n-type semiconductor layer of the second semiconductor structure SS2.
The second and third semiconductor structures SS2 and SS3 share the n-type semiconductor layer 105-23. That is, the n-type semiconductor layer 105-23 functions as both of the second n-type semiconductor layer of the second semiconductor structure SS2 and the first n-type semiconductor layer of the third semiconductor structure SS3.
For example, the laminated structure LS includes a mesa M provided on the n-type semiconductor layer 101-1 of the first semiconductor structure SS1. For example, the mesa M includes all layers other than the n-type semiconductor layer 101-1 of the first semiconductor structure SS1, and the second and third semiconductor structures SS2 and SS3. The mesa M has, for example, a substantially columnar shape, yet may have other shapes such as a substantially elliptical cylindrical shape, a polygonal prism shape, a truncated conical shape, an elliptical truncated conical shape, or a polygonal truncated conical shape. The diameter of the mesa M is, for example, 5 to 100 μm.
In the laminated structure LS, for example, peripheral parts of all layers other than the top layer (n-type semiconductor layer 101-1) on the first reflection mirror 106 side and the top layer (n-type semiconductor layer 101-3) on the second reflection mirror 107 side are ion implantation regions IIA (regions that are painted gray in
For example, the second reflection mirror 107 is provided at the center part of a top part (the upper surface of the n-type semiconductor layer 101-3) of the mesa M, and an anode electrode 109 of a circular shape (e.g., ring shape) is provided at the peripheral part of the top part of the mesa M so as to surround the second reflection mirror 107. For example, the surface emitting laser 10-1 has the upper surface of the second reflection mirror 107 as an emission surface. That is, for example, the surface emitting laser 10-1 is a surface emission-type surface emitting laser that emits light toward the surface side of the substrate 100.
For example, an insulating film 108 is formed on the side surface of the mesa M.
For example, in a region around the bottom part of the mesa M (a region around the mesa M of the n-type semiconductor layer 101-1), a cathode electrode 110 of a circular shape (e.g., ring shape) is provided so as to surround the bottom part of the mesa M with the insulating film 108 interposed therebetween.
The substrate 100 is, for example, a semiconductor substrate such as a GaAs substrate, a Si substrate, and a SiC substrate. Note that, for example, a substrate other than semiconductor substrates such as semi-insulating substrates and insulating substrates may be used as the substrate 100. The thermal conductivity of the substrate 100 is preferably, for example, 40 W/mK or more.
For example, a convex structure 100a of a substantially hemispherical shape is provided to the back surface (lower surface) of the substrate 100. The convex structure 100a is an underlayer of the first reflection mirror 106. The convex structure 100a is located at a position meeting the region (low resistance region) surrounded by the ion implantation region IIA in the laminated structure LS.
The first reflection mirror 106 is located at a position meeting the region (low resistance region) surrounded by the ion implantation region IIA in the laminated structure LS. For example, the first reflection mirror 106 is a concave-type dielectric multilayer film reflection mirror. The first reflection mirror 106 is provided along the convex structure 100a provided on the back surface of the substrate 100. As the material of the dielectric multilayer film reflection mirror, for example, SiO2, TiO2, Ta2O5, a-Si, Al2O3, and the like can be used. By using a concave mirror as the first reflection mirror 106, it is possible to condense light produced by the active layer 102, so that it is possible to effectively reduce diffraction loss. By using the dielectric multilayer film reflection mirror as the first reflection mirror 106, it is possible to provide the first reflection mirror 106 that is thin (has a smaller number of pairs) and has high reflectance.
The second reflection mirror 107 is located at a position meeting the region (low resistance region) surrounded by the ion implantation region IIA in the laminated structure LS. For example, the second reflection mirror 107 is a plane-type dielectric multilayer film reflection mirror. As the material of the dielectric multilayer film reflection mirror, for example, SiO2, TiO2, Ta2O5, a-Si, Al2O3, and the like can be used. By using the dielectric multilayer film reflection mirror as the second reflection mirror 107, it is possible to provide the second reflection mirror 107 that is thin (has a smaller number of pairs) and has high reflectance. The second reflection mirror 107 has the reflectance that is set slightly lower than that of the first reflection mirror 106.
For example, the active layer 102 (e.g., active layers 102-1 to 102-3) has a quantum well structure including a barrier layer and a quantum well layer made of an AlGaInAs-based compound semiconductor. This quantum well structure may be a single Quantum Well structure (QW structure) or may be a Multiple Quantum Well structure (MQW structure). Another example of the active layer 102 may be an InGaAs-based quantum dot active layer. Each active layer 102 is preferably disposed at a position of a belly of a standing wave in a resonator. The active layer 102 is preferably designed such that an oscillation wavelength A corresponds to a long wavelength of 900 nm or more and, moreover, 1.3 μm or more.
In each semiconductor structure SS, the tunnel junction layer 104 (e.g., tunnel junction layers 104-1 to 104-3) plays a role of converting electrons implanted from the adjacent the n-type semiconductor layer 101 into holes, and implanting the holes into the adjacent p-type semiconductor layer 103. By disposing the tunnel junction layer 104 between the two adjacent active layers 102, it is possible to implant a current in each active layer 102. The tunnel junction layer 104 includes a p-type semiconductor region 104a and an n-type semiconductor region 104b that are disposed in contact with each other. Here, the p-type semiconductor region 104a is disposed on a substrate 100 side (lower side) of the n-type semiconductor region 104b. The p-type semiconductor region 104a is made of a p-type AlGaInAs-based compound semiconductor that is heavily doped with, for example, C, Mg, or Zn. The n-type semiconductor region 104b is made of an InP-based compound semiconductor or an AlGaInAs-based compound semiconductor that is heavily doped with, for example, Si.
(p-Type Semiconductor Layer)
For example, a p-type semiconductor layer 103 (e.g., p-type semiconductor layers 103-1 to 103-3) is made of a p-type InP-based compound semiconductor (e.g., p-InP). The p-type semiconductor layer is also referred to as a clad layer.
(n-Type Semiconductor Layer)
For example, the n-type semiconductor layer 101-1 (first n-type semiconductor structure) of the first semiconductor structure SS1 and the n-type semiconductor layer 101-3 (second n-type semiconductor structure) of the third semiconductor structure SS3 are each made of an n-type InP-based compound semiconductor (e.g., n-InP).
For example, the n-type semiconductor layer 105-12 of the first semiconductor structure SS1 and the second semiconductor structure SS2, and the n-type semiconductor layer 105-23 of the second semiconductor structure SS2 and the third semiconductor structure SS3 are each made of a compound semiconductor (e.g., n-AlGaInAs) that lattice-matches with InP.
Each n-type semiconductor layer is also referred to as a clad layer.
The insulating film 108 is made of a dielectric such as SiO2, SiN, SiON, or the like.
The anode electrode 109 is made of, for example, Au/Ni/AuGe, Au/Pt/Ti, or the like. The anode electrode 109 is electrically connected to, for example, an anode (positive electrode) of the laser driver.
The cathode electrode 110 is made of, for example, Au/Ni/AuGe, Au/Pt/Ti, or the like. The cathode electrode 110 is electrically connected to, for example, a cathode (negative electrode) of the laser driver.
For example, the ion implantation region IIA makes the resistance of the peripheral part of at least the tunnel junction layer 104 of each of the first to third semiconductor structures SS1 to SS3 higher than that of the center part.
For example, the peripheral parts of the active layer 102-1, the p-type semiconductor layer 103-1, the tunnel junction layer 104-1, and the n-type semiconductor layer 105-12 of the first semiconductor structure SS1 are the ion implantation regions IIA, and have higher resistance than that of the center part.
For example, the n-type semiconductor layer 101-1 that is a top layer on the first reflection mirror 106 side of the laminated structure LS has lower resistance than that of the peripheral part of each tunnel junction layer 104. The top layer is formed of, for example, an n-InP layer.
For example, the peripheral parts of the n-type semiconductor layer 105-12, the active layer 102-2, the p-type semiconductor layer 103-2, the tunnel junction layer 104-2, and the n-type semiconductor layer 105-23 of the second semiconductor structure SS2 are the ion implantation regions IIA, and have higher resistance than that of the center part.
For example, the peripheral parts of the n-type semiconductor layer 105-23, the active layer 102-3, the p-type semiconductor layer 103-3, and the tunnel junction layer 104-3 of the third semiconductor structure SS3 are the ion implantation regions IIA, and have higher resistance than that of the center part.
For example, the n-type semiconductor layer 101-3 that is the top layer on the second reflection mirror 107 side of the laminated structure LS has lower resistance than that of the peripheral part of each tunnel junction layer 104. The top layer is formed of, for example, an n-InP layer.
For example, the n-type semiconductor layer 101-3 (second n-type semiconductor layer) of the third semiconductor structure SS3 that is a semiconductor structure closest to the second reflection mirror 107, and the n-type semiconductor layer 101-1 (first n-type semiconductor layer) of the first semiconductor structure SS1 that is a semiconductor structure closest to the first reflection mirror 106 have lower resistance than the resistance of the peripheral part of each p-type semiconductor layer 103.
For example, the peripheral parts of all layers other than the n-type semiconductor layer 101-3 (second n-type semiconductor layer) of the third semiconductor structure SS3 that is a semiconductor structure closest to the second reflection mirror 107, and the n-type semiconductor layer 101-1 (first n-type semiconductor layer) of a semiconductor structure closest to the first reflection mirror 106 have higher resistance than that of the center part in the laminated structure LS.
The impurity concentration of the ion implantation region IIA is preferably less than 1×1019 cm−3.
Impurities in the ion implantation region IIA preferably include at least one of H, He, B, C, and O.
Hereinafter, an operation of the surface emitting laser 10-1 will be described. When a drive voltage is applied by the laser driver in the surface emitting laser 10-1, the current having flowed from the anode side of the laser driver into the anode electrode 109 is implanted into the active layer 102-3 via the tunnel junction layer 104-3 and the p-type semiconductor layer 103-3 in this order while being constricted in the ion implantation region IIA via the n-type semiconductor layer 101-3, and the active layer 102-3 emits light. Furthermore, the current having passed the active layer 102-3 is implanted into the active layer 102-2 via the n-type semiconductor layer 105-23, the tunnel junction layer 104-2, and the p-type semiconductor layer 103-2 in this order while being constricted in the ion implantation region IIA, and the active layer 102-2 emits light. Furthermore, the current having passed the active layer 102-2 is implanted into the active layer 102-1 via the n-type semiconductor layer 105-12, the tunnel junction layer 104-1, and the p-type semiconductor layer 103-1 in this order while being constricted in the ion implantation region IIA, and the active layer 102-1 emits light. According to a tunneling effect of the tunnel junction layer 104-2, the substantially same current as the current implanted into the active layer 102-3 is implanted into the active layer 102-2. According to a tunneling effect of the tunnel junction layer 104-1, the substantially same current as the current implanted into the active layer 102-2 flows in the active layer 102-1. The current having passed the active layer 102-1 flows out from the cathode electrode 110 to the cathode side of the laser driver via the n-type semiconductor layer 101-1. When light produced by each active layer 102 reciprocates between the first and second reflection mirrors 106 and 107 while being amplified by each active layer 102, and satisfies an oscillation condition, the light is emitted as laser light from the upper surface (emission surface) of the second reflection mirror 107.
Hereinafter, an example of the manufacturing method for the surface emitting laser 10-1 will be described with reference to a flowchart in
In first step S1, a laminated body is generated (see
In next step S2, a protection film PF is formed on the laminated body (see
In next step S3, ion implantation is performed (see
In next step S4, the protection film PF is removed (see
In next step S5, the mesa M is formed (see
In next step S6, the anode electrode 109 is formed (see
In next step S7, the second reflection mirror 107 is formed. More specifically, first, a dielectric multilayer film DMF that is a material of the second reflection mirror 107 is formed on the entire surface (see
In next step S8, the insulating film 108 is formed. More specifically, first, the insulating film 108 is formed on the entire surface (see
In next step S9, the cathode electrode 110 is formed (see
In next step S10, a support base SB is pasted (see
In next step S11, the growth substrate GS is removed (see
In next step S12, the substrate 100 is pasted (see
In next step S13, the first reflection mirror 106 is formed. More specifically, first, a resist is applied to the back surface (lower surface) of the substrate 100, and the substrate 100 is subjected to dry etching using as a mask a hemispherical resist obtained by heating (reflowing) the resist into a hemispherical shape to form the convex structure 100a (see
In next step S14, the support base SB is removed (see
In last step S15, annealing treatment is performed (see
The surface emitting laser 10-1 according to example 1 of the embodiment of the present technology includes the first and second reflection mirrors 106 and 107 that are mutually laminated, and the middle part MP that is disposed between the first and second reflection mirrors 106 and 107, the middle part MP has the laminated structure LS formed by laminating a plurality of the semiconductor structures SS each including each of the mutually laminated active layer 102 and tunnel junction layer 104 as an intermediate layer, and the peripheral part of at least the tunnel junction layer 104 of the at least one semiconductor structures SS (e.g., all semiconductor structures SS) has higher resistance than that of the center part.
In this case, it is possible to constrict the current without forming the tunnel junction layer 104 of the at least one semiconductor structure SS (e.g., all semiconductor structures SS) as a burial type. That is, it is possible to provide a current constriction function to the tunnel junction layer 104 without etching and performing subsequent burial regrowth on the tunnel junction layer 104.
As a result, according to the surface emitting laser 10-1, it is possible to provide a surface emitting laser that can achieve a high output while suppressing an increase in manufacturing cost, and includes a current constriction region.
The top layer on the second reflection mirror 107 side of the laminated structure LS has lower resistance than that of the peripheral part of the tunnel junction layer 104. Consequently, when, for example, the anode electrode 109 is installed on a peripheral region of the top layer, it is possible to form a current path of low resistance in the top layer in an in-plane direction in particular, and eventually achieve high efficiency.
The top layer on the second reflection mirror 107 side of the laminated structure LS is the n-type semiconductor layer 101-3. The top layer is preferably formed of, for example, an n-InP layer. Consequently, even when the resistance of the top layer is increased by ion implantation, the top layer can be repaired (the resistance is reduced) by annealing.
The top layer on the first reflection mirror 106 side of the laminated structure LS has lower resistance than that of the peripheral part of the tunnel junction layer 104. Consequently, when, for example, the cathode electrode 110 is installed on a peripheral region of the top layer, it is possible to form a current path of low resistance in the top layer in an in-plane direction in particular, and eventually achieve high efficiency.
The top layer on the first reflection mirror 106 side of the laminated structure LS is the n-type semiconductor layer 101-1. The top layer is preferably formed of, for example, an n-InP layer. Consequently, even when the resistance of the top layer is increased by ion implantation, the top layer can be repaired (the resistance is reduced) by annealing.
Each semiconductor structure SS preferably further includes the p-type semiconductor layer 103 that is disposed between the active layer 102 and the tunnel junction layer 104, the first n-type semiconductor layer that is disposed on an opposite side to a p-type semiconductor layer 103 side of the active layer 102, and the second n-type semiconductor layer that is disposed on an opposite side to the p-type semiconductor layer 103 side of the tunnel junction layer 104. Consequently, it is possible to cause the current to flow to each active layer 102, and lower an operating voltage.
The peripheral part of the p-type semiconductor layer 103 of each semiconductor structure SS has higher resistance than that of the center part. Consequently, it is possible to provide the current constriction function to the p-type semiconductor layer 103, too.
Each semiconductor structure SS is disposed such that the first n-type semiconductor layer is located on the first reflection mirror 106 side, and the second n-type semiconductor layer is disposed on the second reflection mirror 107 side, and the n-type semiconductor layer 101-3 that is the second n-type semiconductor layer of the semiconductor structure SS3 closest to the second reflection mirror 107, and the n-type semiconductor layer 101-1 that is the first n-type semiconductor layer of the semiconductor structure SS1 closest to the first reflection mirror 106 have lower resistance than that of the peripheral part of the p-type semiconductor layer 103. Consequently, it is possible to form a current path of low resistance in the top layer on the first reflection mirror 106 side and the top layer on the second reflection mirror 107 side of the laminated structure LS in the in-plane direction, and eventually achieve remarkably high efficiency.
The peripheral parts of all layers other than the n-type semiconductor layer 101-3 that is the second n-type semiconductor layer of the semiconductor structure SS3 closest to the second reflection mirror 107, and the n-type semiconductor layer 101-1 that is the first n-type semiconductor layer of the semiconductor structure SS1 closest to the first reflection mirror 106 have higher resistance than that of the center part in the laminated structure LS. Consequently, it is possible to provide the current constriction function to these all layers.
Furthermore, according to the surface emitting laser 10-1, it is possible to provide a surface emitting laser that can constrict the current in at least the tunnel junction layer 104 without performing epitaxial growth a plurality of times. Consequently, it is possible to reduce a manufacturing time and manufacturing cost.
The manufacturing method for the surface emitting laser 10-1 includes a process of generating the laminated body formed by laminating the plurality of semiconductor structures SS each including each of the active layer 102 and the tunnel junction layer 104 on the growth substrate GS; and a process of injecting ions into the laminated body, and making the resistance of the peripheral part of at least the tunnel junction layer 104 higher than the resistance of the center part.
Consequently, it is possible to manufacture the surface emitting laser that can achieve a high output while suppressing an increase in manufacturing cost, and includes the current constriction region.
The top surface on one side and/or the top surface on an other side in a lamination direction of the laminated body are n-type semiconductor layers (e.g., n-InP layers), in the process of making the resistance higher, the peripheral parts of the n-type semiconductor layers have higher resistance than that of the center part, and the manufacturing method for the surface emitting laser 10-1 further includes a process of performing annealing treatment on the laminated body after the process of making the resistance higher, and making the resistance of the peripheral parts of the n-type semiconductor layers lower. Consequently, it is possible to manufacture the surface emitting laser 10-1 that includes the current constriction region in which the top layers on the one side and the other side in the lamination direction of the laminated body can be effectively used as contact regions with respect to electrodes.
The manufacturing method further includes a process of making the ion reach an inside of the growth substrate GS at the time of ion implantation, and pasting the support base SB on a surface on an opposite side to a growth substrate GS side of the laminated body after the process of making the resistance higher, and a process of removing the growth substrate GS from the laminated body. Consequently, it is possible to remove from components of the surface emitting laser 10-1 a part that is highly likely to induce change in characteristics of elements (e.g., decrease in reliability) and in which the ion concentration comes to a peak, so that it is possible to manufacture the surface emitting laser 10-1 that can suppress the change in characteristics of each constituent layer.
The manufacturing method for the surface emitting laser 10-1 preferably includes a process of laminating the first reflection mirror 106 and the substrate 100 on the surface of the laminated body from which the growth substrate GS has been removed.
For example, in the surface emitting laser 10-2, the first reflection mirror 106 is made of a material (e.g., a pair such as InP/AlGaInAs or AlInAs/AlGaInAs) that lattice-matches with InP. For example, in the surface emitting laser 10-2, the first reflection mirror 106 is a plane mirror. In the surface emitting laser 10-2, the peripheral part of the first reflection mirror 106 is the ion implantation region IIA, and the peripheral part has the higher resistance than that of the center part.
The surface emitting laser 10-2 performs the same operation as that of the surface emitting laser 10-1 according to example 1.
Hereinafter, an example of the manufacturing method for the surface emitting laser 10-2 will be described with reference to the flowchart in
In first step S21, a laminated body is generated (see
In next step S22, ion implantation is performed (see
In next step S23, the mesa M is formed (see
In next step S24, the anode electrode 109 is formed (see
In the next step S25, the second reflection mirror 107 is formed (see
In next step S26, the insulating film 108 is formed. More specifically, first, the insulating film 108 is formed on the entire surface (see
In next step S27, the cathode electrode 110 is formed (see
In next step S28, the support base SB is pasted (see
In next step S29, the growth substrate GS is removed (see
In next step S30, the substrate 100 is pasted (see
In next step S31, the support base SB is removed (see
In last step S32, annealing treatment is performed (see
According to the surface emitting laser 10-2, the first reflection mirror 106 is a plane-type semiconductor multilayer film reflection mirror, so that it is possible to obtain the same effect as that of the surface emitting laser 10-1 except that it is not possible to obtain an effect unique to the concave-type dielectric multilayer film reflection mirror. According to the manufacturing method for the surface emitting laser 10-2, the first reflection mirror 106 is also epitaxially grown to generate the laminated body, so that it is possible to simplify a manufacturing process.
For example, in the surface emitting laser 10-3, the first reflection mirror 106 is a plane mirror.
The surface emitting laser 10-3 performs the same operation as that of the surface emitting laser 10-1 according to example 1.
Hereinafter, an example of the manufacturing method for the surface emitting laser 10-3 will be described with reference to the flowchart in
In first step S41, a laminated body is generated (see
In next step S42, ion implantation is performed (see
In next step S43, the mesa M is formed (see
In next step S44, the anode electrode 109 is formed (see
In the next step S45, the second reflection mirror 107 is formed (see
In next step S46, the insulating film 108 is formed (see
In next step S47, the cathode electrode 110 is formed (see
In next step S48, the support base SB is pasted (see
In next step S49, the growth substrate GS is removed (see
In the next step S50, the first reflection mirror 106 is formed (see
In next step S51, the substrate 100 is pasted (see
In next step S52, the support base SB is removed (see
In last step S53, annealing treatment is performed (see
According to the surface emitting laser 10-3, the first reflection mirror 106 is the plane mirror, so that it is possible to obtain the same effect as that of the surface emitting laser 10-1 except that it is not possible to obtain an effect unique to the concave mirror. According to the manufacturing method for the surface emitting laser 10-3, the first reflection mirror 106 is the plane mirror, so that it is not necessary to process the substrate 100 and it is possible to simplify a manufacturing process.
The surface emitting laser 10-4 performs the same operation as that of the surface emitting laser 10-1 according to example 1.
Hereinafter, an example of the manufacturing method for the surface emitting laser 10-4 will be described with reference to the flowchart in
In first step S61, a laminated body is generated (see
In next step S62, ion implantation is performed (see
In next step S63, the mesa M is formed (see
In next step S64, the anode electrode 109 is formed (see
In the next step S65, the second reflection mirror 107 is formed (see
In next step S66, the insulating film 108 is formed (see
In next step S67, the cathode electrode 110 is formed (see
In next step S68, the support base SB is pasted (see
In next step S69, the growth substrate GS is removed (see
In next step S70, the substrate 100 is pasted (see
In next step S71, the substrate 100 is thinned (see
In next step S72, the first reflection mirror 106 is formed. More specifically, first, a resist is applied to the back surface (lower surface) of the substrate 100, and the substrate 100 is subjected to dry etching using as a mask a hemispherical resist obtained by heating (reflowing) the resist into a hemispherical shape to form the convex structure 100a (see
In next step S73, the support base SB is removed (see
In last step S74, annealing treatment is performed (see
According to the surface emitting laser 10-4, it is possible to obtain the same effect as that of the surface emitting laser 10-1 according to example 1, and the thin heat conductive substrate is used as the substrate 100, so that it is possible to improve heat dissipation while achieving the thin surface emitting laser 10-4 as a whole. According to the manufacturing method for the surface emitting laser 10-4, although the number of processes becomes larger as the substrate 100 is made thinner, it is possible to obtain the same effect as the manufacturing method for the surface emitting laser 10-1 according to example 1. Note that step S71 (the process of thinning the substrate 100) may be omitted.
The convex structure 111 is made of, for example, a transparent dielectric, a resin, a resist, or the like such as SiO2.
The surface emitting laser 10-5 performs the same operation as that of the surface emitting laser 10-1 according to example 1.
The surface emitting laser 10-5 can be manufactured by the substantially same manufacturing method as the manufacturing method for the surface emitting laser 10-4 according to example 4.
According to the surface emitting laser 10-5, it is possible to obtain the same effect as that of the surface emitting laser 10-4 according to example 4, and, form the convex structure 111 without processing the substrate 100. For example, the resist formed on the back surface of the substrate 100 and molded in the hemispherical shape by heating can be used as the underlayer of the first reflection mirror 106 as is.
As illustrated in
The surface emitting laser 10-6 performs the same operation as that of the surface emitting laser 10-1 according to example 1.
The surface emitting laser 10-6 can be manufactured by the substantially same manufacturing method as the manufacturing method for the surface emitting laser 10-1 according to example 1.
According to the surface emitting laser 10-6, by minimizing the number of the laminated semiconductor structures SS (to two), it is possible to provide a thin surface emitting laser that can achieve a high output while sufficiently suppressing an increase in manufacturing cost, and includes the current constriction region.
Each semiconductor structure SS includes the p-type semiconductor layer 103 that is disposed between the active layer 102 and the tunnel junction layer 104, the first n-type semiconductor layer that is disposed on the opposite side to the p-type semiconductor layer 103 side of the active layer 102, and the second n-type semiconductor layer that is disposed on the opposite side to the p-type semiconductor layer 103 side of the tunnel junction layer 104.
Each semiconductor structure is disposed such that the first n-type semiconductor layer is located on the second reflection mirror 107 side, and the second n-type semiconductor layer is located on the first reflection mirror 106 side.
The n-type semiconductor layer 101-3 (e.g., n-InP layer) that is the first n-type semiconductor layer of the semiconductor structure SS3 closest to the second reflection mirror 107, and the n-type semiconductor layer 101-1 (e.g., n-InP layer) that is the second n-type semiconductor layer of the semiconductor structure SS1 closest to the first reflection mirror 106 have lower resistance than that of the peripheral part of the p-type semiconductor layer 103.
The peripheral parts of all layers other than the n-type semiconductor layer 101-3 that is the first n-type semiconductor layer of the semiconductor structure SS3 closest to the second reflection mirror 107, and the n-type semiconductor layer 101-1 that is the second n-type semiconductor layer of the semiconductor structure SS1 closest to the first reflection mirror 106 have higher resistance than that of the center part in the laminated structure LS.
The surface emitting laser 10-7 performs the same operation as that of the surface emitting laser 10-1 according to example 1.
The surface emitting laser 10-7 can be manufactured by the substantially same manufacturing method as the manufacturing method for the surface emitting laser 10-1 according to example 1.
According to the surface emitting laser 10-7, it is possible to obtain the same effect as that of the surface emitting laser 10-1 according to example 1.
The surface emitting laser 10-8 employs the same configuration as that of the surface emitting laser 10-1 according to example 1 except that the second reflection mirror 107 has a photonic crystal structure as illustrated in
As illustrated in
The surface emitting laser 10-8 performs the same operation as that of the surface emitting laser 10-1 according to example 1.
The surface emitting laser 10-8 can be manufactured by the substantially same manufacturing method as the manufacturing method for the surface emitting laser 10-1 according to example 1.
According to the surface emitting laser 10-8, the second reflection mirror 107 that is a reflection mirror on the emission side has the photonic crystal structure, so that it is possible to control a lateral mode.
The surface emitting laser 10-9 employs the same configuration as that of the surface emitting laser 10-1 according to example 1 except that the mesa M is not formed as illustrated in
In the surface emitting laser 10-9, the cathode electrode 110 is provided to the back surface of the substrate 100 (e.g., a semiconductor substrate such as an Si substrate or a GaAs substrate) having conductivity.
The surface emitting laser 10-9 performs the same operation as that of the surface emitting laser 10-1 according to example 1.
The surface emitting laser 10-9 can be manufactured by the substantially same manufacturing method as the manufacturing method for the surface emitting laser 10-1 according to example 1.
According to the surface emitting laser 10-9, it is possible to obtain the same effect as that of the surface emitting laser 10-1 according to example 1, and, it is not necessary to form the mesa M, so that it is possible to simplify a manufacturing process.
The surface emitting laser 10-10 employs the same configuration as that of the surface emitting laser 10-1 according to example 1 except that, as illustrated in
The lower end of the ion implantation region IIA may be located below (e.g., in the p-type semiconductor layer 103-1) the lower surface of the tunnel junction layer 104-1 of the semiconductor structure SS1.
In the surface emitting laser 10-10, an implantation depth of ion implantation is an upper side of the n-type semiconductor layer 101-1, and therefore the peripheral part of the n-type semiconductor layer 101-1 does not have increased resistance. Consequently, the n-type semiconductor layer 101-1 does not need to be repaired (the resistance is reduced) by annealing, so that, even when a material (e.g., n-AlGaInAs) other than n-InP is used for the n-type semiconductor layer 101-1, it is possible to use the n-type semiconductor layer 101-1 having low resistance as a contact region with respect to the cathode electrode 110. That is, the degree of freedom of selection of a material used for the n-type semiconductor layer 101-1 is high.
The surface emitting laser 10-10 can be manufactured by the substantially same manufacturing method as the manufacturing method for the surface emitting laser 10-1 according to example 1.
The surface emitting laser 10-10 performs the same operation as that of the surface emitting laser 10-1 according to example 1.
According to the surface emitting laser 10-10, although a high concentration ion region is left in the laser, the growth substrate GS can be used as is, so that it is possible to simplify the manufacturing process.
The surface emitting laser 10-11 employs the same configuration as that of the surface emitting laser 10-1 according to example 1 except that, for example, the tunnel junction layer 104-3 of the third semiconductor structure SS3 is a burial type as illustrated in
In the surface emitting laser 10-11, the tunnel junction layer 104-3 in the third semiconductor structure SS3 is provided in a mesa shape on the p-type semiconductor layer 103-3, and the surroundings of the tunnel junction layer 104-3 are buried in the n-type semiconductor layer 101-3 (e.g., the n-InP layer or the n-AlGaInAs layer).
The surface emitting laser 10-11 performs the substantially same operation as that of the surface emitting laser 10-1 according to example 1.
The surface emitting laser 10-11 can be manufactured by the substantially same manufacturing method as the manufacturing method for the surface emitting laser 10-1 according to example 1.
According to the surface emitting laser 10-11, although the tunnel junction layer 104-3 is the burial type, and therefore it is necessary to perform etching and subsequent burial regrowth and manufacturing cost slightly increases, it is possible to obtain a light trapping effect of a refractive index difference in a lateral direction between the tunnel junction layer 104-3 and the n-type semiconductor layer 101-3.
Note that the burial type tunnel junction layer 104-3 in the surface emitting laser 10-11 is one example, and the other tunnel junction layers 104 may be the burial types, that is, part of the tunnel junction layers 104 of the plurality of tunnel junction layers 104 of the surface emitting laser may be the burial type.
The surface emitting laser 10-12 employs the same configuration as that of the surface emitting laser 10-1 according to example 1 except that, for example, the third semiconductor structure SS3 is not provided, and the tunnel junction layer 104-2 of the second semiconductor structure SS2 is a burial type as illustrated in
In the surface emitting laser 10-12, the tunnel junction layer 104-2 in the second semiconductor structure SS2 is provided in a mesa shape on the p-type semiconductor layer 103-2, and the surroundings of the tunnel junction layer 104-2 are buried in the n-type semiconductor layer 101-2 (e.g., the n-InP layer or the n-AlGaInAs layer).
The surface emitting laser 10-12 performs the substantially same operation as that of the surface emitting laser 10-1 according to example 1.
The surface emitting laser 10-12 can be manufactured by the substantially same manufacturing method as the manufacturing method for the surface emitting laser 10-1 according to example 1.
According to the surface emitting laser 10-12, although the tunnel junction layer 104-2 is the burial type, and therefore it is necessary to perform etching and subsequent burial regrowth and manufacturing cost slightly increases, it is possible to obtain a light trapping effect of a refractive index difference in the lateral direction between the tunnel junction layer 104-2 and the n-type semiconductor layer 101-2.
The surface emitting laser 10-13 employs the same configuration as that of the surface emitting laser 10-1 according to example 1 except that the n-type semiconductor layer 101-1 of the first semiconductor structure SS1 and the n-type semiconductor layer 101-3 of the third semiconductor structure SS3, and, in addition, the n-type semiconductor layer 105-12 of the first and second semiconductor structures SS1 and SS2 and the n-type semiconductor layer 105-23 of the second and third semiconductor structures SS2 and SS3 are the n-InP layers.
In the surface emitting laser 10-13, the peripheral parts of all layers other than the n-type semiconductor layer 101-3 that is the second n-type semiconductor layer of the third semiconductor structure SS3 closest to the second reflection mirror 107, the n-type semiconductor layer 101-1 that is the first n-type semiconductor layer of the first semiconductor structure SS1 closest to the first reflection mirror 106, and the first and second n-type semiconductor layers 105-12 and 105-23 of the second semiconductor structure SS2 located at the middle of the laminated structure have higher resistance than that of the center part in the laminated structure.
In the surface emitting laser 10-13, the n-type semiconductor layers 105-12 and 105-23 also have lower resistance than those of the peripheral parts of the tunnel junction layer 104, the p-type semiconductor layer 103, and the active layer 102.
The surface emitting laser 10-13 performs the substantially same operation as that of the surface emitting laser 10-1 according to example 1.
The surface emitting laser 10-13 is manufactured by the substantially same manufacturing method as the manufacturing method for the surface emitting laser 10-1. According to the surface emitting laser 10-13, the peripheral parts of the n-type semiconductor layers 101-1, 101-3, 105-12, and 105-23 whose resistance has been increased by annealing at a time of manufacturing are repaired (the resistance is reduced).
According to the surface emitting laser 10-13, it is possible to obtain the substantially same effect as that of the surface emitting laser 10-1 according to example 1.
The surface emitting laser 10-14 employs the same configuration as that of the surface emitting laser 10-1 according to example 1 except that the n-type semiconductor layer 101-1 of the first semiconductor structure SS1 is formed of, for example, the n-AlGaInAs layer and the cathode electrode 110 is provided in the circular shape (e.g., ring shape) on the back surface of the substrate 100 so as to surround the first reflection mirror 106.
In the surface emitting laser 10-14, the peripheral part of the n-type semiconductor layer 101-1 is the ion implantation region IIA, and has the higher resistance than that of the center part.
The surface emitting laser 10-14 performs the substantially same operation as that of the surface emitting laser 10-1 according to example 1. In this regard, the current having passed the n-type semiconductor layer 101-1 flows out from the cathode electrode 110 to the cathode side of the laser driver via the substrate 100.
The surface emitting laser 10-14 is manufactured by the substantially same manufacturing method as the manufacturing method for the surface emitting laser 10-1. In this regard, according to the surface emitting laser 10-14, the peripheral part of the n-type semiconductor layers 101-1 whose resistance has been increased by annealing at a time of manufacturing is not repaired (keeps the increased resistance).
According to the surface emitting laser 10-14, it is possible to obtain the substantially same effect as that of the surface emitting laser 10-1 according to example 1.
The surface emitting laser 10-15 employs the same configuration as that of the surface emitting laser 10-1 according to example 1 except that the n-type semiconductor layer 101-3 of the third semiconductor structure SS3 is formed of, for example, the n-AlGaInAs layer.
In the surface emitting laser 10-15, the peripheral part of the n-type semiconductor layer 101-3 is the ion implantation region IIA, and has the higher resistance than that of the center part.
The surface emitting laser 10-15 performs the substantially same operation as that of the surface emitting laser 10-1 according to example 1.
The surface emitting laser 10-15 is manufactured by the substantially same manufacturing method as the manufacturing method for the surface emitting laser 10-1. In this regard, according to the surface emitting laser 10-15, the peripheral part of the n-type semiconductor layers 101-3 whose resistance has been increased by annealing at a time of manufacturing is not repaired (keeps the increased resistance).
According to the surface emitting laser 10-15, although the n-type semiconductor layer 101-3 that is the contact region with respect to the anode electrode 109 has high resistance, and efficiency slightly lowers. It is possible to obtain the substantially same effect as that of the surface emitting laser 10-1 according to example 1.
The surface emitting laser 10-16 employs the same configuration as that of the surface emitting laser 10-7 according to example 7 except that the n-type semiconductor layer 101-1 of the first semiconductor structure SS1 and the n-type semiconductor layer 101-3 of the third semiconductor structure SS3, and, in addition, the n-type semiconductor layer 105-12 of the first and second semiconductor structures SS1 and SS2 and the n-type semiconductor layer 105-23 of the second and third semiconductor structures SS2 and SS3 are the n-InP layers.
In the surface emitting laser 10-16, the peripheral parts of all layers other than the n-type semiconductor layer 101-3 that is the first n-type semiconductor layer of the third semiconductor structure SS3 closest to the second reflection mirror 107, the n-type semiconductor layer 101-1 that is the second n-type semiconductor layer of the first semiconductor structure SS1 closest to the first reflection mirror 106, and the first and second n-type semiconductor layers 105-23 and 105-12 of the second semiconductor structure SS2 located at the middle of the laminated structure have higher resistance than that of the center part in the laminated structure.
In the surface emitting laser 10-16, the n-type semiconductor layers 105-12 and 105-23 also have lower resistance than those of the peripheral parts of the tunnel junction layer 104, the p-type semiconductor layer 103, and the active layer 102.
The surface emitting laser 10-16 performs the substantially same operation as that of the surface emitting laser 10-7 according to example 7.
The surface emitting laser 10-16 is manufactured by the substantially same manufacturing method as the manufacturing method for the surface emitting laser 10-7 according to example 7. According to the surface emitting laser 10-16, the peripheral parts of the n-type semiconductor layers 101-1, 101-3, 105-12, and 105-23 whose resistance has been increased by annealing at a time of manufacturing are repaired (the resistance is reduced).
According to the surface emitting laser 10-16, it is possible to obtain the substantially same effect as that of the surface emitting laser 10-1 according to example 1.
The present technology is not limited to each example of the above embodiment, and can be variously modified.
For example, the four or more semiconductor structures SS may be laminated in the laminated structure LS. In this case, the tunnel junction layer 104 of part of the semiconductor structures SS may be the burial type.
In the surface emitting laser according to the present technology, each of the n-type semiconductor layer (e.g., n-type semiconductor layer 101-1) on the top layer on the one side of the laminated structure, and the n-type semiconductor layer (e.g., n-type semiconductor layer 101-3) on the top layer on the other side of the laminated structure may be made of, for example, AlGaInAs, and the outer peripheral part may be the ion implantation region IIA and has higher resistance than that of the center part.
Although each of the above examples has described the surface emission type surface emitting laser that emits light toward the surface side of the substrate citing the example, the present technology is also applicable to a back surface emission type surface emitting laser that emits light toward the back surface side of a substrate.
In the surface emitting laser according to each of the above examples, the conductive types (the p type and the n type) may be switched.
For example, the manufacturing method for the surface emitting laser according to each of the examples may perform ion implantation after forming the mesa M.
According to the surface emitting laser according to the present technology, compared to a case where the tunnel junction layers 104 of all of the semiconductor structures SS are the burial type, it is possible to improve flatness, and consequently it is possible to paste a GaAs-based semiconductor multilayer film reflection mirror that has high heat dissipation as the second reflection mirror 107 to the laminated structure LS.
Although, for example, the above embodiment has described the InP-based surface emitting laser (a surface emitting laser that includes semiconductor layers that lattice-match with InP) citing the examples, the embodiment is not limited to this, and the present technology is also applicable to, for example, a GaAs-based surface emitting laser (a surface emitting laser that includes semiconductor layers that lattice-match with GaAs).
At least one of the first and second reflection mirrors 106 and 107 may be a semiconductor multilayer film reflection mirror made of a compound of two types or more elements such as Al, Ga, and As.
Part of the components of the surface emitting laser according to each of the examples may be combined without contradicting each other.
In each of the above-described examples, the material, the conductive type, the thickness, the width, the length, the shape, the size, the arrangement, and the like of each component that constitutes the surface emitting laser can be changed as appropriate as long as the surface emitting laser functions as the surface emitting laser.
The technology according to the present disclosure (the present technology) can be applied to various products (electronic devices). For example, the technology according to the present disclosure may be realized as a device equipped in any type of moving body such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility device, an airplane, a drone, a ship, and a robot.
The surface emitting laser according to the present technology is also applicable as, for example, light sources of devices (e.g., a laser printer, a laser copier, a projector, a head mount display, a head-up display) that form or display images with laser light.
Hereinafter, an application example of the surface emitting laser according to each of the above examples will be described.
The light reception device 125 detects light reflected by the subject S. The lens 115 is a lens for parallelizing the light emitted from the surface emitting laser 10-1, and is a collimator lens. The lens 135 is a lens that condenses light reflected by the subject S and guides the light to the light reception device 125, and is a condenser lens.
The signal processing unit 140 is a circuit that generates a signal corresponding to a difference between a signal input from the light reception device 125 and a reference signal input from the control unit 150. The control unit 150 includes, for example, a Time to Digital Converter (TDC). The reference signal may be a signal input from the control unit 150, or may be an output signal of a detection unit that directly detects an output of the surface emitting laser 10-1. The control unit 150 is, for example, a processor that controls the surface emitting laser 10-1, the light reception device 125, the signal processing unit 140, the display unit 160, and the storage unit 170. The control unit 150 is a circuit that measures the distance to the subject S on the basis of the signal generated by the signal processing unit 140. The control unit 150 generates a video signal for displaying information on the distance to the subject S, and outputs the video signal to the display unit 160. The display unit 160 displays the information on the distance to the subject S on the basis of the video signal input from the control unit 150. The control unit 150 stores the information on the distance to the subject S in the storage unit 170.
In this application example, instead of the surface emitting laser 10-1, one of the above surface emitting lasers 10-2 to 10-16 can be also applied to the distance measurement device 1000.
The vehicle control system 12000 includes a plurality of electronic control units connected thereto via a communication network 12001. In the example illustrated in
The drive system control unit 12010 controls an operation of an apparatus related to a drive system of a vehicle according to various programs. For example, the drive system control unit 12010 functions as a driving force generator for generating a driving force of a vehicle such as an internal combustion engine or a driving motor, a driving force transmission mechanism for transmitting a driving force to wheels, a steering mechanism for adjusting a turning angle of a vehicle, and a control apparatus such as a braking apparatus that generates a braking force of a vehicle.
The body system control unit 12020 controls operations of various devices mounted in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device of a keyless entry system, a smart key system, a power window device, or various lamps such as a headlamp, a back lamp, a brake lamp, a turn signal, and a fog lamp. In this case, radio waves transmitted from a portable device that substitutes for a key or signals of various switches may be input to the body system control unit 12020. The body system control unit 12020 receives inputs of the radio waves or signals and controls a door lock device, a power window device, and a lamp of the vehicle.
The vehicle exterior information detection unit 12030 detects information on the outside of the vehicle on which the vehicle control system 12000 is mounted. For example, the vehicle exterior information detection unit 12030 is connected with a distance measurement device 12031. The distance measurement device 12031 includes the above-described distance measurement device 1000. The vehicle exterior information detection unit 12030 causes the distance measurement device 12031 to measure a distance to an object (subject S) outside the vehicle, and acquires distance data obtained by the measurement. The vehicle exterior information detection unit 12030 may perform object detection processing for people, vehicles, obstacles, signs, and the like on the basis of the acquired distance data.
The vehicle interior information detection unit 12040 detects information on the inside of the vehicle. For example, a driver state detection unit 12041 that detects a driver's state is connected to the vehicle interior information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of a driver, and the vehicle interior information detection unit 12040 may calculate a degree of fatigue or concentration of the driver or may determine whether or not the driver is dozing on the basis of detection information input from the driver state detection unit 12041.
The microcomputer 12051 can calculate a control target value of the driving force generation device, the steering mechanism, or the braking device on the basis of information on the inside and the outside of the vehicle acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, and output a control command to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control for the purpose of implementing functions of an Advanced Driver Assistance System (ADAS) including vehicle collision avoidance, impact mitigation, following traveling based on an inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane deviation warning, and the like.
Furthermore, the microcomputer 12051 can perform cooperative control for the purpose of automated driving or the like in which autonomous travel is performed without depending on operations of the driver, by controlling the driving force generator, the steering mechanism, the braking device, or the like on the basis of information on the surroundings of the vehicle acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040.
In addition, the microcomputer 12051 can output a control command to the body system control unit 12020 on the basis of the information on the outside of the vehicle acquired by the vehicle exterior information detection unit 12030. For example, the microcomputer 12051 can perform cooperative control for the purpose of preventing glare, such as switching from a high beam to a low beam, by controlling the headlamp according to the position of a preceding vehicle or an oncoming vehicle detected by the vehicle exterior information detection unit 12030.
The sound image output unit 12052 transmits an output signal of at least one of sound and an image to an output device capable of visually or audibly notifying a passenger or the outside of the vehicle of information. In the example of
In
The distance measurement devices 12101, 12102, 12103, 12104, and 12105 are provided at, for example, positions of a front nose, side mirrors, a rear bumper, a back door, an upper part of a vehicle internal front windshield, and the like of the vehicle 12100. The distance measurement device 12101 provided on the front nose and the distance measurement device 12105 provided at an upper part of the front windshield inside the vehicle compartment mainly acquire data of a region in front of the vehicle 12100. The distance measurement devices 12102 and 12103 included in the side mirrors mainly acquire data of regions on the sides of the vehicle 12100. The distance measurement device 12104 included in the rear bumper or the back door mainly acquires data of a region behind the vehicle 12100. The data of the front region acquired by the distance measurement devices 12101 and 12105 are mainly used for detection of preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, and the like.
Note that
By, for example, obtaining a distance to each three-dimensional object in the detection ranges 12111 to 12114 and temporal change in the distance (a relative speed with respect to the vehicle 12100) on the basis of distance data obtained from the distance measurement devices 12101 to 12104, the microcomputer 12051 can extract as a preceding vehicle, particularly, a closest three-dimensional object that is on a path of the vehicle 12100 and is traveling at a predetermined speed (e.g., 0 km/h or higher) in the substantially same direction as that of the vehicle 12100. Furthermore, the microcomputer 12051 can also set an inter-vehicle distance that needs to be secured in advance in front of the preceding vehicle, and perform automatic brake control (including tracking stop control, too) and automatic acceleration control (including tracking start control, too). Thus, it is possible to perform cooperative control for the purpose of, for example, automated driving in which the vehicle travels in an automated manner without requiring the driver to perform operations.
For example, the microcomputer 12051 can classify and extract three-dimensional data regarding three-dimensional objects into other three-dimensional objects such as two-wheeled vehicles, normal vehicles, large vehicles, pedestrians, and electric poles on the basis of the distance data obtained from the distance measurement devices 12101 to 12104 and can use the three-dimensional data for automated avoidance of obstacles. For example, the microcomputer 12051 identifies obstacles in the vicinity of the vehicle 12100 into obstacles that can be visually recognized by the driver of the vehicle 12100 and obstacles that are difficult to be visually recognized by the driver. Then, the microcomputer 12051 can determine a risk of collision indicating the degree of risk of collision with each obstacle and can perform driving assistance for collision avoidance by outputting a warning to the driver through the audio speaker 12061 or the display unit 12062 and performing forced deceleration or avoidance steering through the drive system control unit 12010 when the risk of collision has a value equal to or greater than a set value and there is a possibility of collision.
An example of the moving body control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to the distance measurement device 12031 among the configurations described above.
In addition, the present technology can also have the following configurations.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2022-018649 | Feb 2022 | JP | national |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2022/046691 | 12/19/2022 | WO |
