Patent Application
20240356441
The present disclosure relates in general to circuits for electronic devices, including without limitation personal audio devices such as wireless telephones and media players, and more specifically, switch bootstrapping for a multi-level inductive power converter.
Personal audio devices, including wireless telephones, such as mobile/cellular telephones, cordless telephones, mp3 players, and other consumer audio devices, are in widespread use. Such personal audio devices may include circuitry for driving a pair of headphones, one or more speakers, haptic actuators, camera stabilization motors, and/or other loads. Such circuitry often includes a driver including a power amplifier for driving an output signal to such loads. Oftentimes, a power converter may be used to provide a supply voltage to a power amplifier in order to amplify a signal driven to speakers, headphones, other transducers, or other loads. A switching power converter is a type of electronic circuit that converts a source of power from one direct current (DC) voltage level to another DC voltage level. Examples of such switching DC-DC converters include but are not limited to a boost converter, a buck converter, a buck-boost converter, an inverting buck-boost converter, and other types of switching DC-DC converters. Thus, using a power converter, a DC voltage such as that provided by a battery may be converted to another DC voltage used to power the power amplifier. A power converter may be used to provide supply voltage rails to one or more components in a device. A power converter may also be used in other applications besides driving audio transducers, such as driving haptic actuators or other electrical or electronic loads. Further, a power converter may also be used in charging a battery from a source of electrical energy (e.g., an AC-to-DC adapter).
One type of power converter is known as a multi-level power converter. Multi-level power converters may offer many benefits compared to conventional two-level converters, such as the capability of generating higher output voltages with lower voltage-rated switches and capacitors, as well as producing smoother output voltage waveforms by using more voltage levels and advanced modulation techniques. However, despite their advantages, multi-level power converters have disadvantages. For example, in a 3-level inductive power converter which uses n-channel metal-oxide semiconductor field-effect transistors as switches, some of the switches may require floating supply voltages to recharge nodes intermediate to the switches in order to ensure actuation of the switches. Such voltage bootstrapping of intermediate nodes may present challenges.
In accordance with the teachings of the present disclosure, one or more disadvantages and problems associated with operation of multi-level converters at low load conditions may be reduced or eliminated.
In accordance with embodiments of the present disclosure, a multi-level power converter configured to receive a power supply and generate an inductor current may include a first switch coupled to a first capacitor, a second switch coupled to a second capacitor, a third switch coupled to a third capacitor, a fourth switch, an inductor coupled to a switch node between the second switch and the third switch, and a flying capacitor having a first terminal coupled to a first node between the first switch and the second switch and a second terminal coupled to a second node between the third switch and the fourth switch, wherein the second capacitor is configured to share charge with at least one of the first capacitor and the third capacitor to enable non-gate terminals of at least one of the first switch, the second switch, and the third switch to replenish with charge at or approximate to a duty cycle extreme of the multi-level power converter.
In accordance with these and other embodiments of the present disclosure, a method may be provided in a multi-level power converter configured to receive a power supply and generate an inductor current, wherein the multi-level power converter comprises a first switch coupled to a first capacitor, a second switch coupled to a second capacitor, a third switch coupled to a third capacitor, a fourth switch, an inductor coupled to a switch node between the second switch and the third switch, and a flying capacitor having a first terminal coupled to a first node between the first switch and the second switch and a second terminal coupled to a second node between the third switch and the fourth switch. The method may include configuring the second capacitor to share charge with at least one of the first capacitor and the third capacitor to enable non-gate terminals of at least one of the first switch, the second switch, and the third switch to replenish with charge at or approximate to a duty cycle extreme of the multi-level power converter.
Technical advantages of the present disclosure may be readily apparent to one skilled in the art from the figures, description and claims included herein. The objects and advantages of the embodiments will be realized and achieved at least by the elements, features, and combinations particularly pointed out in the claims.
It is to be understood that both the foregoing general description and the following detailed description are examples and explanatory and are not restrictive of the claims set forth in this disclosure.
A more complete understanding of the present embodiments and advantages thereof may be acquired by referring to the following description taken in conjunction with the accompanying drawings, in which like reference numbers indicate like features, and wherein:
One type of power converter often used in electronic circuits is a 3-level power converter.
In operation, switches 106 may be controlled to regulate output voltage VOUT to a desired target voltage. As shown in
Further, as shown in
The acronyms VS, VCS, GS, and GCS stand for the path of current in each of the respective configurations, wherein “V” stands for the voltage supply, “C” stands for flying capacitor 104, “S” stands for the switching node, and “G” stands for ground voltage.
For the purposes of clarity and exposition, no bootstrapping circuit is shown in
As shown in
In operation:
Notably, at low duty cycles (e.g., a duty cycle of approximately 0) of analog power stage 101, the GS configuration may dominate switching. At a duty cycle of approximately 0.25, switching may be split between approximately 50% of the time in the GS configuration and the other 50% of the time between the GCS and VCS configurations. At a duty cycle of approximately 0.75, switching may be split between approximately 50% of the time in the VS configuration and the other 50% of the time between the GCS and VCS configurations. At high duty cycles (e.g., a duty cycle of approximately 1), the VS configuration may dominate switching.
However, at a duty cycle of approximately 0.5, the GCS and VCS configurations may dominate switching. As a result, at a duty cycle of approximately 0.5, both non-gate terminals of switch 106b may not be reliably recharged due to very short periods of times in either of the VS or GS configurations.
As described in greater detail below, bootstrapping circuit 400 may, unlike bootstrapping circuit 300, provide for reliable recharging of switch 106b at duty cycles of approximately 0.5.
As shown in
Similarly, the intermediate node of switches 106c and 106d (i.e., the electrical node of the second terminal of flying capacitor 104) may be coupled via a bootstrap capacitor 404c and a recharge switch 406d to a supply-referenced voltage VDDHV, with an anode of a body diode 408d of recharge switch 406d coupled to bootstrap capacitor 404d and a cathode of body diode 408d coupled to supply-referenced voltage VDDHV. Activation and deactivation of recharge switch 406d may be controlled by a delayed version of switch control signal S4_EN buffered by buffer 410d.
As also shown in
The intermediate node of switches 106c and 106d may be coupled via a bootstrap capacitor 404c to the intermediate node of bootstrap capacitor 404c and recharge switch 406d. A body diode 408c of recharge switch 406c may have its anode coupled to bootstrap capacitor 404c and its cathode coupled to bootstrap capacitor 404b. Activation and deactivation of recharge switch 406c may be controlled by a delayed version of switch control signal S3_EN buffered by buffer 410c. Further, activation and deactivation of recharge switch 406d may be controlled by a delayed version of switch control signal S4_EN buffered by buffer 410d.
In operation:
Accordingly, the systems and methods described herein provide a 3-level converter power stage (e.g., analog power stage 101) configured to receiving a power supply (e.g., input voltage VIN) and generate an inductor current (e.g., power inductor current IL). The 3-level converter power stage may have a first switch (e.g., switch 106a) coupled to a first capacitor (e.g., bootstrap capacitor 404a), a second switch (e.g., switch 106b) coupled to a second capacitor (e.g., bootstrap capacitor 404b), a third switch (e.g., switch 106c) coupled to a third capacitor (e.g., bootstrap capacitor 404c), and a fourth switch (e.g., switch 106d). The 3-level converter power stage may also have an inductor (e.g., power inductor 102) coupled to a switch node (e.g., node having voltage LX) between the second switch and the third switch and a flying capacitor (e.g., flying capacitor 104) having a first terminal coupled between the first switch and the second switch and a second terminal coupled between the third switch and the fourth switch. The second capacitor may share charge with at least one or more of the first and third capacitors so that non-gate terminals of at least one or more of the first switch, the second switch, and the third switch are able to replenish with charge at or close to a duty cycle extreme. For example, a duty cycle extreme may be a fifty percent duty cycle. As another example, a duty cycle extreme may be approximately a one hundred percent duty cycle. As a further example, a duty cycle extreme may be approximately a zero percent duty cycle. The second capacitor may share charge with both the first and third capacitors so that non-gate terminals of the first switch, the second switch, and the third switch all replenish with charge at or close to the duty cycle extreme.
As used herein, when two or more elements are referred to as “coupled” to one another, such term indicates that such two or more elements are in electronic communication or mechanical communication, as applicable, whether connected indirectly or directly, with or without intervening elements.
This disclosure encompasses all changes, substitutions, variations, alterations, and modifications to the example embodiments herein that a person having ordinary skill in the art would comprehend. Similarly, where appropriate, the appended claims encompass all changes, substitutions, variations, alterations, and modifications to the example embodiments herein that a person having ordinary skill in the art would comprehend. Moreover, reference in the appended claims to an apparatus or system or a component of an apparatus or system being adapted to, arranged to, capable of, configured to, enabled to, operable to, or operative to perform a particular function encompasses that apparatus, system, or component, whether or not it or that particular function is activated, turned on, or unlocked, as long as that apparatus, system, or component is so adapted, arranged, capable, configured, enabled, operable, or operative. Accordingly, modifications, additions, or omissions may be made to the systems, apparatuses, and methods described herein without departing from the scope of the disclosure. For example, the components of the systems and apparatuses may be integrated or separated. Moreover, the operations of the systems and apparatuses disclosed herein may be performed by more, fewer, or other components and the methods described may include more, fewer, or other steps. Additionally, steps may be performed in any suitable order. As used in this document, “each” refers to each member of a set or each member of a subset of a set.
Although exemplary embodiments are illustrated in the figures and described below, the principles of the present disclosure may be implemented using any number of techniques, whether currently known or not. The present disclosure should in no way be limited to the exemplary implementations and techniques illustrated in the drawings and described above.
Unless otherwise specifically noted, articles depicted in the drawings are not necessarily drawn to scale.
All examples and conditional language recited herein are intended for pedagogical objects to aid the reader in understanding the disclosure and the concepts contributed by the inventor to furthering the art, and are construed as being without limitation to such specifically recited examples and conditions. Although embodiments of the present disclosure have been described in detail, it should be understood that various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the disclosure.
Although specific advantages have been enumerated above, various embodiments may include some, none, or all of the enumerated advantages. Additionally, other technical advantages may become readily apparent to one of ordinary skill in the art after review of the foregoing figures and description.
To aid the Patent Office and any readers of any patent issued on this application in interpreting the claims appended hereto, applicants wish to note that they do not intend any of the appended claims or claim elements to invoke 35 U.S.C. § 112(f) unless the words “means for” or “step for” are explicitly used in the particular claim.
The present disclosure claims priority to U.S. Provisional Patent Application No. 63/497,281, filed Apr. 20, 2023, which is incorporated by reference herein in its entirety.
| Number | Date | Country | |
|---|---|---|---|
| 63497281 | Apr 2023 | US |
