1. Field of the Invention
This invention relates generally to the field of photovoltaic arrays, and more particularly to disconnecting a photovoltaic panel from a bus that couples the photovoltaic panels in a photovoltaic array.
2. Description of the Related Art
Photovoltaic arrays (more commonly known and referred to as solar arrays) are a linked collection of solar panels, which typically consist of multiple interconnected solar cells. The modularity of solar panels facilitates the configuration of solar (panel) arrays to supply current to a wide variety of different loads. The solar cells convert solar energy into direct current electricity via the photovoltaic effect, in which electrons in the solar cells are transferred between different bands (i.e. from the valence to conduction bands) within the material of the solar cell upon exposure to radiation of sufficient energy, resulting in the buildup of a voltage between two electrodes. The power produced by a single solar panel is rarely sufficient to meet the most common power requirements (e.g. in a home or business setting), which is why the panels are linked together to form an array. Most solar arrays use an inverter to convert the DC power produced by the linked panels into alternating current that can be used to power lights, motors, and other loads.
The various solar array designs typically fall into one of two configurations, a low-voltage configuration when the required nominal voltage is not that high, and a high-voltage configuration when a high nominal voltage is required. The first configuration features arrays in which the solar panels are parallel-connected. The second configuration features solar panels first connected in series to obtain the desired high DC voltage, with the individual series-connected panel strings coupled in parallel to allow the system to produce more current. Various problems have been associated with both configurations, with the most prolific array configuration being the high-voltage series-string based configuration. The series-string configuration raises the overall distribution DC-bus voltage level to reduce resistive losses. However, in doing so it increases panel mismatch losses by virtue of the series-string being limited by the weakest panel in the string. In addition, the resultant DC-bus voltage has a significant temperature and load variance that makes inversion from DC to AC more difficult. There may also be instances when it becomes desirable to disconnect a panel from the series, whether due to faulty operation or other considerations. While sometimes a disconnect mechanism may be implemented in more costly control modules connected to each panel, there are many applications and systems where these costly control modules may not be required or might not be financially feasible, while an efficient and reliable disconnect mechanism might still be essential.
Many other problems and disadvantages of the prior art will become apparent to one skilled in the art after comparing such prior art with the present invention as described herein.
Various embodiments of an interface circuit, or module for connecting and disconnecting a photovoltaic (PV) panel to and from a string of PV panels use a semiconductor-switched panel-level connect/disconnect, or engage/disengage mechanism, in which a single power MOSFET is used as the switching element to connect and disconnect, or engage and disengage the PV panel to and from the string. The interface circuit does not require but is fully compatible with any dynamic switching circuitry that may be included in an optimizer or DC/DC switching converter used in some PV array systems. The disconnect mechanism may use low voltage detection, triggering a switch disconnect to prevent the switching device (e.g. the power MOSFET) from ever entering and remaining in the linear operating region for more than a specified brief period of time, during which no considerable power is dissipated long enough to cause malfunction or damage to the circuitry.
The interface circuit may feature a latching arrangement paired with low-voltage detection to disconnect/disengage (or turn off) the power switching device (e.g. power MOSFET), and hold the switching device in the off position until a control signal from a microcontroller, timer or any suitable control circuit re-checks the connection to determine if conditions have improved, and the panel voltage, i.e. the output voltage provided by the PV panel has returned to a stable, usable value. The control of the switching state of the power switch may be programmable, and may be integrated with a remote command for disconnecting the switch. The switch disconnect may also be integrated within a mesh communications network connected to external sensors for additional detection functions, such as arc-fault, fire-detection, ground-fault, locally controlled red-button command shut-down, remotely commanded shut-down, etc. The interface circuit may therefore be automatically engaged to disconnect the PV panel when any one or more of a number of conditions make it desirable or necessary to do so.
A module for engaging and disengaging a PV panel situated in a string of PV panels may therefore include a first circuit to detect when a panel voltage provided by the PV panel drops below a specified level, and may further include a second circuit with a power switching device that controllably engages the PV panel to provide power to the string of PV panels and controllably disengages the PV panel to stop the PV panel from providing power to the string of PV panels. The second circuit may cause the power switching device to disengage the PV panel from the string of PV panels responsive to the first circuit detecting that the panel voltage has dropped below the specified level, and may prevent the power switching device from operating in a linear region for longer than a limited time duration regardless of a level of the panel voltage. In some embodiments, the second circuit may prevent the power switching device from operating in a linear region to prevent excess energy dissipation. For example, the power switching device may operate in the linear no longer than a specified time period that would result in at most a few hundred watt-seconds of energy being dissipated.
The first circuit may include a first comparator having a first input receiving a first control voltage derived from the panel voltage, and further having a second input receiving a first reference voltage. An output of the first comparator may indicate when the panel voltage drops below the specified level by changing states when a level of the first control voltage drops below a level of the first reference voltage. The second circuit may include a second comparator having a first input receiving a second control voltage derived from a voltage at the output of the first comparator, the second comparator also having a second input receiving a second reference voltage. An output of the second comparator may cause the power switching device to disengage the PV panel from the string of PV panels by changing states when a level of the second control voltage rises above a level of the second reference voltage. In one embodiment, the first comparator and the second comparator are powered by a supply voltage having a lower value than a minimum voltage required to turn on the power switching device. The second circuit may also include a divider circuit to sense a voltage across two channel terminals of the power switching device, where the second control voltage is further derived from the voltage sensed across the two channel terminals of the power switching device. The divider circuit may cause the power switching device to keep the PV panel disengaged from the string of PV panels by holding the level of the second control voltage above the level of the second reference voltage, responsive to the power switching device disengaging the PV panel from the string of PV panels.
In some embodiments, a circuit may be used for coupling and decoupling a PV panel to and from a bus connecting together a string of PV panels that includes the PV panel. The circuit may include a detection circuit to detect when a panel voltage provided by the PV panel drops below a specified level, and may also include a latching-switching circuit with a power switching device that may controllably establish, between the PV panel and the bus, a current path that includes the power switching device, and may also controllably disable that current path. The latching-switching circuit may operate to cause the power switching device to disable the current path responsive to the detection circuit detecting that the panel voltage has dropped below the specified level, and may prevent the power switching device from operating in a linear region for longer than a limited time duration regardless of a level of the panel voltage. The latching-switching circuit may prevent the power switching device from operating in the linear region by allowing the power switching device to remain turned on when the panel voltage is not below the specified level, and keeping the power switching device turned off when the panel voltage is below the specified level. In one embodiment, the power switching device is a power MOSFET.
The detection circuit may include a first device having an input to receive a first control voltage derived from the panel voltage, and further having an output that changes states when a level of the first control voltage drops below a first reference voltage level, indicative that the panel voltage has dropped below the specified level. The circuit may further include a first voltage divider circuit to generate the first control voltage by dividing down the panel voltage. In addition, the latching-switching circuit may also include a second device having an input to receive a second control voltage derived from a voltage developed at the output of the first device, and further having an output to turn off the power switching device by changing states responsive to a level of the second control voltage rising above a second reference voltage level. The first device and the second device may receive a supply voltage having a lower value than a minimum voltage required to turn on the power switching device.
In one embodiment, the latching-switching circuit also includes a divider circuit to sense a voltage across two channel terminals of the power switching device, with the second control voltage further derived from the voltage sensed across the two channel terminals of the power switching device. The divider circuit may be operated to cause the power switching device to prevent re-establishing the current path by holding the level of the second control voltage above the second reference voltage level responsive to the power switching device disabling the current path. The circuit may further include a transistor device having a built-in body-diode from a first channel terminal to a second channel terminal of the transistor device, with the first channel terminal coupled to the output of the first device and the second channel terminal coupled to the input of the second device, where a voltage at the output of the first device rising to a level commensurate with a supply voltage powering the first device and the second device causes the body diode of the transistor device to conduct, raising the second control voltage to a level approaching a specified value lower than the supply voltage.
The foregoing, as well as other objects, features, and advantages of this invention may be more completely understood by reference to the following detailed description when read together with the accompanying drawings in which:
a shows an example of a series-string solar array configuration retrofitted with interface modules (which may include DC/DC converters and/or circuitry to engage/disengage a PV panel from the string) attached to the solar panels;
b shows an example of a parallel-string (parallel connected) solar array configuration with interface modules attached to the solar panels;
While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described in detail. It should be understood, however, that the drawings and detailed description thereto are not intended to limit the invention to the particular form disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the present invention as defined by the appended claims. Note, the headings are for organizational purposes only and are not meant to be used to limit or interpret the description or claims. Furthermore, note that the word “may” is used throughout this application in a permissive sense (i.e., having the potential to, being able to), not a mandatory sense (i.e., must).” The term “include”, and derivations thereof, mean “including, but not limited to”. The term “connected” means “directly or indirectly connected”, and the term “coupled” means “directly or indirectly connected”.
In solar array systems, many non-idealities may be mitigated by utilizing distributed Maximum Power Point Tracking (MPPT). Distributed MPPT usually includes insertion of a DC/DC converter or a similar power converter behind solar panels in the array, most commonly behind each and every solar panel in the array, to adapt the coupled solar panel's power transfer onto a high-voltage bus (typically a high-voltage DC bus) which connects the panels together via the DC/DC converters. A typical solar array 100 is shown in
An example of the V/I (voltage/current) characteristic for each solar panel is shown in
a shows one embodiment of a system 200 featuring solar panel series-strings 202, 204, and 206, with each of solar panels 202, 204, and 206 coupled to a respective interface module of interface modules 203, 205, and 207, respectively. The interface module may be a power converter unit, which may include a control unit and a power converter controlled by the control unit, and providing a voltage for the respective bus to which the given string is coupled, with the buses coupling to bus 208 in parallel as shown. Thus, respective outputs of the power converters and controllers 203 are series coupled to high voltage DC bus for String S, the respective outputs of the power converters and controllers 205 are series coupled to high voltage DC bus for String S-1, and the respective outputs of the power converters and controllers 207 are series coupled to high voltage DC bus for String F, with the three buses parallel coupled to high voltage DC bus 208. Inverter 110 may be coupled to bus 208 in system 200, to drive a connected load(s). For the sake of clarity, each power converter and controller will be referred to herein simply as a “converter unit”, with the understanding that each converter unit may include a power converter, e.g. a DC/DC switching converter, and all associated control circuitry/unit, e.g. functional units to perform MPPT. Each of the attached converter units 204 may be designed to execute a control algorithm, which may exercise control over a switching power conversion stage.
In alternate embodiments, the respective outputs of the power converters and controllers 204 may be parallel coupled to high voltage DC bus 208, which may be coupled to high voltage DC bus 206.
As previously mentioned, there may be cases where some or all panels in an array, for example in system 200, may not be coupled to a power controller unit, or the solar array may be constructed as system 100 shown in
As mentioned above, one solution to providing a connect/disconnect mechanism is to place an interface module at the output of the PV panel, and operate the interface module to connect and disconnect the PV panel. One embodiment of a simple interface circuit that may operate to connect and disconnect the PV panel from the string is shown in
In order to switch (or turn) on an NMOS power FET such as power MOSFET 254, a gate voltage of specified value, typically greater than 5V, is applied to the gate. In most practical applications this voltage may be typically greater than 7V, preferably 10V, in order to achieve good MOSFET channel conductivity and minimal ‘on’ resistance. The gate threshold for a medium- to high-voltage NMOS power FET is typically in the 3V to 4V range, and thus the device begins to conduct heavily in this range. In circuit 400, the gate voltage for power MOSFET 254 is expected to be supplied by the attached PV module (as the panel voltage Vpanel generated by the PV panel), and since a PV module/panel normally operates at an optimal voltage of ˜20-50 volts, this does not present a problem under normal operating conditions. Therefore, a simple resistive connection (through resistance 258) to the positive terminal ‘A’, with a Zener clamp 252 coupled as shown, and clamping at a designated value, e.g. at ˜10V, is sufficient to supply the gate connection to power MOSFET 254. A simple low voltage FET 250 may then be used to pull-down this resistive gate terminal to shut off FET 254, when a ‘disconnect’ signal is asserted to the gate of FET 250.
Circuit 400 may operate well under certain conditions, and when power MOSFET 254 is turned on, circuit 400 may operate to connect the PV module/panel to the string. Conversely, circuit 400 may operate to disconnect the PV module/panel from the string, by opening the circuit connection between terminals ‘B’ and ‘C’ by turning off MOSFET 254. However, since power MOSFET 254 is a nonlinear analog device, albeit with a reasonably high gain, and not a truly digital switch (i.e. not an ideal switch), there are cases in which operation of circuit 400 may lead to a failure of the system (e.g. a failure of a system such as system 100 shown in
One example of a system failure while using interface circuit 400 as a disconnect circuit will now be considered. During normal operation, when power MOSFET 254 is turned on, the attached PV panel is connected to the string. However, if the attached PV module/panel becomes sufficiently weak compared to others in the string (for example when it is overshadowed and thus fails to receive the expected amount of light), the voltage (Vpanel) of the PV module may collapse as the PV panel attempts to supply the string current. To put it another way, due to impairment, such as the absence of sufficient light energy received by the PV panel, the capability of the attached PV module is reduced, and in an attempt to still provide the expected energy in form of the expected panel current, the panel voltage of the PV panel may collapse. In such a case, the panel voltage Vpanel provided by the attached PV module/panel may collapse toward zero volts. In some cases, Vpanel may actually drop all the way down to zero volts (0V).
As the value of Vpanel crosses through the FET threshold voltage, (the voltage needed to turn on MOSFET 254, e.g. ˜4V) while the voltage Vpanel is decreasing, power MOSFET 254 turns off, which disconnects the PV module/panel from the string. Once power MOSFET 254 has been disconnected, current can no longer flow from the attached PV module/panel, and thus the voltage Vpanel begins to increase, which again turns power MOSFET 254 back on. This produces negative feedback behavior, causing circuit 400 to operate as a negative feedback system, which either oscillates around the MOSFET threshold voltage (e.g. ˜4V), or stabilizes at a fixed voltage value commensurate with that threshold voltage. When the gate voltage (Vg) of MOSFET device 254 stabilizes at around the threshold voltage (˜4V), the drain-source voltage (Vds, or Vd) also stabilizes at a voltage value that is within the range of the threshold voltage, resulting in power MOSFET 254 beginning to operate in the linear region, and not being fully switched on. In this state (i.e. when operating in the linear region), the power dissipated in power MOSFET 254 is ‘V*I’, i.e. ‘Vds*Ids’, with Ids representing the drain-source current. For example, if the value of Ids is 6 A, and Vds has a value of 4V, power MOSFET 254 may be dissipating 24 Watts. Such power dissipation may be sufficient to cause overheating in circuit 400 to the point of various components and/or solder traces within the device/circuit 400 melting down.
This behavior is illustrated in the signal diagrams of
As seen in
The node where voltage Vtt is developed is connected across the drain-source terminals of MOSFET 314 (or looking at it another way, across terminals ‘C’ & ‘B’, respectively, or looking at it yet another way, between voltage values Vds and GND, respectively) via a second resistive voltage divider that includes resistors 320 and 322.
The second voltage divider circuit effectively forms a drain voltage sense circuit at node Vtt. If Vtrip is low, and transistor device 308 is turned off with its body-diode reverse biased, the voltage at terminal ‘C’ (Vds) operates to set the voltage value of Vtt via the second divider circuit alone. In other words, if Vtrip is low, the value of voltage Vtt is determined by the second voltage divider circuit, based on the value of Vds. If the main power MOSFET 314 is turned off and disconnected, Vds resides at a positive voltage level, setting Vtt to a corresponding voltage level determined by the second voltage divider. On the other hand, if MOSFET 314 is turned on, there is a near-zero voltage drop across the drain and source terminals of MOSFET 314 (i.e. between terminals ‘B’ and ‘C’), resulting in Vtt residing at a near-zero or zero voltage level.
In the above case, when Vtt is equal to zero, the voltage Vpanel supplies current into the clamped comparator 352, which has its open-drain/collector configured output coupled to Vpanel through resistor 316, as previously indicated. In this state, the clamped voltage at the output of comparator 352 is set by zener diode 312, providing a gate voltage (Vg) level high enough to turn on power MOSFET 314. In one set of embodiments, for a 4.5V threshold voltage for MOSFET 314, circuit 500 may be designed to obtain a Vg of approximately 10V for the scenario described above. Comparator 352 may be designed to have a threshold voltage VTH2 of ˜1.5V for this example. Thus, in the state described above, power MOSFET 314 is turned on, and power is provided by the attached PV module/panel to the output ports (at terminals ‘A’ and ‘C’) of circuit 500.
However, when Vpanel drops to a value (e.g. below ˜12.5V) such that the voltage at the positive input terminal of comparator 350 (node 303) falls below VTH1, comparator 350 trips, and the node voltage Vtrip rises to Vdd (which may be specified to have a value of 3.3V in some embodiments). Vtrip rising to Vdd causes the body-diode of transistor device 308 to conduct, raising the node voltage Vtt to a level approaching a value slightly under Vdd, which results in node voltage Vtt exceeding the threshold voltage VTH2 of comparator 352 (where VTH2 is specified to be lower than Vdd). For example, if VTH2 is specified to be ˜1.5V, Vtt exceeds VTH2 as it crosses ˜1.5V. This causes the voltage at the output comparator 352 to fall to GND, thereby pulling Vg to GND, which turns off power MOSFET 314.
When MOSFET 314 turns off, Vds (which may be connected to an active string) rises to a sufficiently high voltage to hold node Vtt at a level above the comparator 352 threshold voltage of VTH2. The values of resistors 320 and 322 in the second voltage divider circuit may be specified such that this latching effect occurs at voltages greater than a certain specified value of voltage Vds at node ‘C’. More specifically, this specified voltage value for Vds may correspond to a value marginally less than the panel trip voltage associated with Vpanel as previously described. To put it another way, the values of resistors 320 and 322 in the second voltage divider circuit may be specified such that the latching effect occurs at a voltage somewhat less than the value of Vpanel that causes the voltage at node 303 to fall below VTH1. For example, if the panel trip voltage associated with Vpanel is i around 12.5V, the specified voltage value for Vds at which the latching occurs may be 10V, and the values of resistors 320 and 322 may therefore be specified to have the latching occur at values of Vds around 10V. Once the latching is in effect, power MOSFET 314 remains turned off, and circuit 500 operates to keep the PV panel disengaged from the string.
To turn power MOSFET 314 back on, that is, to attempt to reconnect the PV panel to the string, the ‘connect-check’ signal applied to the gate of FET 308 may be asserted. If the state of the comparator 350 indicates that the value of Vpanel is i greater than the panel trip voltage, that is, the voltage at node 303 is greater than VTH1, and thus Vtrip is low, then Vtt is pulled low when transistor device 308 is conducting, and the latching effect is eliminated. This results in the output of comparator 352 switching from a low to a high output value, raising gate voltage Vg, and turning on power MOSFET 314, and holding it in the ‘on’ state. The latching voltage detect at Vpanel may be designed to guarantee that sufficient gate-drive is always available to maintain the power MOSFET 314 in a fully ‘on’ state, thereby preventing power MOSFET 314 from operating in the linear operating region for any extended period of time. More specifically, any time MOSFET 314 begins operating in the linear operating region, it may be controlled to exit the linear operating region within a specific period of time, where the specific period of time corresponds to a specified (upper bound) level of energy dissipated by the system. That is, MOSFET 314 may be controlled to never operate in the linear operating region long enough for the energy dissipated by the system to rise over a specified energy level. To put it yet another way, MOSFET 314 may be controlled to exit the linear operating region (should it have entered the linear operating region for any reason) before the energy dissipated by the system rises over a specified level. In one set of embodiments, this energy level may be specified as at most a few hundred Watt-Seconds (Joules).
To controllably flip the state of POWER FET 314 to a “disconnected” state even when Vpanel is i at a normal operating value, it is sufficient to pull-down the gate voltage Vg to a sufficiently low value (below the threshold voltage VTH of power MOSFET 314) to turn off power MOSFET 314, and the latching comparator 352 will re-latch in the ‘off’ state due to the rise in voltage at node VoNeg coupled with the effect of the second voltage divider circuit, as previously described. If the control wiring on the ‘disconnect’ signal applied to the gate of transistor device 310 is pulled high to Vdd (e.g. 3.3V), and the ‘connect-check signal’ applied to the gate of transistor device 308 is pulled low, then the circuit enters a ‘disconnected’, or ‘disengaged’ operating state. That is, under normal operating conditions, if the ‘disconnect’ signal is pulled high (which may be considered the asserted state) and the ‘connect-check’ signal is pulled low (which may be considered the deasserted state), the PV panel/module is disengaged from the PV string. Conversely, when the ‘disconnect’ signal is pulled low, and a positive pulse is applied at the connect-check node, power MOSFET 314 is turned on, relaying (or coupling) the power from the attached PV module to the string. It should be noted that the preferred default values for the ‘disconnect’ signal and the ‘connect-check’ signal may be specified as desired, based on what the desired normal (default) operating mode of circuit 500 is. For example, in some embodiments, the ‘disconnect’ signal may be pulled low as the default value, and the ‘connect-check’ signal may be pulled high as the default value, for a reverse version of the behavior described above.
As shown above, various embodiments of an interface circuit (or module) for connecting and disconnecting, or engaging and disengaging a PV panel in a series-connected string of PV panels may include a mechanism using a single power MOSFET as the main switching element that connects (couples) and disconnects (decouples) the PV panel to and from the string of PV panels. The switching element may be controllably operated to engage the PV panel to have the PV panel provide power to the PV string, and disengage the PV panel to prevent the PV panel from providing power to the PV string. In this sense, engaging the PV panel means that the PV panel becomes an operational panel within the string of PV panels and contributes power to the string, while disengaging the PV panel effectively makes the PV string operate without the disengaged PV panel, which doesn't provide any power to the string. The interface circuit doesn't require dynamic switching circuitry, but it is fully compatible with any dynamic switching circuitry that may be present in optimizers or DC/DC switching converters, e.g. converters 203, 205, 207 shown in
The interface circuit(s) or module(s) may feature a latching arrangement (circuitry 362 in
Numerous variations and modifications will become apparent to those skilled in the art once the above disclosure is fully appreciated. It should be noted that the section headings used herein are for organizational purposes only, and are not meant to limit the descriptions provided herein. Numerical values throughout have been provided as examples, and are not meant to limit the descriptions provided herein. Various terms or designations for circuits/components and signals/voltages/currents as they appear herein, for example in such expressions as “switching circuit”, “detection circuit”, “data signal”, “control signal”, “reference voltage”, “control voltage”, etc. are merely names or identifiers used to distinguish among the different circuits/components and/or between different signals, and these terms are not intended to connote any specific meaning, unless specifically noted otherwise.