The disclosure relates to multimode chipsets and, in particular, to voltage supplies powering multimode chipsets.
Modern communications devices may support a plurality of communications standards. For example, a “multi-mode” cellular phone may support a plurality of wireless cellular standards, including GSM and W-CDMA. Although the same circuitry may be shared among multiple modes, the requirements on the circuitry may be different depending on the mode and/or system planning. For example, operation in one mode may demand higher linearity from the transmit (TX) circuitry than operation in another mode. One parameter affecting the linearity of TX circuitry is the level of the voltage supply.
In typical multimode designs, the circuitry is supplied with the highest necessary voltage level for all modes of operation, potentially leading to inefficiently high power consumption for one or more of the modes. It would be desirable to dynamically adjust the voltage supplied to the circuitry or to selected blocks within the circuitry depending on the operating mode.
An aspect of the present disclosure provides an apparatus for supplying a voltage to a transmitter circuit, the circuit processing a signal for transmission over a communications channel, the transmitter circuit comprising a mixer for translating a signal to a higher frequency, the transmitter circuit further comprising an amplifier, the apparatus comprising a voltage generation module for generating a supply voltage for the transmitter circuit, the supply voltage being at a first level during a first phase, and a second level during a second phase, the first level being higher than the second level.
Another aspect of the present disclosure provides a method for supplying a voltage to a transmitter circuit for processing a signal for transmission over a communications channel, the transmitter circuit comprising a mixer for translating a signal to a higher frequency, the transmitter circuit further comprising an amplifier, the method comprising generating a supply voltage for the transmitter circuit, the supply voltage being at a first level during a first phase, and a second level during a second phase, the first level being higher than the second level.
Yet another aspect of the present disclosure provides an apparatus for supplying a voltage to a transmitter circuit for processing a signal for transmission over a communications channel, the transmitter circuit comprising a mixer for translating a signal to a higher frequency, the transmitter circuit further comprising an amplifier, the apparatus comprising means for generating a switchable supply voltage for the transmitter circuit.
Disclosed herein are techniques to allow selection of the voltage level or levels supplied to one or more blocks in a circuit depending on the mode of operation.
Signal 104a is provided to power amplifier (PA) 106. The output signal 106a of the PA 106 is then provided to duplexer and antenna switch 108, which is coupled to an antenna 110.
In
In the embodiment shown in
Note that the present disclosure need not be limited to embodiments supporting dual-mode GSM and W-CDMA. Circuitry supporting any other mode, and any number of modes, may readily be accommodated, e.g., circuitry supporting cdma2000 1x, TD-CDMA, etc. Modifications to the present disclosure to accommodate such circuitry will be clear to one of ordinary skill in the art, and are contemplated to be within the scope of the present disclosure.
In an embodiment, the modulator (mixers 104.1 and 104.2) and the VGA 104.5 are each provided with their own connections to the supply voltage 202a. The switchable output voltage 202a may be provided to both the modulator (mixers 104.1 and 104.2) and the VGA 104.5, or to one of the modulator and the VGA. In an alternative embodiment, to be described later with reference to
Note that the switchable output voltage 202a of the voltage generation module 202 may in general be supplied to any component block within the TX circuitry. In some embodiments, the switchable output voltage 202a may be supplied to those component blocks that directly affect the linearity of the TX signal path. As shown in
Note that V_control may be an analog signal or a digital signal. The specification of the appropriate output voltage level to the voltage generation module 202 may be done in a number of ways. For example, V_control may be a simple logical high or low signal, which the voltage generation module 202 may decode as corresponding to a preset value V_hi or V_lo. Alternatively, V_control may specify the actual voltage level to be output by the regulator, either as an analog voltage level or as a set of digital bits corresponding to a predefined resolution. These embodiments and others will be clear to one of ordinary skill in the art, and are contemplated to be within the scope of the present disclosure.
As described previously, the setting of V_control may depend on the operating mode of the circuitry, e.g., whether the circuitry is operating in GSM mode or in W-CDMA mode. The signal may be generated by software or firmware running on the multimode device, or located separately from the multimode device. For devices supporting more than two modes, V_control can be correspondingly modified to signal the appropriate mode-dependent output voltage level to the voltage generation module 202.
Note according to the present disclosure, V_control need not depend only on the operating mode of the circuitry. In an embodiment, V_control can configure voltage generation module 202 to output a higher or lower voltage whenever such a voltage is deemed advantageous to operation. Any selection of the supply voltage level for a given circuitry block based on any criteria is contemplated to be within the scope of the present disclosure.
Note the embodiments depicted in
Referring back to
In an embodiment (not shown), the DC bias/supply rail 403 is coupled to the switchable supply voltage 202a.
The lower signal path is provided with a surface acoustic wave (SAW) filter 406, which removes out-of-channel emissions from the signal to be transmitted prior to amplification by the power amplifier 106.2. The SAW filter 406 thus allows the noise and/or spectral purity requirements of the rest of the circuitry to be relaxed during the second mode. In accordance with the present disclosure, a lower supply voltage may be supplied to any or all blocks of the TX circuitry during operation in the second mode. In an embodiment, the first mode corresponds to a GSM mode, while the second mode corresponds to a W-CDMA mode.
In an embodiment, the supply voltages 403.1 and 403.2 may also be coupled to the switchable supply voltage according to the present disclosure.
Note the provision of SAW filtering during one of the modes of operation may be done according to other embodiments not shown. For example, a switch may be used to bypass a SAW filter placed between capacitors 405.1 and the PA 106.1 for operation during a first mode. Such modifications will be clear to one of ordinary skill in the art, and are contemplated to be within the scope of the present disclosure.
Based on the teachings described herein, it should be apparent that an aspect disclosed herein may be implemented independently of any other aspects and that two or more of these aspects may be combined in various ways. The techniques described herein may be implemented in hardware, software, firmware, or any combination thereof. If implemented in hardware, the techniques may be realized using digital hardware, analog hardware or a combination thereof. If implemented in software, the techniques may be realized at least in part by a computer-program product that includes a computer readable medium on which one or more instructions or code is stored.
By way of example, and not limitation, such computer-readable media can comprise RAM, such as synchronous dynamic random access memory (SDRAM), read-only memory (ROM), non-volatile random access memory (NVRAM), ROM, electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), FLASH memory, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other tangible medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer.
The instructions or code associated with a computer-readable medium of the computer program product may be executed by a computer, e.g., by one or more processors, such as one or more digital signal processors (DSPs), general purpose microprocessors, ASICs, FPGAs, or other equivalent integrated or discrete logic circuitry.
A number of aspects and examples have been described. However, various modifications to these examples are possible, and the principles presented herein may be applied to other aspects as well. These and other aspects are within the scope of the following claims.
In this specification and in the claims, it will be understood that when an element is referred to as being “connected to” or “coupled to” another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly connected to” or “directly coupled to” another element, there are no intervening elements present.
Number | Name | Date | Kind |
---|---|---|---|
5423078 | Epperson et al. | Jun 1995 | A |
5546051 | Koizumi et al. | Aug 1996 | A |
5774813 | Jokinen | Jun 1998 | A |
5999829 | Chun et al. | Dec 1999 | A |
6137355 | Sevic et al. | Oct 2000 | A |
6819941 | Dening et al. | Nov 2004 | B2 |
20020146993 | Persico et al. | Oct 2002 | A1 |
20040108901 | Apel et al. | Jun 2004 | A1 |
20040246050 | Kikuchi | Dec 2004 | A1 |
20070223615 | Dosanjh et al. | Sep 2007 | A1 |
20070270111 | Pan | Nov 2007 | A1 |
20080057883 | Pan | Mar 2008 | A1 |
Number | Date | Country |
---|---|---|
0673112 | Sep 1995 | EP |
1768269 | Mar 2007 | EP |
6507775 | Sep 1994 | JP |
7250017 | Sep 1995 | JP |
9501300 | Feb 1997 | JP |
2003258563 | Sep 2003 | JP |
2004500730 | Jan 2004 | JP |
2004363867 | Dec 2004 | JP |
2005020476 | Jan 2005 | JP |
WO9318583 | Sep 1993 | WO |
WO9318590 | Sep 1993 | WO |
WO9534121 | Dec 1995 | WO |
WO9963676 | Dec 1999 | WO |
WO0217478 | Feb 2002 | WO |
WO2007018598 | Feb 2007 | WO |
WO2007033264 | Mar 2007 | WO |
Number | Date | Country | |
---|---|---|---|
20090117864 A1 | May 2009 | US |