Claims
- 1. Function generator circuitry for generating functions of two variable signals (x, y) comprising
- a pulse width modulator for generating an output pulse whose width is a function of one variable signal,
- a feedback amplifier circuit including a differential amplifier having a first input terminal and an output terminal, a feedback loop interconnected between said output terminal and said first input terminal and including a first capacitor (C.sub.F) and first switch means for selectively connecting said first capacitor in said feedback loop, and a second capacitor (C) and second switch means for selectively interconnecting said second capacitor between a second variable signal (x) and said first input terminal,
- said pulse width modulator comprising a first resistor (R.sub.T) and a third capacitor (C.sub.T) serially connected between two voltage potentials (V.sub.C, GND) and having a common terminal, third switch means for periodically shorting across said capacitor in response to a clock signal (f), comparator means connected to the common terminal of said first resistor and said third capacitor and to said one variable signal and generating a clocked (f) pulse (.phi.) whose width is a function of comparing voltage at said common terminal and said one variable signal (y),
- said feedback loop including a fourth capacitor (C.sub.I) interconnected between said output terminal and said first input terminal of said differential amplifier; and
- means for controlling in part at least one of said first switch means and said second switch means including means connecting said output pulse from said pulse width modulator to said first switch means and to said second switch means for controlling said first switch means and said second switch means, wherein at least one of said first switch means and said second switch means is controlled in part by said clock signal (f),
- said circuitry performing a multiplication functions as follows:
- v=x*y(C/C.sub.I V.sub.C).
- 2. Function generator circuitry for generating functions of two variable signals (x, y) comprising
- a pulse width modulator for generating an output pulse whose width is a function of one variable signal,
- a feedback amplifier circuit including a differential amplifier having a first input terminal and an output terminal, a feedback loop interconnected between said output terminal and said first input terminal and including a first capacitor (C.sub.F) and a serially connected first resistor (R.sub.F) and first switch means for selectively connecting said first capacitor and first resistor in said feedback loop, and a second capacitor (C) and second switch means for selectively interconnecting said second capacitor between a second variable signal (x) and said first input terminal,
- said pulse width modulator comprising a second resistor (R.sub.T) and a third capacitor (C.sub.T) serially connected between two voltage potentials (V.sub.C, GND) and having a common terminal, third switch means for periodically shorting across said capacitor in repsonse to a clock signal (f), comparator means connected to the common terminal of said first resistor and said third capacitor and to said one variable signal and generating a clocked (f) pulse (.phi.) whose width is a function of comparing voltage at said common terminal and said one variable signal (y),
- said feedback loop including a fourth capacitor (C.sub.I) interconnected between said output terminal and said first input terminal of said differential amplifier; and
- means for controlling in part at least one of said first switch means and said second switch means including means connecting said output pulse from said pulse width modulator to said first switch means and to said second switch means for controlling said first switch means and said second switch means, wherein at least one of said first switch means and said second switch means is controlled in part by said clock signal (f).
- 3. Circuitry as defined by claim 2 wherein a variable pole filter is provided with a gain (G) as follows: ##EQU3## and a 3 dB cut-off frequency as follows:
- f.sub.3 dB =f*c.sub.I /C.sub.F (y/V.sub.C).
- 4. Circuitry as defined by claim 2 wherein a division function is performed as follows:
- V=x/y(V.sub.C C/C.sub.I).
Parent Case Info
This is a continuation of application Ser. No. 548,160 filed Nov. 2, 1983.
US Referenced Citations (6)
Non-Patent Literature Citations (1)
Entry |
Young et al., "MOS Switched-Cap. Analog Sampled-Data Direct-Form Filters", IEEE Journals of Solid State Circuits, vol. SC-14, No. 6, Dec. 1979, pp. 1020-1033. |
Continuations (1)
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Number |
Date |
Country |
Parent |
548160 |
Nov 1983 |
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