Switched current mirror with good matching

Abstract

A current mirror circuit exhibits improved current matching by applying a switching signal to ground path switches in series with transistors in both a reference path and an output path of the current mirror. The switching signal may comprise a high-frequency signal, which may be phase modulated. A plurality of matched, parallel-connected output transistors may be selectively enabled by qualifying the switching signal applied to each corresponding series-connected ground path switches by decoded digital modulation data. In one embodiment, the modulation data is decoded to thermometer-coded representation. In one embodiment, the switching signal path is identical to the reference and output circuits.

Description

BACKGROUND

A current mirror is a well-known circuit designed to copy a current through one active device (such as a transistor) by controlling the current in another active device, keeping the output current constant regardless of loading. The output current may be applied to a different node than the input current, and has a current ratio (with respect to the reference current) set by the ratio of input and output transistors used.

The transistor size ratio, and hence the current ratio, may be altered by connecting a plurality of output transistors in parallel. By adding switches in series with the parallel-connected output transistors, the number of output transistors active in the current mirror at any given moment can be changed by controlling the switches, and in this manner the current ratio can be dynamically controlled. When the switches are controlled by digital signals, the analog output current can be digitally controlled, acting like a Digital to Analog Converter (DAC).

FIG. 1 depicts a current mirror in which the active devices are NMOS transistors M₁ and M₂. Due to R₁, current I₁ flows through the reference transistor M₁, causing a gate-source voltage V_gs1. The gate-source voltage V_gs2 for output NMOS transistor M2 is the same (V_gs1=V_gs2), resulting in current I₂ when the transistor M₄, acting as a switch, is in a conducting state. This occurs when the switch S₁ is in the upper position, placing a high voltage on the gate of M₄. Transistor M₃ in series with reference transistor M₁ also acts as a switch, which is always “on,” as its gate terminal is tied high. When switch S₁ is in the lower position, switch M₄ is non-conducting, or open, causing current I₂ to go to zero. Accordingly, the switch S₁ controls current I₂ to be either proportional to I₁ or zero.

Currents I₁ and I₂ are nearly equal when the reference transistor M₁ and output transistor M₂ have equal layout, and switching transistors M₃ and M₄ are also the same (indeed, M₃ exists only for such path matching, as it is always in an “on” state), and of course R₁=R₂. In this case, if S₁ switches to apply a pulse train on the gate of M₄ having a 50% duty cycle, the current ratio I₂/I₁ is one half (½). Both the frequency and the pulse-width of the switching signal applied to the gate of M₄ will influence this current ratio. Switching speed and pulse-width are influenced by product junction temperature and by production process spread, which cause an unacceptably large spread on the output current I₂. Some of this spread can be compensated by a feedback system. However, measuring a high-frequency switching signal has limited accuracy, limiting the performance of such a feedback system.

SUMMARY

A current mirror circuit exhibits improved current matching by applying a switching signal to ground path switches in series with transistors in both a reference circuit and an output circuit of the current mirror. The switching signal may comprise a high-frequency signal, such as a Radio Frequency (RF) carrier, which may be phase modulated. A plurality of matched, parallel-connected output transistors may be selectively enabled by qualifying the switching signal applied to each corresponding series-connected ground path switch by decoded digital modulation data. In one embodiment, the modulation data is decoded to thermometer-coded representation. In one embodiment, the switching signal path is substantially identical to the reference and output circuits.

One embodiment relates to a high-frequency, modulating current mirror circuit. The circuit includes a reference transistor diode-connected between an output power controller and a switched path to signal ground. The circuit further includes a plurality of output transistors connected in parallel between a common load and independent switched paths to signal ground, wherein the gates of the output transistors are all connected to the gate of the reference transistor. The circuit also includes a high-frequency input operative to receive a high-frequency signal, and a digital decoder operative to receive and decode a digital modulation code. A plurality of logic functions are associated with the plurality of output transistors. Each logic function is operative to receive the high-frequency signal and a bit of the decoded modulation code. The output of each logic function is operative to control the respective ground path switch of an output transistor.

Another embodiment relates to a method of modulating a high-frequency signal in a current mirror circuit. A current through a diode-connected reference transistor is controlled by selectively coupling the transistor to signal ground via a switch controlled by a high-frequency signal. The current through some of a plurality of output transistors connected in parallel and having a common load is selectively controlled by selectively coupling some of the transistors to signal ground via respective switches controlled by the high-frequency signal and a digital modulation code, wherein the gates of the output transistors are all connected to the gate of the reference transistor.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram of a prior art current mirror circuit.

FIG. 2 is a functional schematic diagram of a current mirror circuit according to one embodiment of the present invention.

FIG. 3 is a functional schematic diagram of a current mirror circuit having a plurality of output transistor cells, according to one embodiment of the present invention.

FIG. 4 is a functional schematic diagram of a current mirror circuit having a plurality of output transistor cells and improved matching, according to one embodiment of the present invention.

FIG. 5 is a flow diagram of a method of modulating a high-frequency signal in a current mirror circuit, according to one embodiment of the present invention.

DETAILED DESCRIPTION

FIG. 2 depicts an improved current mirror circuit 10, in which the transistor notation from the prior art circuit of FIG. 1 is retained for clarity of explanation. Note that while the transistors depicted are NMOSFETs, this is not a limitation of the present invention, and other transistor types may be utilized. The current mirror circuit 10 is configured as a Radio Frequency (RF) amplifier. The output power is controlled by a linear power control circuit 12 in the reference circuit, controlling the current I₁ through diode-connected reference transistor M₁ and an associated, series-connected ground path switch M₃. As known in the art, a diode-connected transistor is a transistor having a short circuit between the gate and drain nodes. As in the prior art, the gate connection of output transistor M₂ to reference transistor M₁ causes a gate-source voltage equality (V_gs1=V_gs2), resulting in a proportional current I₂ flowing through the output transistor M₂ and its series-connected ground path switch M₄. An inductive load 14 drives an output signal to an antenna 16.

In the current mirror circuit 10, both ground path switches M₃ and M₄ are controlled by a signal generated from switching control function 18. In general, the switching signal is a high-frequency signal (e.g., RF) with limited rise/fall times and unknown duty cycle, due to variations in temperature, processing, and the like. By applying the switching signal to both the reference circuit ground path switch M₃ and the output circuit ground path switch M₄, matching between the reference current I₁ and output current I₂ is maintained, as variations in the switching signal are applied equally to both sides of the current mirror. When M₂ and M₄ are matched to M₁ and M₃, respectively, and the same switching signal is applied to M₃ and M₄, then I₂=I₁.

In the circuit of FIG. 2, the output current I₂, and hence the current ratio I₂/I₁, can be scaled by altering the effective size of output transistor M₂ relative to reference transistor M₁—such as by connecting two or more output transistors in parallel. By independently switching the parallel output transistors M₂ in and out of the circuit, the current ratio I₂/I₁ can be dynamically controlled. This requires a separate ground path switch M₄ for each parallel-connected output transistor M₂. Aside from the ability to independently enable the output transistors M₂—that is, even for a fixed current ratio configuration—each output transistor M₂ should be connected in series with a ground path switch M₄, as the series resistance of switches M₃ and M₄ influence the mirror matching.

In one embodiment utilizing parallel output transistors, the RF amplifier of FIG. 2 implements a polar modulator, suitable for use in e.g. a Bluetooth® transmitter. In this embodiment, the output circuit 20, comprising an output transistor M2 and series-connected ground path switch M₄, may be replicated and connected in parallel, with the transistors being selectively switched in and out of the output circuit 20 to dynamically vary the current ratio I₂/I₁. In particular, phase information is modulated onto a 2.45 GHz carrier signal, represented by the RF input to the switching control function 18. This RF signal is used to control the switching of all ground path switches M₃, M₄. A binary Amplitude Modulation (AM) code, also input to the switching control function 18, is decoded and separate bits applied to the parallel output ground path switches M₄, along with the phase-modulated RF carrier.

This amplifier circuit is depicted in greater detail in FIG. 3. A linear power control circuit 12 in the reference circuit 19 controls the output power of the signal applied to the load 14 and antenna 16, by controlling the voltage applied to a diode-connected reference transistor M₁. This determines the current I₁ in the reference circuit 19, which is mirrored by currents summing to I₂ in the output circuit 20. The output circuit 20 of the current mirror comprises a plurality of parallel-connected output cells 22 (in one embodiment, 255 output cells 22). Each output cell 22 includes an output transistor M₂ gate-connected to the reference transistor M₁, a series-connected ground path transistor M₄ configured to function as a switch, and a logic function 24 applying a switching signal to the ground path switch M₄.

The output cells 22 are component-matched to each other. Additionally, the output transistor M₂ and ground path switching transistor M₄ are matched to the reference transistor M₁ and ground path switching transistor M₃, respectively. As used herein, component-matched means that the physical size of active features, wire lengths, layout, environment, and the like, of the cells implemented in an integrated circuit (IC) are as closely matched as possible. One known method of component matching is to create a representative circuit, such as an output cell 22, in a library, and “instantiate” or create multiple instances of the same library cell on an IC chip, to create the plurality of actual, component-matched cells 22.

A decoder 26 receives binary AM data, such as in 8-bit bytes. The decoder decodes the 8-bit AM data into, e.g., 255 thermometer-coded bits. One such bit is applied to the logic function 24 of each corresponding output cell 22. A phase-modulated RF carrier signal is applied to the other input of the logic function 24. In one embodiment (e.g., where the decoder 26 output is positive logic), each logic function 24 implements a logical AND between the respective decoded AM bit and the RF carrier signal. In this case, the RF carrier signal is applied to the gate of the ground path switching transistor M₄ in each output cell 22 when the corresponding decoded AM bit is a logical one. The RF carrier signal is also applied to the gate of the ground path switching transistor M₃ in the reference circuit 19. Thus, for each output cell 22 having a corresponding “enabled” decoded AM bit, the current in the cell 22 matches that through the reference transistor M₁. Because the output cells 22 are connected in parallel, these currents sum at the output 14. For each output cell 22 for which the corresponding decoded AM bit is a logical zero, the ground path switch M₄ is open, and no current flows in the cell 22. Thus, the output current applied to the load 14 has an amplitude determined by the digital AM modulation code. In particular, the output current is an integral multiple of the reference current, the multiplier being the number of enabled output cells 22.

Note that the provision of 255 output cells 22, and decoding the 8-bit AM data into a thermometer-coded representation, provides the greatest granularity of control, as amplitude of the sum output current I₂ may assume any of 255 values. However, this is not a limiting feature of the present invention. In other embodiments, a different digital coding or a combination of codes (e.g., a combination of binary and thermometer codes) may be utilized. This may reduce silicon area of the current mirror circuit by providing fewer than 255 output cells 22, with some loss of granularity of control of the output current I₂ amplitude.

FIG. 4 depicts a current mirror amplifier circuit having even greater matching, and hence more stable and predictable output current I₂. In this embodiment, the reference circuit 19 uses the same component-matched cell 22 as the parallel-connected output circuit 20. That is, the reference transistor M₁ and series-connected ground path switching transistor M₃ are not only closely matched to output transistors M₂ and ground path switching transistors M₄, respectively, but they are substantially identical. For example, the cells 22 are preferably instantiations of the same layout cell from a library. Additionally, the cell 22, and hence the reference circuit 19, includes the logic function 24. To enable the reference circuit 19 at all times, one input of the logic function 24 is tied to a static enabling value, such as a logical one in the case of an AND gate. This ensures that the RF switching signal applied to the gate of the reference ground path switching transistor M₃ exactly matches that applied to the ground path switching transistor M₄ of each enabled output cell 22 (e.g., substantially identical propagation delay, fan-out, drive strength, capacitive loading, and the like).

FIG. 5 depicts a method 100 of modulating a high-frequency signal in a current mirror circuit. A high-frequency signal is received (block 102), such as a phase-modulated RF carrier signal. The high-frequency signal is applied to a ground path switch, such as a transistor configured to function as a switch, in series with a reference transistor, to control the current through the reference transistor (block 104). Digital modulation data, such as amplitude modulation data, is received and decoded, such as into thermometer-coded form (block 106). A plurality of output transistors, connected in parallel and each gate-connected to the reference transistor, are selectively enabled by applying a logical function, such as an AND, of the high-frequency signal and the decoded modulation data, to ground path switches, such as transistors configured to function as switches, in series with each output transistor, to control the current through the output transistors (block 108). The currents of the enabled output transistors, each of which is proportional to the current through the reference transistor, are then summed to form a modulated output current.

Current mirror circuits as disclosed herein exhibit superior current matching as compared to prior art current mirrors, without requiring any feedback mechanism. By switching both reference and output circuits of a current mirror with the same or closely related switching signals, variations in the switching signals, such as limited rise/fall times and unknown duty cycle, do not deleteriously affect current matching, as the same effects are realized in each side of the current mirror. By closely matching output cells with each other and with a reference circuit, and selectively enabling output cells via decoded modulation data, embodiments of the present invention realize a modulating amplifier having predictable, stable performance and efficient operation.

Those of skill in the art will readily realize that numerous variations on the inventive concepts taught herein are readily possible, and fall within the scope of the appended claims. For example, the logic function 24 may be implemented by any logic, including AND, NAND, OR, NOR, XOR, or XNOR functions, or combinations thereof, as required or desired, with corresponding logic levels generated by the decoder 26. Furthermore, the decoder 26 may decode modulation data to a representation other than thermometer-coded values. Additionally, while representative circuits herein have utility as amplifiers, it is clear from the disclosure that the same inventive principles could be applied to realize other circuit functionality, such as simple Digital to Analog Conversion (DAC). In general, the present invention may be carried out in other ways than those specifically set forth herein without departing from essential characteristics of the invention. The present embodiments are to be considered in all respects as illustrative and not restrictive, and all changes coming within the meaning and equivalency range of the appended claims are intended to be embraced therein.

Claims

1. A high-frequency, modulating current mirror circuit, comprising: a reference transistor diode-connected between an output power controller and a switched path to signal ground;a plurality of output transistors connected in parallel between a common load and independent switched paths to signal ground, the gates of the output transistors all connected to the gate of the reference transistor;a high-frequency input operative to receive a high-frequency signal;a digital decoder operative to receive and decode a digital modulation code; anda plurality of logic functions corresponding to the plurality of output transistors, each logic function operative to receive the high-frequency signal and a bit of the decoded modulation code, the output of each logic function operative to control the respective ground path switch of an output transistor.

2. The circuit of claim 1 wherein the reference transistor and ground path switch, and each of the plurality of output transistors and ground path switches, are formed as component-matched cells.

3. The circuit of claim 1 wherein each logic function implements a logical AND function.

4. The circuit of claim 1 wherein the high-frequency signal comprises a radio frequency (RF) carrier signal.

5. The circuit of claim 4 wherein the RF carrier signal is phase-modulated.

6. The circuit of claim 1 wherein the digital modulation code comprises amplitude modulation data.

7. The circuit of claim 6 wherein the current mirror circuit implements a polar modulator.

8. The circuit of claim 1 wherein the high-frequency signal is operative to directly control the ground path switch of the reference transistor.

9. The circuit of claim 1 further comprising an additional logic function, implementing the same logic as the plurality of logic functions, operative to receive the high-frequency signal and a static enabling value, the output of the additional logic function operative to control the ground path switch of the reference transistor.

10. The circuit of claim 9 wherein the component-matched cells further include the respective logic functions.

11. The circuit of claim 1 wherein the decoded modulation code is a thermometer code.

12. A method of modulating a high-frequency signal in a current mirror circuit, comprising: controlling a current through a diode-connected reference transistor by selectively coupling the transistor to signal ground via a switch controlled by a high-frequency signal; andselectively controlling the current through one or more of a plurality of output transistors connected in parallel and having a common load by selectively coupling one or more of the transistors to signal ground via respective switches controlled by the high-frequency signal and a digital modulation code, wherein the gates of the output transistors are all connected to the gate of the reference transistor.

13. The method of claim 12 wherein the reference transistor, the output transistors, and their respective ground path switches are formed as component-matched cells.

14. The method of claim 12 wherein selectively controlling the current through some of the output transistors comprises directly controlling the ground path switches with the output of a logical operation applied on the high-frequency signal and digital modulation code.

15. The method of claim 14 wherein the logical operation is a logical AND function.

16. The method of claim 12 further comprising receiving digital modulation data and decoding the data to generate a digital modulation code.

17. The method of claim 16 wherein the digital modulation code is a thermometer code.

18. The method of claim 12 wherein controlling a current through a diode-connected reference transistor by selectively coupling the transistor to signal ground via a switch controlled by a high-frequency signal comprises directly controlling the ground path switch with the high-frequency signal.

19. The method of claim 12 wherein controlling a current through a diode-connected reference transistor by selectively coupling the transistor to signal ground via a switch controlled by a high-frequency signal comprises controlling the ground path switch with the output of the logical operation applied on the high-frequency signal and a static enabling signal.

20. The method of claim 19 wherein the logical operation is a logical AND function and the static enabling signal is a logical “1”.

21. The method of claim 19 wherein the component-matched cells further include circuits implementing the logical operation.

22. The method of claim 12 wherein the high-frequency signal is a phase modulated radio frequency (RF) signal.