The invention relates to a power supply, especially a switching power supply, with an extended hold-up and a method of operation of the power supply.
A capacitor 12 is provided on the output of the PFC stage 8 which has a number of functions. The first function of the capacitor 12 is to reduce the ripple voltage on the output of the PFC stage 8. The ripple voltage is caused by the ac input power on rectifier 6 which produces a 100 Hz ripple on the output of the PFC stage. The capacitor 12 acts as a smoothing capacitor to smooth out the ripple voltage.
Of course, the ripple voltage is produced in turn by a ripple current and so the smoothing capacitor 12 needs to be large enough to conduct the ripple current. Accordingly, the need to carry the ripple current also imposes a minimum requirement on capacitor 12. Moreover, capacitor 12 is usually implemented as an electrolytic capacitor to deliver specific capacitance, and in such electrolytic capacitors the permissible ripple current is a function of frequency. Both the PFC stage 8 and the switching module 10 use high frequency switching which impose significant stress to the capacitor, requiring a minimum capacitance for capacitor 12.
A third factor which is often most important in determining the required size of capacitor 12 is the need for the capacitor 12 to cope with the system's hold-up requirements. In order to assure correct operation of switching module 10, the output voltage of the PFC stage 8 across capacitor 12 needs to be maintained above a minimum value for a short period even after the complete loss of input ac line voltage. To achieve a long hold-up time requires a large capacitor 12.
However, the use of a large capacitor 12 brings with it several problems. Firstly, the dimensions of the capacitor, both in terms of circuit board area and volume can be inconveniently large. Secondly, the use of an electrolytic capacitor often results in limited lifetimes especially as the capacitor is under stress from the ripple and switching currents. Thirdly, the large value of the capacitor 12 brings with it a high inrush current when the device is switched on and the capacitor 12 is charged up. As well as needing a capacitor 12 capable of dealing with the inrush current, the inrush current also stresses other components. Although the inrush current can be reduced with inrush resistor 4, such a resistor drops voltage and causes losses even under normal operation.
It would therefore be beneficial to reduce the required capacitance in a switching power supply.
A proposal has been made for a circuit using two capacitors in EP 0945 968. In this case, a hold-up capacitor is charged from the output capacitor through a limiting resistor.
According to the invention there is provided a circuit according to claim 1:
By charging the hold-up capacitor through winding an additional winding on the magnetic component the energy storage of the capacitor can be optimally utilized. The use of a winding allows the turn ratio of the first winding and the second winding to be selected to generate an optimized voltage across the hold-up capacitor. The hold-up capacitor can accordingly be selected on the basis of maximum energy storage, or maximum energy storage for a given price, and/or on the basis of the best voltage to apply for driving the circuit during the “hold up” phase when the ac supply stops.
The hold-up capacitor has no direct path to the mains. Therefore it is not charged via an inrush current pulse. Secondary inrush can also be significantly reduced.
The hold-up capacitor 34 can be made small due to the optimum, adaptable choice of charging voltage. In particular, the charging voltage of the hold-up capacitor may be restricted to below the voltage at the output capacitor.
Since the hold-up capacitor 34 is not used permanently a cheaper and smaller capacitance can be used without adversely affecting the reliability of the converter.
For a better understanding of the invention, embodiments will now be described, purely by way of example, with reference to the accompanying drawings, in which:
The drawings are schematic and not to scale.
Referring to
An input ac source 2 is connected to full-wave rectifier 6 which outputs a rectified dc signal to high and low side dc lines 20,22. The high side dc line 20 is connected through a boost coil, i.e boost winding 24 and switch 26 to the low side dc line 22. A diode 28 connects the boost winding 24 to high side output terminal 30; low side output terminal 32 is connected to the low side dc line 22. An output capacitor 12 is provided across output terminals 30,32.
These components form a relatively conventional boost converter used as a PFC stage to increase the output voltage on output terminals 30, 32 by switching switch 26 under the control of a controller (not shown). The output voltage on output terminals 30,32 will be referred to as Uout.
To provide additional hold-up, i.e. continued power when the ac input stops, a hold-up capacitor 34 is provided between the low side dc line 22 and a hold-up node 36 which is connected through hold-up switch 38 to the high side dc line 20. In the event of a power failure, hold-up switch 38 is closed to connect the hold-up capacitor 34 across the high and low side dc lines 20,22 to provide additional operating time.
To charge the hold-up capacitor a hold-up winding 40 is connected through charging current limiting resistor 42 and diode 44 across the capacitor 34. The hold-up winding 40 is magnetically coupled to boost winding 24 by being an additional winding on the same core as the boost winding 24.
There are Np turns on the boost winding 24 (the primary) and Ns turns on the hold-up winding 40 (the secondary). The ratio (Ns/Np) is known as the turns ratio. After several line cycles a voltage Uc=(Ns/Np) Uout will be achieved across the hold-up capacitor 34.
If the input voltage drops off, the hold-up switch 38 is closed and the stored energy on the hold-up capacitor 34 is used to maintain the boost operation of the circuit.
The circuit offers considerable advantages over the circuit of
By charging the hold-up capacitor 34 from a secondary winding on the same core, the voltage that the hold-up capacitor can be charged to can be arbitrarily selected simply by selecting a suitable turns ratio. This allows the hold-up capacitor to be selected optimally for the best stored energy for a given price. Moreover, a low cost capacitor with a higher equivalent series resistance (ESR) can be used.
Comparing the circuit with that proposed in EP 945 968, the key difference is that the hold-up capacitor is charged by a winding, not by a resistor in series with the output voltage. This permits the voltage on the capacitor to be selected optimally. In contrast, in EP 945 968, the hold-up capacitor is connected to the output terminals and so can only be charged to the same voltage as the output. Further, note that in EP 945 968 the hold-up capacitor is also connected to the output of the rectifier in the case of failure of input power, so in the case where power is being supplied by the hold-up capacitor the voltage at the input of the boost converter is the same as the output voltage.
A further disadvantage of the circuit proposed in EP 945 968 is that during normal operation the hold-up capacitor is connected to the output terminals, continuously charged through a resistor and discharged through a diode. This can lead to continuing losses in the resistor and diode and lower efficiency.
The embodiments of
The function of this limit resistor 46 will now be explained. In view of the smaller size of output capacitor 12 compared with the
However, in the event of ac line power returning after the hold-up switch 38 has been closed, a much larger capacitance formed by the hold-up capacitor 34 as well as output capacitor 12 will result in a large secondary inrush current in this case. In order to limit the inrush current, especially to the hold-up capacitor 34, the charging current limiting resistor 46 is provided between line 20 and the windinghold-up capacitor 34.
This additional switch can be controlled to optimize the voltage and charging of the hold-up capacitor. In particular, the additional switch 50 allows the hold-up capacitor 34 to be charged to a different voltage to that determined by the output voltage and the turns ratio. This is of particular benefit where the output voltage may vary.
Although the circuit in
The above embodiments all incorporate the hold-up capacitor in the PFC circuit. However, a similar approach may be used with the hold-up capacitor incorporated in a subsequent circuit, for example a secondary converter stage.
In this case, the PFC stage 8 is a conventional PFC stage which feeds a secondary converter stage 70, here a flyback converter, including first winding 60 magnetically coupled to output winding 62, which in turn is coupled by diode 28 to output terminals 30,32 with output capacitor 12 across the output terminals 30,32.
The first winding is connected in series with switch 26 across the high and low side dc lines 64, 66 of the PFC stage 8; a PFC output capacitor 68 is present across these dc lines.
The hold-up capacitor 34 is provided with one side connected to the low side input of the PFC stage and with its other side connected through hold-up switch 38 to the high side input to PFC stage 8. The location of the hold-up capacitor and the way it is charged through a winding ensures that it is not charged and discharged during a normal cycle of the fly-back stage. In an alternative embodiment the hold-up capacitor 34 is connected through hold-up switch 38 to the high side dc line 64 and directly to the low side dc line 66.
To charge the hold-up capacitor 34, hold-up winding 40 is connected through diode 44 and limit resistor 42 across the hold-up capacitor. The hold-up winding is formed of additional windings on the same core as first winding 60 and output winding 62.
In use, the circuit of hold-up winding 40, diode 44 and limit resistor 42 slowly charges the hold-up capacitor 34. As in the embodiments described above, the turns ratio Ns/Np can be adjusted to select the voltage level of the hold-up capacitor 34 for optimal energy storage. Accordingly, this embodiment, like the embodiments above, allow the original output capacitor 12 to be reduced in size since it is no longer providing a hold-up function, only reducing ripple voltage. Its size and value is otherwise only determined by the rms current. If capacitors using an alternative technology are used, such as film capacitors, the maximum allowed output voltage ripple will determine the necessary capacitance value.
Note in particular that using this circuit the voltage on hold-up capacitor 34 can be adapted, by selecting a suitable turns ratio, to minimise hold-up current when hold-up switch 38 is closed.
Similar alternatives to those discussed above with reference to the
Those skilled in the art will realise that the invention can be implemented in many alternative ways. For example,
The secondary converter stage may be, for example, an additional standby converter stage.
The invention can be used in any application using power factor correction circuitry. Applications accordingly include adaptors for information technology power supply, such as laptops, faxes, printers, desktop printers, as well as consumer adaptors, dvd players, mobile telephone chargers and the like.
Number | Date | Country | Kind |
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08106042.8 | Dec 2008 | EP | regional |
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/IB2009/055888 | 12/21/2009 | WO | 00 | 6/24/2011 |