This specification relates to DC-DC converters.
Converters for converting a first DC voltage to a second DC voltage are availing for a wide range of applications. Switched capacitor converters (SCC) are one example. A conventional SCC include multiple flying capacitors and switches. Input and output bulk capacitors are also typically required for power buffering and energy storage. The switches are typically controlled with a certain switching frequency, and multiple switching states are used to transfer power from an input to an output through charging and discharging flying capacitors. A SCC usually has a constant voltage conversion ratio and can support bidirectional power conversion.
Some SCC's also use inductor components to set certain resonant frequencies for switching. By driving the switches at resonant frequencies of the resulting charging and discharging circuits Zero Current Switching (ZCS) can be achieved.
In general, one innovative aspect of the subject matter described in this specification is embodied in a device that includes a plurality of resonant tanks, each resonant tank including at least one resonant inductor and one resonant capacitor and having respective first and second nodes that are connected to respective circuit nodes in a circuit; a plurality of switches, each switch having first and second terminals and an input that receives a control signal that places the switch in either a closed state in which a conduction path is established between the first and second terminals, or an open state in which the conduction path is eliminated between the first and second terminals, and each first terminal and each second terminal connected to a respective circuit node in the circuit; one or more non-resonant capacitors having respective first and second nodes, and wherein each non-resonant capacitor has at least a first node connected to a circuit node formed by a connection of two switches that are each respectively connected to a respective resonant tank; and control logic that generates two or more sets of control signal inputs applied to the inputs of the switches so that for each set of control signals: one or more sub-circuit loops are formed, and wherein the one or more sub-circuit loops for a first set of control signals is different from the one or more sub-circuit loops for a second set of control signals, each of the one or more sub-circuit loops includes one or more of the resonant tanks, and at least one of the sub-circuit loops includes at least one non-resonant capacitor, and each of the one or more non-resonant capacitors facilitates clamping of a voltage across the first and second terminals of the switch when the switch is in an open state.
Another innovative aspect of the subject matter described is embodied in a device that includes a plurality of resonant tanks, each resonant tank including at least one resonant inductor and one resonant capacitor and having respective first and second nodes that are connected to respective circuit nodes in a circuit; a plurality of switches, each switch having first and second terminals and an input that receives a control signal that places the switch in either a closed state in which a conduction path is established between the first and second terminals, or an open state in which the conduction path is eliminated between the first and second terminals, and each first terminal and each second terminal connected to a respective circuit node in the circuit; and control logic that generates two or more sets of control signal inputs applied to the inputs of the switches so that for each set of control signals: at least two sub-circuit loops are formed, and wherein the at least two sub-circuit loops for a first set of control signals are different from the at least two sub-circuit loops for a second set of control signals, and at least one circuit node receives respective currents from at least two resonant tanks that are reversed in polarity with respect to each other such that the respective currents substantially cancel each other.
Particular embodiments of the subject matter described in this specification can be implemented so as to realize one or more of the following advantages. Each individual current conduction sub-circuit loop in a switched tank converter (STC) has an inductive impedance, and each flying capacitor is softly charged and discharged during normal operation due to the di/dt limit of the inductive impedance. This overcomes the inherent weakness of the conventional SCC where large inrush currents can be generated, instantaneously leading to charge redistribution losses, and resulting in high switching losses and high RMS current losses. When the switches of the STC topology have their drain-to-source voltages (Vds) clamped during the OFF state, parasitic ringing between the resonant inductors and switch junction capacitors is eliminated, thereby reducing the stress on each switch. Additionally, benefitting from the resonant operation of the resonant tanks, the switches of the STC can be controlled in a way such that ZCS is achieved, resulting in very low or negligible switching losses and very high efficiencies relative to circuits that do not have ZCS. A precharger-less duty cycle ramp start and intrinsic droop current sharing for parallel operation provide the control simplicity, modularity and scalability.
The details of one or more embodiments of the subject matter described in this specification are set forth in the accompanying drawings and the description below. Other features, aspects, and advantages of the subject matter will become apparent from the description, the drawings, and the claims.
The subject matter of this written description relates to a switched tank converter. The switched tank converter (STC) includes multiple flying resonant tanks, and each resonant tank includes at least one resonant inductor and at least one resonant capacitor. The resonant tanks are each connected to two circuit nodes. The switched tank converter also includes one or more flying non-resonant capacitors, and each non-resonant capacitor has at least a first node connected to a circuit node other than ground. Additionally, multiple switches are connected to the circuit nodes. The switches are driven by a control logic that generates two or more sets of control signal inputs applied to the inputs of the switches. For each set of control signals, one or more sub-circuit loops are formed. Each sub-circuit loop for a first set of control signals is different from each sub-circuit loop for a second set of control signals, and each sub-circuit loop includes one or more of the resonant tanks. At least one of the sub-circuit loops includes at least one non-resonant capacitor. Each of the non-resonant capacitors facilitates clamping of a voltage across the switch when the switch is in an open state. Finally, in some implementations, the control logic generates each set of control signals to cause zero current switching in each of the switches.
The circuit 100 includes a plurality of flying resonant tanks 102 and 104. Each resonant tank includes at least one resonant inductor Lr and one resonant capacitor Cr, and has first and second nodes. In some instances, a resonant inductor in a resonant tank may be a stray inductance of a circuit bearing structure. The circuit 100 also includes one or more flying non-resonant capacitors 106, each with respective first and second nodes. As used in this specification, a non-resonant capacitor is a capacitor that is separate from a resonant tank and does not contribute to the characteristic resonant frequency of the resonant tank itself.
In the example circuit 100, only one non-resonant capacitor 106 is included in the circuit. However, more than one non-resonant capacitor can be used, depending on the topology of the STC circuit. In a particular switching state, each resonant tank can be connected in series or in parallel with a particular non-resonant capacitor, depending on the circuit topology and application. Other example STC circuits will be described with reference to
In the circuit 100 of
A plurality of switches Q1, Q2, Q3, Q4, Q5, Q6, Q7 and Q8 have respective first and second terminals and an input. The input receives a control signal that places the switch in an “off” state in which a conduction path is eliminated between the first and second terminals, or an “on” state in which the conduction path is established between the first and second terminals. In the example of
During operation, the current flow direction in the switches differentiates the switches into two categories—main switches and synchronous-rectifier (SR) switches. For the N-Channel MOSFETs of
In the circuit of
In the circuit of
The sets of control signal inputs applied to the inputs of the switches Q so that two or more respective sub-circuit loops that are different from each other are formed between the STC input node 138 and the STC output node 130. Each sub-circuit loop includes one or more resonant tanks and at least one sub-circuit loops includes one or more non-resonant capacitors. The non-resonant capacitor of the sub-circuit loop also facilitates clamping of a voltage across the terminals of the switch when the switch is in the open state. The sub-circuit loops resulting from the switching operations in the circuit of
In some implementations, the control logic 150 controls the switches such that they are turned on and off at zero current, e.g., zero current switching (ZCS). This ZCS feature reduces switching losses when compared to switching when current is flowing in the switches. Furthermore, the circuit 100 allows larger voltage ripples on the flying resonant capacitors due to the lossless switching feature. Hence, the flying capacitor sizes may be reduced when compared to those that are used in a system that does not have ZCS. In some implementations, the switching may instead occur without ZCS.
The “on” and “off” time of each switching state depends on the resonant frequency of the inductors and flying resonant capacitors involved in that particular switching state. Also, as input and output bulk capacitors and flying non-resonant capacitors usually do not participate in the resonance, such capacitors can reasonably be treated as voltage sources, which have negligible impact to the resonant frequency. Ideally, the “on” time of a switching state equals to half of the sinusoid resonant period of the equivalent LC circuit. In practice, however, because the existence of series resistance introduces some damping to the resonant circuit, the actual “on” time of each switching state can be tuned to deviate slightly from half of the sinusoid resonant time period to achieve ZCS.
As described above, various charge and discharging states can be realized by use of the control logic 150, resulting in different sub-circuit loops.
With reference to
Note that there are dead times between the respective states during which both control input signals S1 and S2 are “off” and all the switches Q of the circuit 100 are in the open state. This third set of control signal inputs accommodate ZCS. In this instance, the first and second sets of control signals, S1 and S2, have respective duty cycles of less than 50%. This dead time is usually minimal to accommodate current reset when all switches are off however, and ZCS can be accomplished with just the first two sets of control signals, by setting the “on” time of S1 (“off” for S2) and the “on” time for S2 (“off” for S1) to approximately half of the sinusoid resonant period of the resonant tanks, as well as accounting for resistive damping in the circuit elements.
The two sub-circuit loop sets 200 and 210 of circuit 100 demonstrate how inductive impedances are seen in each sub-circuit during the different switching states. Each sub-circuit has an LC resonant tank with inductive impedance at high frequency. Therefore, every flying capacitor (both resonant and non-resonant) is softly charged and discharged during normal operation, due to the di/dt limit from inductor. This reduces or eliminates inrush current or charge redistribution losses associated with flying capacitor voltage ripples in conventional SC converters.
In the example of
The timing diagram illustrated in
In the topology illustrated in
In some implementations, at least one of the circuit nodes receives respective currents from at least two resonant tanks that are reversed in polarity with respect to each other such that they tend to cancel each other out such that the non-resonant capacitor connected to that particular circuit node can be very small relative to a non-resonant capacitor that would be required if the currents did not tend to cancel each other out.
The STC of
The parallel STC architecture can also be extended to a variety of applications where high voltage conversion ratios are required, but galvanic isolation is not.
In another configuration, a single or multiple STCs can be connected in parallel in a two-stage point of load (PoL) power conversion architecture. Again, multiple STCs may be used in parallel when a power delivery requirement exceeds the power delivery capability of any one STC.
Although the implementation of the STC has been described in the context of a 4-to-1 topology with full-wave output rectification, the STC can be implemented in multiple other topologies and voltage conversion ratios. Examples of such topologies are illustrated by
Two example circuit diagrams of 2-phase 4-to-1 full-wave output rectification STC topologies are depicted in
The circuit diagram 800 in
A modified circuit diagram of
The circuit diagram 1000 in
While this specification contains many specific implementation details, these should not be construed as limitations on the scope of any inventions or of what may be claimed, but rather as descriptions of features specific to particular embodiments of particular inventions. Certain features that are described in this specification in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or variation of a subcombination.
Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. Moreover, the separation of various system components in the embodiments described above should not be understood as requiring such separation in all embodiments. Particular embodiments of the subject matter have been described. Other embodiments are within the scope of the following claims. In some cases, the actions recited in the claims can be performed in a different order and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results.
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