SWITCHING NODE BASED SENSORLESS MOTOR CONTROL FOR PM MOTOR

Abstract

A circuit for indirectly measuring a sign of a current flowing in an inverter stage coupled to a phase of a motor or indirectly measuring the sign of the voltage induced by a counter Electromotive Force (EMF) in a coil of the phase of the motor, the inverter stage being connected between a power supply and the ground. The circuit includes a gate driver circuit coupled to the inverter stage for alternatively connecting the phase of the motor to the power supply and to ground, the gate driver circuit having a current sign detection circuit, wherein the current sign detection circuit senses the sign of the current flowing in the inverter stage, or the sign of the counter EMF for controlling the commutation of switches in the inverter stage.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram of a system of the present invention having a gate driver for driving a three phase inverter connected to a motor, only one of the three switch legs of the inverter being shown;

FIG. 2 is a graph of current sign detection of the present invention when a current sign mode is enabled;

FIG. 3 is a block diagram of the gate driver of the present invention;

FIG. 4 is a block diagram of a bootstrap diode emulator and a phase sense comparator;

FIG. 4 a is a functional graph of the bootstrap diode emulator and the phase sense comparator;

FIG. 5 is a block diagram of the phase sense comparator;

FIG. 5 a is a functional graph of the phase sense comparator; and

FIG. 6 is a graph of phase voltage sampling of the present invention when a voltage sample mode is enabled;

Claims

1. A circuit for indirectly measuring a sign of a current flowing in an inverter stage coupled to a phase of a motor or induced by a counter Electromotive Force (EMF) in a coil of the phase of the motor, the inverter stage being connected between a power supply and the ground, the circuit comprising: a gate driver circuit coupled to the inverter stage for alternatively connecting the phase of the motor to the power supply and to ground, the gate driver circuit having a current sign detection circuit, wherein the current sign detection circuit senses the sign of the current flowing in the inverter stage for controlling the commutation of switches in the inverter stage.

2. The circuit of claim 1, wherein the current sign detection circuit has a current sign mode wherein the sign of the current is detected and further comprising a voltage sample mode the current sign detection circuit samples a voltage across the coil.

3. The circuit of claim 2, wherein the inverter stage is a half bridge having high- and low-side switches connected in series at a node, the high-side switch being coupled to the power supply and the low-side switch being coupled to ground, the node being coupled to the phase of the motor;

4. The circuit of claim 2, wherein the inverter stage further comprises a rectifier having high- and low-side freewheeling diodes, a cathode of the low-side diode being coupled at the node to an anode of the high-side diode, a cathode of the high-side diode being coupled to the power supply and an anode of the low-side diode being coupled to the ground.

5. The circuit of claim 1, wherein the gate driver circuit compares a voltage of the inverter stage to a threshold and provides an output to the inverter stage, the output varying in accordance with a result of the comparison.

6. The circuit of claim 2, further wherein in the voltage sample mode, the counter EMF is sensed when the current in the coil has decayed to zero.

7. The circuit of claim 3, wherein when driven, the inverter stage introduces a deadtime between turn-OFF of the high-side switch and turn-ON of the low-side switch and between turn-OFF of the low-side switch and turn-ON of the high-side switch to prevent inverter cross conduction.

8. The circuit of claim 7, wherein the deadtime is built into the gate driver.

9. The circuit of claim 8, wherein during the deadtime the inverter stage momentarily remains in a tri-state.

10. The circuit of claim 9, wherein in the current sign mode when the current sign detection circuit is enabled the gate driver output and deadtime insertion are enabled and when the current sign detection circuit is disabled the gate driver output is disabled and the EMF voltage mode is enabled.

11. The circuit of claim 3, wherein current flow in a direction of the motor phase forces the low-side freewheeling diode to turn-ON setting the motor phase voltage at the ground and current flow in a direction of the inverter stage forces the high-side freewheeling diode to turns-ON setting the motor phase voltage at the power supply voltage.

12. The circuit of claim 7, wherein the current sign detection circuit further comprises a phase sense comparator and an output of the phase comparator further controls a bootstrap diode emulator circuit.

13. The circuit of claim 9, wherein when the inverter stage is in tri-state, the current sign detection circuit is disabled allowing the current in the coil to decay to zero and the gate driver circuit allows sampling a state of the motor phase voltage with respect to a fixed threshold,

14. The circuit of claim 13, wherein in a three phase motor when two of the phases are at ground voltage and the motor produces counter EMF in the inverter stage in tri-state, the counter EMF produced voltage is proportional and in phase with the tri-state phase of the counter EMF.

15. The circuit of claim 14, wherein detection of a ground crossings of the motor phase voltage produces a signal that represents the counter EMF zero crossings.

16. The circuit of claim 15, wherein in the voltage sampling mode when the current sign detection circuit is enabled the phase ground crossing detection is enabled and the gate drive outputs are disabled.

17. The circuit of claim 16, wherein the voltage sampling mode is activated by a pulsed sampling signal provided to activate sampling of a motor phase voltage state.

18. The circuit of claim 17, wherein a comparison between the motor phase voltage and a fixed threshold is updated each time the voltage sampling mode is activated.