Patent Application
20100033992
The present invention relates to a switching power supply controller which controls an output voltage by using a switching operation on a DC voltage and supplies the output voltage to a load, and a semiconductor device used for the same.
In the prior art, in order to improve power efficiency in response to lower power consumption, switching power supply controllers have been widely used as the power supplies of home use equipment such as home electrical appliances. The switching power supply controllers have switching power supply control semiconductor devices which control (stabilize) output voltages by using the switching operations of semiconductors (switching elements such as a transistor).
Such a switching power supply controller of the prior art is disclosed in, for example, Japanese Patent Laid-Open No. 2007-166810.
As shown in
As has been discussed, the switching power supply controller disclosed in Japanese Patent Laid-Open No. 2007-166810 keeps constant the output voltage of the controller by controlling the drain current value of the switching element.
However, the switching power supply controller disclosed in Japanese Patent Laid-Open No. 2007-166810 has a problem as will be described below.
In the switching power supply controller shown in
According to the foregoing expression, the inclination increases with the input voltage Vin.
When the operation of the switching element 702 is turned off from the drain current detection circuit 714 of the semiconductor device, a certain delay time tdoff is generated to allow an element in the circuit to have a delay time. Thus the current peak value of the switching element 702 is Vin/L×tdoff which is a current value delayed by tdoff from a current value having been set in the drain current detection circuit 714.
Thus as shown in
Thus considering input voltages worldwide, in the case of a high input voltage, an increase in drain current value causes various phenomena. For example, the ripple voltage of an output terminal increases and the loss of the on resistance of the switching element increases.
Output power to the load changes with fluctuations in ripple voltage. Further, as the loss of on resistance increases, the efficiency of the switching power supply decreases and the self-heating of the switching element increases at a high input voltage.
Thus in consideration of a constant current supplied to a load in the event of characteristic changes occurring in the worldwide use of switching power supplies having similar circuit configurations, it is necessary to change the circuit constant of the controller according to the specifications of switching power supplies corresponding to worldwide input voltages. Thus it is difficult to reduce the cost.
The present invention has been devised to solve the problem of the prior art. An object of the present invention is to provide a switching power supply controller which can keep constant a current to a load without changing the circuit constant of the controller according to an input voltage range and achieve cost reduction, and a semiconductor device used for the same.
In order to solve the problem, a switching power supply controller of the present invention includes: a switching element for switching a first DC voltage; a control circuit for controlling the switching operation of the switching element to control the switching of the first DC voltage; a converter for outputting a signal obtained by converting the waveform of the first DC voltage in response to the switching operation of the switching element; an output voltage generating section for generating a second DC voltage from the output signal of the converter and supplying power to a load; and an output voltage detection circuit for detecting a change of the second DC voltage and transmitting to the control circuit a feedback signal for controlling the switching operation of the switching element, the control circuit including a feedback signal control circuit for determining the level of current passing through the switching element in response to the feedback signal from the output voltage detection circuit; a drain current detection circuit for generating a signal for turning off the switching element when the current passing through the switching element reaches a level value determined by the feedback signal control circuit; and an on time correction circuit for correcting the on time of the switching element based on an output signal from the drain current detection circuit, wherein the on time correction circuit changes the delay time of an off signal for turning off the switching element, according to a time until the current passing through the switching element reaches an overcurrent detection level after the switching element is turned on.
Further, in a semiconductor device of the present invention used for the switching power supply controller, the switching element and the control circuit are made up of integrated circuits formed on the same semiconductor substrate.
According to the present invention, the peak value of drain current passing through the switching element can be kept constant regardless of an input voltage. Thus it is possible to obtain a power supply with constant output characteristics for worldwide input voltages.
It is therefore possible to keep constant a current to the load without changing the circuit constant of the controller according to an input voltage range and reduce the cost of the controller.
The following will specifically describe switching power supply controllers according to embodiments of the present invention and semiconductor devices used for the same with reference to the accompanying drawings.
The following will describe a switching power supply controller according to a first embodiment of the present invention and a semiconductor device used for the same.
In the switching power supply controller, a transformer 1 has a primary winding 1a and a secondary winding 1b, the transformer 1 acting as a converter for outputting an AC voltage obtained by converting the waveform of an input DC voltage Vin in response to the switching operation of a switching element 2. The primary winding 1a and the secondary winding 1b are opposite in polarity. The switching power supply controller is a flyback controller.
The switching element 2 is connected in series to the primary winding 1a. The control electrode of the switching element 2 undergoes on/off switching control in response to the output signal of a control circuit 3. The control circuit 3 and the switching element 2 are included in a semiconductor device 4, and the switching element 2 made up of a power MOSFET and the like is integrated on the same semiconductor substrate.
A DRAIN terminal is a terminal connected to the junction of the primary winding 1a of the transformer 1 and the switching element 2, that is, the drain of the switching element 2. A GND terminal is a terminal for connecting the source of the switching element 2 and GND of the control circuit 3 to a ground level. The GND terminal is connected to a lower potential terminal of two terminals fed with the input DC voltage Vin. A VDD terminal is a terminal which connects a capacitor 5 and controls the power supply voltage of the control circuit 3 in response to charging from a regulator 10 included in the control circuit 3. An FB terminal is a terminal for inputting a feedback signal (for example, a current and the like from a phototransistor) outputted from an output voltage detection circuit 6, to a feedback signal control circuit 13 of the control circuit 3.
The regulator 10 is connected to the DRAIN terminal of the switching element 2, the VDD terminal, and a start/stop circuit 11. When the input DC voltage Vin is applied to the DRAIN terminal of the switching element 2 through the transformer 1, the regulator 10 supplies a current from the DRAIN terminal to the capacitor 5 through the VDD terminal, and increases an auxiliary power supply voltage VDD. When a VDD terminal voltage reaches a starting voltage, current supply from the DRAIN terminal to the capacitor 5 is stopped. When the VDD terminal voltage decreases below the starting voltage, a current is supplied from the DRAIN terminal to the VDD terminal and thus the VDD terminal voltage increases again.
The start/stop circuit 11 monitors the VDD terminal voltage and controls the oscillation (on) and stop (off) of the switching element 2 according to the VDD terminal voltage. When the VDD terminal voltage reaches the starting voltage, an H level is inputted to one input of an AND circuit 20. When the VDD terminal voltage reaches a stopping voltage, an L level is inputted to the input of the AND circuit 20.
In response to the feedback signal outputted from the output voltage detection circuit 6 and inputted to the FB terminal of the control circuit 3, the feedback signal control circuit 13 determines the level of current passing through the switching element 2 so as to stabilize an output DC voltage Vout at a constant voltage as shown in
For example, by detecting an on voltage determined by the product of a drain current passing through the switching element 2 and the on resistance of the switching element 2, the drain current detection circuit 14 relatively detects the drain current passing through the switching element 2. Further, the drain current detection circuit 14 outputs a voltage signal proportionate to the drain current to the positive side of the comparator 21. The comparator 21 outputs an H level signal when the drain current on the positive side is equal to the output signal of the feedback signal control circuit 13.
An on blanking pulse generating circuit 16 sets a certain blanking time after the AND circuit (gate driver) 20 outputs a turn-on signal to the switching element 2, so that a capacitive spike current or the like caused by the capacitance of the switching element 2 is not erroneously detected.
An on time correction circuit 15 receives the H-level output signal from the comparator 21 and transmits an H level signal to the reset (R) of an RS flip-flop 19 after a certain delay time. The on time correction circuit 15 will be specifically described in operational description including an example of the circuit configuration.
At start-up, an output signal from the start/stop circuit 11 reaches H level, so that one input of the AND circuit 20 is at H level. Further, the set (S) of the RS flip-flop 19 is fed with an H-level pulse signal in response to a CLOCK signal of an oscillator 12, so that an output (Q) is at H level and the other input of the AND circuit 20 is also fed with an H-level input signal. At this point, since the output signal of the AND circuit 20 is at H level, the switching element 2 is turned on.
After the switching element 2 is turned on, a current corresponding to the feedback signal from the output voltage detection circuit 6 is passed through the switching element 2 by the feedback signal control circuit 13 after the on blanking time. At this point, the H-level output signal of the on time correction circuit 15 is inputted to the reset (R) of the RS flip-flop 19 through an inverter circuit 17 and a NOR circuit 18. Thus the output (Q) switches to L level and one input of the AND circuit 20 is set at L level, so that the switching element 2 is turned off.
When the output of the on time correction circuit 15 is at L level during the maximum on time set by a MAXDUTY signal of the oscillator 12, the signal of the on time correction circuit 15 is inputted to the reset (R) of the RS flip-flop 19 through the NOR circuit 18 in response to the MAXDUTY signal of the oscillator 12. Thus the output (Q) switches to L level and one input of the AND circuit 20 is set at L level, so that the switching element 2 is turned off.
The switching (on/off) operation of the switching element 2 is performed by the foregoing signal processing.
To the secondary winding 1b of the transformer 1, an output voltage generating section 7 made up of a rectifying diode 7a and a capacitor 7b is connected. In response to the switching operation of the switching element 2, an AC voltage induced to the secondary winding 1b by waveform conversion from the input DC voltage Vin in the transformer 1 is rectified and smoothed by the output voltage generating section 7, so that the output DC voltage Vout is generated and is applied to a load 8.
The output voltage detection circuit 6 is made up of, for example, an LED and a Zener diode and the like. The output voltage detection circuit 6 detects the voltage level of the output DC voltage Vout and outputs a feedback signal necessary for allowing the control circuit 3 to control the switching operation of the switching element 2 so as to stabilize the output DC voltage Vout at a predetermined voltage.
In the switching power supply controller, commercial AC power is rectified by the rectifier such as a diode bridge and is smoothed by the input capacitor, so that the AC power is converted to the DC voltage Vin. The DC voltage Vin is supplied to the primary winding 1a of the transformer 1.
The following will describe the operations of the switching power supply controller configured thus as shown in
When an AC power is inputted to the rectifier such as a diode bridge from a commercial power supply, the power is rectified and smoothed by the rectifier and the input capacitor and is converted to the DC voltage Vin. The DC input voltage Vin is applied to the DRAIN terminal through the primary winding 1a of the transformer 1, and a start-up charging current passes from the DRAIN terminal through the regulator 10 in the control circuit 3 to the capacitor 5 connected to the VDD terminal. When the charging current causes the VDD terminal voltage of the control circuit 3 to reach the starting voltage set by the start/stop circuit 11, control on the switching operation of the switching element 2 is started.
When the switching element 2 is turned on, a current passes through the switching element 2 and a voltage corresponding to the current passing through the switching element 2 is inputted to the positive side of the comparator 21. After the blanking time set by the on blanking pulse generating circuit 16, when a voltage corresponding to the drain current is increased by at least a voltage determined by the negative side of the comparator 21, H level signals are inputted to both inputs of the AND circuit 20. Thus an H level signal is outputted from the AND circuit 20 to the on blanking pulse generating circuit 16. The on blanking pulse generating circuit 16 receives the signal and outputs an H signal to the reset (R) of the RS flip-flop 19 after a certain delay time, and then the switching element 2 is turned off.
When the switching element 2 is turned off, energy having been accumulated in the primary winding 1a of the transformer 1 during the on time of the switching element 2 is transmitted to the secondary winding 1b.
The foregoing switching operation is repeated to increase the output voltage Vout. When the output voltage Vout is not lower than the voltage set by the output voltage detection circuit 6, the output voltage of the feedback signal control circuit 13 decreases with the feedback current fed from the FB terminal of the control circuit 3 as the feedback signal from the output voltage detection circuit 6, and the voltage on the negative side of the comparator 21 decreases. Thus the current passing through the switching element 2 decreases. In this way the on duty of the switching element 2 changes to a proper state.
In other words, at a light load with a small current supplied to the load 8, a current passes through the switching element 2 for a short period. At a heavy load, a current passes through the switching element 2 for a long period.
Referring to
In
When the switching element 2 is turned on, an H signal is outputted to the set (S) of the RS flip-flop 24 in response to the CLOCK signal of the oscillator. At this point, the output (Q) of the RS flip-flop 24 switches to an H signal and an L level signal is outputted through the inverter circuit 25. The P-type MOSFET 32 is turned on in response to the L signal, the capacitor 34 is charged by the mirror circuit made up of the constant current source 26 and the P-type MOSFETs 28 and 29, and the voltage increases. The capacitor 34 is connected to the input of the inverter circuit 35. When the voltage of the capacitor 34 is not lower than the threshold value of the inverter circuit 35, the output of the inverter circuit 35 switches from H level to L level and is outputted to the NOR circuit 36. The output of the on blanking pulse generating circuit 16 is inputted to the inverter circuit 37. When the switching element 2 is turned on, L level is outputted from the inverter circuit 37 to the NOR circuit 36. Since the inputs of the NOR circuit 36 are both L level, H level is outputted from the NOR circuit 36.
When the drain current detection circuit 14 detects an overcurrent of the switching element 2, the comparator 21 outputs an H level to the reset (R) of the RS flip-flop 24 to turn off the switching element 2, the output of the RS flip-flop 24 switches to L signal, and an H level signal is outputted through the inverter circuit 25. The N-type MOSFET 33 is turned on in response to the H signal, the capacitor 34 is discharged by the mirror circuit made up of the constant current source 27 and the N-type MOSFETs 30 and 31, and the voltage decreases. The capacitor 34 is connected to the input of the inverter circuit 35. When the voltage of the capacitor 34 is not higher than the threshold value of the inverter circuit 35, the output of the inverter circuit 35 switches from L level to H level and is outputted to the NOR circuit 36. The output of the on blanking pulse generating circuit 16 is inputted to the inverter circuit 37. When the switching element 2 is turned on, L level is outputted from the inverter circuit 37 to the NOR circuit 36. Since the output of the inverter circuit 35 is H level, L level is outputted from the NOR circuit 36.
The effect of the foregoing operation will be discussed below.
The capacitor 34 is charged by turning on the switching element 2. The voltage of the capacitor 34 increases while the switching element 2 is turned on. After that, when the drain current detection circuit 14 detects an overcurrent of the switching element 2, the output of the RS flip-flop 24 is inverted and the output of the NOR circuit 36 is switched. A time from the detection of overcurrent to the switching of the NOR circuit 36 is increased by a time from when the switching element is turned on to when the capacitor 34 is charged. Thus after an overcurrent is detected, a time until the output of the NOR circuit 36 is inverted is increased by the charging time of the capacitor 34.
The foregoing operation is expressed by equations as will be described below.
The capacitor 34 has a voltage V1 from the time the switching element 2 is turned on until the time the drain current detection circuit 14 detects an overcurrent. The voltage V1 is expressed by the following equation:
V1=ton×Iconst1/C
where C is a capacitance value of the capacitor, ton is a time from when the switching element 2 is turned on to when an overcurrent is detected, and Iconst1 is a constant current value for charging the capacitor.
Further, the equation below expresses a time tdoff from when an overcurrent level of the switching element 2 is detected to when the voltage of the capacitor 34 reaches a threshold level V2 where the NOR circuit 36 is inverted.
tdoff=(V1−V2)×C/Iconst2
where Iconst2 is a constant current value for discharging the capacitor 34.
Thus the switching element 2 has a peak current value Ipeak expressed by the following equation:
Ipeak=Vin/L×(ton+tdoff)
Thus the voltage V1 of the capacitor 34 changes with a change of the time ton from when the switching element 2 is turned on to when an overcurrent is detected, thereby changing the time tdoff until the switching element 2 is turned off. Thus as shown in
The following will describe a switching power supply controller according to a second embodiment of the present invention and a semiconductor device used for the same.
In
When a switching element 2 is turned on, an H signal is outputted to the set (S) of the RS flip-flop 24 in response to a CLOCK signal of an oscillator 12. At this point, the output (Q) of the RS flip-flop 24 switches to an H signal and an L level signal is outputted through the inverter circuit 25. The P-type MOSFET 32 is turned on in response to the L signal, the capacitor 34 is charged by the mirror circuit made up of the constant current source 26 and the P-type MOSFETs 28 and 29, and the voltage increases. The capacitor 34 is connected to the negative input of the comparator 38. When the voltage of the capacitor 34 is not lower than the voltage of the reference voltage source 39 connected to the positive side of the comparator 38, the output of the comparator 38 switches from H level to L level and is outputted to the NOR circuit 36. The output of an on blanking pulse generating circuit 16 is inputted to an inverter circuit 37. When the switching element 2 is turned on, L level is outputted from the inverter circuit 37 to the NOR circuit 36. Since the inputs of the NOR circuit 36 are both L level, H level is outputted from the NOR circuit 36.
When a drain current detection circuit 14 detects an overcurrent of the switching element 2, a comparator 21 outputs H level to the reset (R) of the RS flip-flop 24 to turn off the switching element 2, the output of the RS flip-flop 24 switches to an L signal, and an H level signal is outputted through the inverter circuit 25. The N-type MOSFET 33 is turned on in response to the H signal, the capacitor 34 is discharged by the mirror circuit made up of the constant current source 27 and the N-type MOSFETs 30 and 31, and the voltage decreases. The capacitor 34 is connected to the negative input of the comparator 38. When the voltage of the capacitor 34 is not higher than the voltage of the reference voltage source 39 connected to the positive side of the comparator 38, the output of the comparator 38 switches from L level to H level and is outputted to the NOR circuit 36. The output of the on blanking pulse generating circuit 16 is inputted to the inverter circuit 37. When the switching element 2 is turned on, H level is outputted from the inverter circuit 37 to the NOR circuit 36. Since the inputs of the NOR circuit 36 are both H level, L level is outputted from the NOR circuit 36.
The effect of the foregoing operation will be discussed below.
The capacitor 34 is charged by turning on the switching element 2. The voltage of the capacitor 34 increases while the switching element 2 is turned on. After that, when the drain current detection circuit 14 detects an overcurrent of the switching element 2, the output of the RS flip-flop 24 is inverted and the output of the NOR circuit 36 is switched. A time from the detection of overcurrent to the switching of the NOR circuit 36 is increased by a time from when the switching element is turned on to when the capacitor 34 is charged. Thus after an overcurrent is detected, a time until the output of the NOR circuit 36 is inverted is increased by a charging time.
Equations are the same as the first embodiment and thus the explanation thereof is omitted.
The following will describe a switching power supply controller according to a third embodiment of the present invention and a semiconductor device used for the same.
In
The effect of the foregoing operation will be discussed below.
When the input voltage Vin is low or the delay time is extremely extended in a state of a load, the value of drain current passing through the switching element 2 increases. When the drain current detection circuit 41 detects that a drain current predetermined in the drain current detection circuit 41 passes through the switching element 2, the switching element 2 is turned off regardless of an off delay time generated by an on time correction circuit 15. Thus it is possible to prevent an overcurrent of the switching element 2 or a saturated state of the transformer 1, thereby protecting the switching power supply controller.
Equations are the same as the first embodiment and thus the explanation thereof is omitted.
According to the foregoing circuit configuration, by using a reference voltage source 39 for outputting a predetermined voltage as a reference voltage, tdoff is not changed according to a power supply voltage VDD. Thus it is possible to stably adjust the peak value of current passing through the switching element 2 to a constant value.
In the foregoing explanation, the switching element 2 and the control circuit 3 are disposed on the same substrate. It is not particularly necessary to place the control circuit 3 and the switching element 2 on the same substrate.
In the foregoing explanation, the switching power supply controller of the present invention is an insulated power supply circuit using a transformer as a converter. The switching power supply controller may be a non-insulated power supply circuit using a coil as a converter.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2008-202487 | Aug 2008 | JP | national |
