An embodiment of the invention relates to computer operation in general, and more specifically to symmetric scheduling for parallel execution.
In computer operations, system initiation may include the execution of certain drivers prior to booting the operating system. The drivers may include EFI (Extensible Firmware Interface) drivers. Driver execution may be a time consuming process for a computer system.
Multiple logical or physical processors may be available for certain computer operations. However, conventional scheduling of drivers for execution may not make sufficient use of available capabilities of the computer architecture in system initialization. Scheduling for driver execution for multiple drivers may create complications. The drivers may have dependencies that require that the execution of the drivers be performed in a certain order, complicating the scheduling process. Further, driver scheduling may involve high levels of overhead costs for a system. Multi-threading and multi-tasking in a conventional operating environment have not generally been available in the pre-boot space, due at least in part to high cost of task scheduling.
The invention may be best understood by referring to the following description and accompanying drawings that are used to illustrate embodiments of the invention. In the drawings:
A method and apparatus are described for symmetric scheduling for parallel execution.
Before describing an exemplary environment in which various embodiments of the present invention may be implemented, certain terms that will be used in this application will be briefly defined:
As used herein, “bootstrap processor” means a processor to initialize a system. Initialization of a system may include booting an operating system.
As used herein, “application processor” means a processor other than a bootstrap processor to execute applications and processes in a system.
Under an embodiment of the invention, symmetric scheduling is provided for parallel execution. The scheduling includes scheduling of drivers for execution, including EFI (extensible firmware interface) drivers. EFI describes an interface between an operating system (OS) and platform firmware. The interface is described more fully in the specification, Extensible Firmware Interface Specification, version 1.10, Dec. 1, 2002, Intel Corporation.
An embodiment of the invention may be implemented in various environments, including a multi-processor (MP) or hyper-threading (HT) enabled platform. Under a particular embodiment of the invention, an algorithm is utilized to provide scheduling to leverage multi-processor or hyper-threading central processing unit (CPU) architecture and allow efficient simultaneous execution of drivers.
Under an embodiment of the invention, a symmetric scheduling algorithm is provided that doesn't differentiate between a bootstrap processor (BSP) and other processors in dispatching EFI drivers in parallel, thereby allowing efficient parallel operations. Multiple processors perform the same role with regard to executing drivers in the dispatching process, thereby taking advantage of the computing resources of the underlying computer infrastructure for initiation processes.
The symmetric dispatch of drivers may include the operation of both a bootstrap processor that is responsible for the initiation of the system and other system processors, which may be referred to herein as application processors (APs). An embodiment of the invention provides a practicable symmetric scheduling algorithm for parallel execution on a system, such as a multi-processor or hyper-threading system, by utilizing of application processors to dispatch EFI drivers without differentiating between the bootstrap processor and the application processors for the dispatch process. The scheduling algorithm may thus provide a high level of parallelism on a multi-processor or hyper-threading system.
Under an embodiment of the invention, an algorithm enables drivers to be executed in parallel to reduce boot time by utilizing both the bootstrap processors and application processors for dispatch operation. The algorithm treats each driver as an atom (as a single unit or statement) and does not switch away during execution of the driver. Prevention of any process of switching away during execution of a driver may help reduce processing overhead costs.
Under an embodiment of the invention, multiple processors responsible for dispatch of drivers may be separate physical processors or may be separate logical processors. In hyper-threading operation, a physical processor may include multiple logical processors. Hyper-threading operates by duplicating certain portions of a processor, without duplicating the main execution resources. A physical processor can thus execute multiple pieces of software code (multiple threads or processes) in parallel. Under an embodiment of the invention, multiple logical processors included in a physical processor are utilized to execute drivers in parallel.
There are generally two phases of platform initialization in EFI-based BIOS (basic input output system):
Under an embodiment of the invention, during DXE core initialization, at least two tasks are accomplished. A first task is to initialize application processors so as to make the application processors available at the very beginning of the DXE phase. A second task is to detect drivers and build a discovered driver queue. After DXE core initialization, each processor, including the bootstrap processor and each application processor, attempts to identify a driver ready for execution from the discovered driver queue. Once such a driver is identified, the processor executes the driver. After the execution of the driver, the processor returns to the discovered driver queue to attempt to obtain another driver ready for execution. The process continues until all the drivers are dispatched from the discovered driver queue, and the dispatching process is completed. At this point, the bootstrap processor is ready to boot the operating system (OS).
Dependencies may exist between the drivers thereby affecting the order of execution. A driver generally is not executed until its dependencies have been satisfied. Whether a driver is ready for execution may be determined by evaluating the dependencies of the driver. At any time in an initiation process there may be multiple drivers that ready for execution that do not share any dependencies. Because there are no dependencies between these drivers, an embodiment of a scheduling algorithm may provide for execution of the ready drivers wholly or partially in parallel.
In an embodiment of the invention in which multiple processors are accessing a discovered driver queue, the concurrent accesses by the processors to the queue may require synchronization. Synchronization mechanisms for multiple processor operation are commonly understood by those of ordinary skill in the art and thus are not discussed in depth in this disclosure.
Each of the logical processors shown in
An embodiment of a driver dispatching loop 305 is illustrated in
The dependencies shown in
In the illustration shown in
In the illustration shown in
In a first time period 635, each of the logical processors accesses a driver queue. Drivers A, B, C, and D are dispatched. As shown in
After completing execution of a driver, each logical processor again accesses the queue to obtain another driver for dispatch. In a second time period 640, Drivers E, F, and G are dispatched. One of the processors (in this example, the bootstrap processor) has a Wait period because the remaining drivers have dependencies that have not been satisfied.
After dispatch of the drivers, each of the processors again accesses the queue to obtain another driver. Logical CPU 0 obtains driver H and logical CPU 1 obtains driver I. In a third time period 645, Drivers H and I are dispatched. Two of the processors, logical CPU 2 and logical CPU 3, access the queue and determine that there are no additional drivers to dispatch. As shown in the illustration, Logical CPU 2 and Logical CPU 3 then enter an idle state.
After dispatch of the drivers, logical CPU 0 and logical CPU 1 access the queue to obtain new drivers for dispatch. Upon determining that there are no additional drivers for dispatch, logical CPU 1 will enter an idle state. Logical CPU 0 will also determine that no additional drivers are available for dispatch. As the bootstrap processor, Logical CPU 0 will then determine whether all other processors are idle. Upon determining that all other processors are idle and thus that the dispatch of all drivers has been completed, the bootstrap processor will boot the operating system 650.
The illustration shown in
In the illustration shown in
Techniques described here may be used in many different environments.
The computer 700 further comprises a random access memory (RAM) or other dynamic storage device as a main memory 715 for storing information and instructions to be executed by the processors 710. Main memory 715 also may be used for storing temporary variables or other intermediate information during execution of instructions by the processors 710. The computer 700 also may comprise a read only memory (ROM) 720 and/or other static storage device for storing static information and instructions for the processor 710.
A data storage device 725 may also be coupled to the bus 705 of the computer 700 for storing information and instructions. The data storage device 725 may include a magnetic disk or optical disc and its corresponding drive, flash memory or other nonvolatile memory, or other memory device. Such elements may be combined together or may be separate components, and utilize parts of other elements of the computer 700.
The computer 700 may also be coupled via the bus 705 to a display device 730, such as a liquid crystal display (LCD) or other display technology, for displaying information to an end user. In some environments, the display device may be a touch-screen that is also utilized as at least a part of an input device. In some environments, display device 730 may be or may include an auditory device, such as a speaker for providing auditory information. An input device 740 may be coupled to the bus 705 for communicating information and/or command selections to the processor 710. In various implementations, input device 740 may be a keyboard, a keypad, a touch-screen and stylus, a voice-activated system, or other input device, or combinations of such devices. Another type of user input device that may be included is a cursor control device 745, such as a mouse, a trackball, or cursor direction keys for communicating direction information and command selections to processor 710 and for controlling cursor movement on display device 730.
A communication device 750 may also be coupled to the bus 705. Depending upon the particular implementation, the communication device 750 may include a transceiver, a wireless modem, a network interface card, or other interface device. The computer 700 may be linked to a network or to other devices using the communication device 750, which may include links to the Internet, a local area network, or another environment.
In the description above, for the purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without some of these specific details. In other instances, well-known structures and devices are shown in block diagram form.
The present invention may include various processes. The processes of the present invention may be performed by hardware components or may be embodied in machine-executable instructions, which may be used to cause a general-purpose or special-purpose processor or logic circuits programmed with the instructions to perform the processes. Alternatively, the processes may be performed by a combination of hardware and software.
Portions of the present invention may be provided as a computer program product, which may include a machine-readable medium having stored thereon instructions, which may be used to program a computer (or other electronic devices) to perform a process according to the present invention. The machine-readable medium may include, but is not limited to, floppy diskettes, optical disks, CD-ROMs, and magneto-optical disks, ROMs, RAMs, EPROMs, EEPROMs, magnet or optical cards, flash memory, or other type of media/machine-readable medium suitable for storing electronic instructions. Moreover, the present invention may also be downloaded as a computer program product, wherein the program may be transferred from a remote computer to a requesting computer by way of data signals embodied in a carrier wave or other propagation medium via a communication link (e.g., a modem or network connection).
Many of the methods are described in their most basic form, but processes can be added to or deleted from any of the methods and information can be added or subtracted from any of the described messages without departing from the basic scope of the present invention. It will be apparent to those skilled in the art that many further modifications and adaptations can be made. The particular embodiments are not provided to limit the invention but to illustrate it. The scope of the present invention is not to be determined by the specific examples provided above but only by the claims below.
It should also be appreciated that reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature may be included in the practice of the invention. Similarly, it should be appreciated that in the foregoing description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamliriing the disclosure and aiding in the understanding of one or more of the various inventive aspects. This method of disclosure, however, is not to be interpreted as reflecting an intention that the claimed invention requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims are hereby expressly incorporated into this description, with each claim standing on its own as a separate embodiment of this invention.