BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention related to a control circuit of synchronous rectifying with charge pump to improve efficiency of power converters.
2. Description of the Related Art
Synchronous rectifying technologies had been disclosed in many prior arts such as, U.S. Pat. No. 6,995,991 titled “PWM controller for synchronous rectifier of flyback power converter”; U.S. Pat. No. 7,440,298 titled “Synchronous rectification circuit for power converters”; and U.S. Pat. No. 8,072,787 titled “Synchronous rectifying for soft switching power converters”.
FIG. 1 shows a prior art of a power converter with synchronous rectifying. A transistor 20, controlled by a switching signal SW, is coupled to switch a transformer 10 for transferring energy from an input voltage VIN to an output voltage VO of the power converter. When a rectifier 35 (or the body diode of a transistor 30) is turned on to deliver the power from the transformer 10 to an output capacitor 40, the transistor 30 will be turned on to reduce conduction loss of the rectifier 35 (the forward voltage drop of the rectifier 35). A terminal DET of a synchronous rectifying control circuit 50 is coupled to the transistor 30 and/or the transformer 10 for detecting a signal SDET and achieving the synchronous rectifying. The synchronous rectifying control circuit 50 generates a control signal VG at its terminal VG in accordance with the signal SDET. The control signal VG is coupled to switch the transistor 30. In the most of the applications, the power source (VCC) at a terminal VCC of the synchronous rectifying control circuit 50 is supplied by the output voltage VO of the power converter. The drawback of these applications is that the voltage level of the control signal VG cannot sufficiently drive the transistor 30 when the output voltage V0 becomes to a low voltage.
FIG. 2 shows a voltage-to-current curve (the output voltage VO versus an output current IO) of the power converter. The output voltage VO would be a low voltage when the power converter is operated in constant current mode. The power source (VCC) of the synchronous rectifying control circuit 50 would be too low to let the control signal VG fully turn on the transistor 30 if the power converter is operated in a region 65, in which the output voltage VO is relatively low. This will cause low efficiency problem to the power converter.
BRIEF SUMMARY OF THE INVENTION
An exemplary embodiment of a synchronous rectifying control circuit with charge pump of a power converter is provided. The synchronous rectifying control circuit comprises: a synchronous rectifying driver, a charge pump capacitor, a capacitor, a plurality of switches, an oscillator, and a detection circuit. The synchronous rectifying driver is coupled to a transformer for generating a control signal to switch a transistor. The charge pump capacitor is coupled to a power source for generating a charge pump voltage. The capacitor is coupled to store the charge pump voltage. The transistor is coupled to the transformer and operated as a synchronous rectifier. The charge pump voltage is coupled to guarantee a sufficient driving capability for the control signal. The plurality of switches coupled to charge the charge pump capacitor in a switching manner for a charge pump. The oscillator generates an oscillation signal for the switching manner to the charge pump capacitor. The detection circuit is coupled to detect a voltage level of the power source. The detection circuit generates a detection signal when the voltage level of the power source is higher than a threshold. The detection signal is coupled to disable the charge pump and delivering the power source to the capacitor. The control signal is disabled when the charge pump voltage is lower than a low-voltage threshold. The control signal is enabled when the charge pump voltage is higher than a high-voltage threshold.
Another exemplary embodiment of a control circuit for synchronous rectifying of a power converter is also provided. The control circuit comprises: a synchronous rectifying driver, a boost inductor, a capacitor, a switch, an oscillator, and a detection circuit. The synchronous rectifying driver is coupled to a transformer to generate a control signal for switching a transistor. The boost inductor is coupled to a power source for generating a boosted voltage. The capacitor is coupled to store the boosted voltage. The transistor is coupled to the transformer and operated as a synchronous rectifier. The boosted voltage is coupled to guarantee a sufficient driving capability for the control signal. The switch coupled to switch the boost inductor for a boost switching operation. The oscillator generates an oscillation signal for switching the boost inductor. The detection circuit is coupled to detect a voltage level of the power source. The detection circuit generates a detection signal when the voltage level of the power source is higher than a threshold. The detection signal is coupled to disable the boost switching operation and delivering the power source to the capacitor. The control signal is disabled when the boosted voltage is lower than a low-voltage threshold. The control signal is enabled when the boosted voltage is higher than a high-voltage threshold.
A detailed description is given in the following embodiments with reference to the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
The invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:
FIG. 1 shows a prior art of a power converter with synchronous rectifying;
FIG. 2 shows a voltage-to-current curve of an output voltage and an output current of the power converter in FIG. 1;
FIG. 3 is an exemplary embodiment of a power converter with synchronous rectifying according to the present invention;
FIG. 4 is an exemplary embodiment of a synchronous rectifying control circuit of the power converter in FIG. 3;
FIG. 5 is an exemplary embodiment of a sequencer circuit of the synchronous rectifying control circuit in FIG. 4;
FIGS. 6A and 6B respectively show a first cycle and a second cycle of charge pump of the synchronous rectifying control circuit in FIG. 3;
FIG. 7 shows the operation of the synchronous rectifying control circuit in FIG. 3 without charge pump;
FIG. 8 is an exemplary embodiment of a synchronous rectifying driver of the synchronous rectifying control circuit in FIG. 4;
FIG. 9 is another exemplary embodiment of a power converter with synchronous rectifying according to the present invention;
FIG. 10 is an exemplary embodiment of a synchronous rectifying control circuit of the power converter in FIG. 9;
FIGS. 11A and 11B respectively shows a first cycle and a second cycle of a boost switching operation of the synchronous rectifying control circuit in FIG. 9; and
FIG. 12 shows the operation of the synchronous rectifying control circuit in FIG. 9 without boost switching operation.
DETAILED DESCRIPTION OF THE INVENTION
The following description is of the best-contemplated mode of carrying out the invention. This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is best determined by reference to the appended claims.
FIG. 3 is an exemplary embodiment of a power converter with synchronous rectifying according to the present invention. A transistor 20, controlled by a switching signal SW, is coupled to switch a transformer 10 for transferring energy from an input voltage VIN to an output voltage VO of the power converter. When a rectifier 35 (or the body diode of a transistor 30) is turned on to deliver the power from the transformer 10 to an output capacitor 40, the transistor 30 will be turned on to reduce conduction loss of the rectifier 35 (the forward voltage drop of the rectifier 35). The transistor 30 is operated as a synchronous rectifier. A terminal DET of a synchronous rectifying control circuit 50 is coupled to the transistor 30 and/or the transformer 10 for detecting a signal SDET and achieving the synchronous rectifying. The synchronous rectifying control circuit 100 with charge pump is coupled to drive the transistor 30. The synchronous rectifying control circuit 100 is coupled to a charge pump capacitor 51 between its terminals X and Y to boost a VCC voltage (power source) into a capacitor 52 and therefore generate a VDD voltage (charge pump voltage) at a terminal VDD of the synchronous rectifying control circuit 100. The level of the VDD voltage is higher than the level of the VCC voltage. The VDD voltage can guarantee a control signal VG generated at the terminal VG of the synchronous rectifying control circuit 100 having sufficient driving capability to drive the transistor 30. When the VCC voltage is a high voltage, the synchronous rectifying control circuit 100 will disable the charge pump and directly couple the VCC voltage to the VDD voltage.
FIG. 4 is an exemplary embodiment of the synchronous rectifying control circuit 100 according to the present invention. The synchronous rectifying control circuit 100 includes a plurality of switches 71, 72, 73, and 74, a sequencer circuit 200, and a synchronous rectifying driver 300. The synchronous rectifying driver 300 is coupled to the transformer 10 for generating the control signal VG to switch the transistor 30. The switches 71, 72, 73, and 74 are coupled to the charge pump capacitor 51 for generating the VDD voltage. The on/off states of the switches 71, 72, 73, and 74 are respectively controlled by signals S1, S2, S3, and S4 generated by the sequencer circuit 200. The VCC voltage (power source) at a terminal VCC of the synchronous rectifying control circuit 100 is coupled to the sequencer circuit 200 to generate the signals S1, S2, S3, and S4. The VDD voltage is coupled to supply the power source to the synchronous rectifying driver 300. The synchronous rectifying driver 300 generates the control signal VG in accordance with the VCC voltage and/or the signal SDET. The operation of detecting the signal SDET to generate the control signal VG for driving the transistor 30 is well known to those skilled in the art and therefore will be omitted herein.
FIG. 5 is an exemplary embodiment of the sequencer circuit 200 of the synchronous rectifying control circuit 100 according to the present invention. The sequencer circuit 200 includes an oscillator 210, a comparator 215, a flip-flop 230, a signal generator 250, OR gates 251, 252, and 254, and a NOR gate 253. The oscillator 210 generates an oscillation signal SOSC coupled to the signal generator 250 for generating signals SA, SB, SC, and SD. The comparator 215 and the flip-flop 230 form a detection circuit for detecting the VCC voltage (power source). The comparator 215 receives the VCC voltage (power source) and a threshold VT1 and compares the both. The comparator 215 generates a detection signal SV through the flip-flop 230 when the VCC voltage is higher than the threshold VT1. The detection signal SV and the signals SA, SB, SD, SC are coupled to generate the signals S1, S2, S3, S4 through the OR gates 251, 252, 254 and the NOR gate 253. In a first cycle (shown in FIG. 6A), the signals S1 and S2 are enabled to turn on the switches 71 and 72 respectively. The voltage across the charge pump capacitor 51 will be charged up to a level same as the level of the VCC voltage. In a second cycle (shown in FIG. 6B), the signals S3 and S4 are enabled to turn on the switches 73 and 74 respectively. The VCC voltage and the voltage across the charge pump capacitor 51 will be added up for charging the capacitor 52. That is, the summed voltage of the VCC voltage and the voltage across the charge pump capacitor 51 will be stored in the capacitor 52. At this time, the level of the VDD voltage will be approximately equal to 2 times the level of the VCC voltage. When the VCC voltage is higher than the threshold VT1, the detection signal SV will be generated to disable the signal S3 and enable the signals S1, S2, and S4 (shown in FIG. 7; the switches 71, 72, and 74 are turned on and the switch 73 is turned off). Therefore, the VCC voltage will be directly coupled to supply as the VDD voltage (the charge pump will be disabled).
FIG. 8 is an exemplary embodiment of the synchronous rectifying driver 300. The synchronous rectifying driver 300 comprises a comparator 310, an inverter 315, switches 320 and 321, and a synchronous rectifying signal generator 350. The VDD voltage is couple to supply the power source to the synchronous rectifying signal generator 350. The synchronous rectifying signal generator 350 generates the control signal VG in accordance with a signal SUV and the VCC voltage and/or the signal SDET. The signal SUV is generated (enabled) by the comparator 310 when the VDD voltage is higher than a high-voltage threshold VT2. The control signal VG is enabled when the signal SUV is enabled. The inverter 315 and the switches 320 and 321 form a hysteresis circuit. The signal SUV is disabled when the VDD voltage is lower than a low-voltage threshold VT3, wherein the level of the high-voltage threshold VT2 is higher than the level of the low-voltage threshold VT3. The control signal VG is disabled when the signal SUV is disabled.
FIG. 9 is another exemplary embodiment of the power converter with synchronous rectifying according to the present invention. A synchronous rectifying control circuit 500 with charge pump is coupled to drive the transistor 30. The synchronous rectifying control circuit 500 is coupled to a boost inductor 53 coupled to its B terminal to boost the VCC voltage (power source) into the VDD voltage (boosted voltage) to be stored in the capacitor 52. The VDD voltage can guarantee a control signal VG generated at the terminal VG of the synchronous rectifying control circuit 500 having sufficient capability for driving the transistor 30. When the VCC voltage is high voltage, the synchronous rectifying control circuit 500 will disable the boost switching operation and directly couple the VCC voltage to supply as the VDD voltage.
FIG. 10 is an exemplary embodiment of the synchronous rectifying control circuit 500 according to the present invention. The synchronous rectifying control circuit 500 includes an oscillator 210, a comparator 215, a flip-flop 230, a synchronous rectifying driver 300, switches 510 and 520, an NOR gate 515, an OR gate 525, and a signal generator 600. The switches 510 and 520 are coupled to switch the boost inductor 53 for generating the VDD voltage. The on/off states of the switches 510 and 520 are respectively controlled by signals SX and SY. The oscillator 210 generates an oscillation signal SOSC coupled to the signal generator 600. In accordance with the level of the VDD voltage, the signal generator 600 is coupled to generate the signals SX and SY via the NOR gate 515 and the OR gate 525 respectively. The comparator 215 generates a detection signal SV through the flip-flop 230 when the VCC voltage is higher than a threshold VT1. In associated with the detection signal SV, the signals SX and SY are generated through the NOR gates 515 and the OR gate 525 respectively. The VDD voltage is coupled to supply the power source to the synchronous rectifying driver 300. The synchronous rectifying driver 300 generates the control signal VG in accordance the VCC voltage and/or the signal SDET.
FIGS. 11A and 11B respectively shows a first cycle and a second cycle of a boost switching operation of the synchronous rectifying control circuit 500. Referring to FIG. 11A, the boost inductor 53 is charged through a current IL when the signal SX is enabled and the switch 510 is turned on. At this time, the energy stored in the boost inductor 53 generates a boost voltage. Referring to FIG. 11B, the energy of the boost inductor 53 is discharged to charge the capacitor 52 to boost the VDD voltage when the signal SY is enabled and the switch 520 is turned on. Accordingly, the boost voltage will be stored into the capacitor 52. Referring to the following equations:
wherein TON is the on time of the switch 510 (the enabling time of the signal SX); T is the switching period of the signal SX; L53 is the inductance of the boost inductor 53.
FIG. 12 shows the charge pump of the synchronous rectifying control circuit 500 without boost switching operation. When the VCC voltage is higher than the threshold VT1, the detection signal SV will be generated to disable the signal SX and enable the signal SY. Accordingly, the switch 520 is turned on Therefore, the VCC voltage will be coupled to supply as the VDD voltage (without the boost switching operation).
While the invention has been described by way of example and in terms of the preferred embodiments, it is to be understood that the invention is not limited to the disclosed embodiments. On the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.
Patent Application
20150062972
