Claims
- 1. An audio processor for providing a digital output signal representative of a sound at an output, the audio processor comprising:
- a mass storage device input for receiving a plurality of digital waveform signals;
- a control input for receiving digital control signals, the digital control signals being indicative of at least one selected digital waveform signal of the digital waveform signals; and
- a control circuit coupled to the control input and the mass storage device input, the control circuit storing a first part of the digital waveform signals in a host memory, the control circuit providing from the host memory the first part of the selected digital waveform signal to the output in response to the digital control signals and subsequently providing a second part of the selected digital waveform signal from the mass storage device input to the output.
- 2. The audio processor of claim 1 wherein the host memory includes a stream buffer and a sample pool, wherein the sample pool stores the first part of the digital waveform signals and wherein the control circuit first provides the first part of the selected digital waveform signal to the stream buffer in response to the digital control signals and subsequently provides the second part of the selected digital waveform signal from the mass storage device input to the stream buffer.
- 3. The audio processor of claim 2 wherein the control circuit first provides the first part of the selected digital waveform signal from the sample pool to the output and subsequently provides the second part of the selected digital waveform signal from the stream buffer to the output.
- 4. The audio processor of claim 1 wherein the host memory includes a stream buffer and a sample pool, wherein the sample pool stores the first part of the digital waveform signals and wherein the control circuit first provides the first part of the selected digital waveform signal to the stream buffer in response to the digital control signals and provides the first part of the selected digital waveform signal from the stream buffer to the output and after the first part of the selected digital waveform signal is provided to the stream buffer, the control circuit provides the second part of the selected digital waveform signal from the mass storage device input to the stream buffer and provides the second part of the selected digital waveform signal from the stream buffer to the output.
- 5. The audio processor of claim 1 wherein the host memory includes a stream buffer and a sample pool, wherein the sample pool stores the first part of the digital waveform signals, and wherein the control circuit further comprises:
- a stream engine coupled to the mass storage device input and to the stream buffer;
- a synthesizer engine coupled to the stream buffer and the output, wherein the synthesizer engine provides the first part of the selected digital waveform from the sample pool to the output and the stream engine provides the second part of the selected digital waveform from the mass storage device input to the stream buffer, and the synthesizer engine provides the second part of the selected digital waveform from the stream buffer to the output.
- 6. The audio processor of claim 5 wherein the control circuit further comprises:
- a command parser coupled to the stream engine, the command parser building an event list including a plurality of selected digital waveform signals, the stream engine reading the event list and providing second parts of the selected digital waveform signals from the mass storage device input and to the stream buffer.
- 7. The audio processor of claim 6 wherein the stream buffer is comprised of a plurality of stream buffer cells, each stream buffer cell storing at least a portion of one of the selected digital waveform signals.
- 8. The audio processor of claim 7 wherein each stream buffer cell is comprised of a deck buffer pointer storing an address of the first part of the selected digital waveform, a stream control data buffer for storing control data related to the selected digital waveform, and a stream buffer Unit for storing the portion of the selected digital waveform.
- 9. The audio processor of claim 8 wherein the sample pool includes a plurality of sample cells, each of the sample cells including a deck buffer storing the first part of the digital waveform signals, and a sample control data buffer for storing control data related to the digital waveform signals.
- 10. The audio processor of claim 9 wherein the control circuit includes a download module, the download module receiving the first part of the digital waveform signals from the mass storage device input and storing the first part of the digital waveform signals in the sample deck buffer.
- 11. The audio processor of claim 10 wherein the download module receives control data associated with the digital waveform signals from the mass storage device input and stores the control data in the sample control data buffer.
- 12. The audio processor of claim 1 wherein the control circuit includes a system thread manager for ensuring that the stream engine is active an appropriate amount of time.
- 13. The audio processor of claim 12 wherein the control circuit is operated in a multi-tasking environment.
- 14. A digital synthesizer system, comprising:
- a mass storage device means for storing a plurality of digital waveform signals, each of the digital waveform signals corresponding to a particular sound of a plurality of sounds;
- a control input means for receiving a digital control signal, the digital control signal being indicative of a selected sound of the sounds;
- a host memory means for storing a first part for each of the digital waveform signals; and
- a processor means for providing from the host memory the first part of the digital waveform signal corresponding to the selected sound to the output, and for providing a second part of the digital waveform signal corresponding to the selected sound from the mass storage device means to the output.
- 15. The digital synthesizer system of claim 14 wherein the processor means is a CPU operating in a operating system environment.
- 16. The digital synthesizer of claim 14 wherein the host memory is a DRAM device.
- 17. The digital synthesizer of claim 14 wherein the mass storage device means is an optical disk drive, tape drive, hard disk drive, or floppy disk drive.
- 18. The digital synthesizer of claim 14 wherein the host memory means includes a sample pool for storing the first part and a stream buffer for temporarily the second part before the processor means provides the second part to the output.
- 19. A method of digitally synthesizing sounds in a synthesizer system, the synthesizer system including a mass storage device, a host memory, and a processor, the mass storage device storing a plurality of digital waveform, signals, the processor having a digital control signal input and a digital output, the processor being coupled to the host memory and the mass storage device, the method comprising:
- downloading a first part for each of the digital waveform signals into the host memory;
- receiving a digital control signal on the digital control signal input, the digital control signal indicating a selected digital waveform signal of the digital waveform signals;
- providing the first part of the selected digital waveform signal from the host memory to the digital output; and
- providing a second part of the selected digital waveform, signal from the mass storage device to the digital output.
- 20. The method of claim 19 wherein the providing the first part step includes storing the first part in a stream buffer in the host memory and providing the first part from the stream buffer to the digital output.
- 21. The method of claim 20 wherein the, providing the second part step includes storing the second part in the stream buffer in the host memory and providing the second part from the stream buffer to the digital output.
- 22. The method of 21 wherein the stream buffer is comprised of a plurality of stream cells and the providing the first part step includes storing the first part in a deck section of a stream cell.
- 23. The method of 22 wherein the stream buffer the providing the second part step includes storing the second part in a stream section of the stream cell.
- 24. A method of digitally synthesizing sounds in a synthesizer system, the synthesizer system including a mass storage device, a host memory, and a processor, the mass storage device storing a plurality of digital waveform, signals, each of the digital waveform signals corresponding to a particular sound of a plurality of sounds, a first part for each of the digital waveform, signals being stored in the host memory, the processor having a digital control signal input and a digital output, the processor being coupled to the host memory and the mass storage device, the method comprising:
- receiving a digital control signal on the digital control signal input, the digital control signal indicating a selected sound of the plurality of sounds;
- providing a first part of a digital waveform signal corresponding to the selected sound from the host memory to the digital output; and
- providing a second part of the digital waveform signal from the mass storage device to the digital output corresponding to the selected sound.
- 25. The method of claim 24 wherein the providing the first part step includes storing the first part in a stream buffer in the host memory and providing the first part from the stream buffer to the digital output.
- 26. The method of claim 25 wherein the providing the second part step includes storing the second part in the stream buffer in the host memory and providing the second part from the stream buffer to the digital output.
- 27. The method of 26 wherein the stream buffer is comprised of a plurality of stream cells and the providing the first part step includes storing the first part in a deck section of a stream cell.
- 28. The method of 27 wherein the stream buffer the providing the second part step includes storing the second part in a stream section of the stream cell.
- 29. The method of claim 24 wherein the digital control signal is a MIDI signal.
- 30. The method of claim 24 wherein the processor is operating in a Windows.RTM. environment.
- 31. A recording and playback workstation for recording sound samples and playing back stored sound samples, the played back sound samples being mixed together and filtered to provide a multiplicity of sound combinations and effects, the recording and playback workstation comprising:
- a mass storage device storing a plurality of digital waveform signals;
- a solid state memory system including a first buffer and a second buffer, the first buffer storing a first part of the digital waveform signals;
- a stream engine coupled to the mass storage device and to the solid state memory system, the stream engine providing a second part of the digital waveform signals from the mass storage device to the second buffer;
- at least one output for providing a waveform signal;
- a synthesizer engine coupled to the second buffer, the first buffer, and the output; and
- at least one control input for receiving signals corresponding to the recall, mixing, and filtering of the stored digital waveform signals;
- wherein the synthesizer engine combines and processes the first part of the digital waveform signals and the second part of the digital waveform signals according to the control inputs and communicates the signals to the output.
- 32. The recording and playback workstation of claim 31, wherein the solid state memory system is a DRAM system.
- 33. The recording and playback workstation of claim 32, wherein the storage medium is a rotatable storage medium.
- 34. At The recording and playback workstation of claim 33, wherein the mass storage device is a hard disk drive.
- 35. The recording and playback workstation of claim 33, wherein the mass storage device is a removable hard disk drive.
- 36. The recording and playback workstation of claim 33, wherein the mass storage device is a readable/writable optical drive.
- 37. The recording and playback workstation of claim 35, wherein the memory system includes random access memory (RAM) devices.
- 38. The recording and playback workstation of claim 37, wherein there are at least thirty-two (32) locations in the first buffer.
- 39. The recording and playback workstation of claim 38, wherein the memory system includes dynamic random access memory (RAM) devices.
- 40. The recording and playback workstation of claim 39, wherein the second buffer operates as a circular buffer.
- 41. The recording and playback workstation of claim 40, wherein at least one of the at least one control inputs is a musical instrument digital interface (MIDI) input.
- 42. The recording and playback workstation of claim 41, wherein at least one of the at least one control inputs is a keyboard.
- 43. The recording and playback workstation of claim 42, wherein
- the keyboard is a computer keyboard.
- 44. An audio processor for providing a digital output signal representative of a sound at an output, the audio processor comprising:
- a mass storage device for providing a plurality of digital waveform signals;
- a control input device for receiving digital control signals, the digital control signals being indicative of at least one selected digital waveform signal of the digital waveform signals; and
- a control circuit coupled to the control input and the mass storage device input, the control circuit storing a first part of the digital waveform signals in a host memory, the control circuit providing from the host memory a first part of the selected digital waveform signal to the output in response to the digital control signals and providing a remaining part of the selected digital waveform signal from the mass storage circuit to the output, whereby the control circuit continuously stores the first part of the selected digital waveform signal and stores the remaining part of the selected digital waveform signal with a caching scheme.
- 45. The audio processor of claim 44, wherein the host memory includes a stream buffer and a sample pool, wherein the sample pool stores the first part of the digital waveform signals and wherein the control means first provides the first part of the selected digital waveform signal to the stream buffer in response to the digital control signals and subsequently provides the remaining part of the selected digital waveform signal from the mass storage device input to the stream buffer.
- 46. The audio processor of claim 45, wherein the control circuit first provides the first part of the selected digital waveform signal from the sample pool to the output and subsequently provides the remaining part of the selected digital waveform signal from the stream buffer to the output, the stream buffer being utilized as a circular buffer to provide the remaining part.
- 47. The audio processor of claim 44, wherein the host memory includes a stream buffer and a sample pool, wherein the sample pool stores the first part of the digital waveform signals and wherein the control circuit first provides the first part of the selected digital waveform signal to the stream buffer in response to the digital control signals and provides the first part of the selected digital waveform signal from the stream buffer to the output and after the first part of the selected digital waveform signal is provided to the stream buffer, the control circuit provides the remaining part of the selected digital waveform signal from the mass storage device means to the stream buffer and provides the remaining part of the selected digital waveform signal from the stream buffer to the output.
- 48. The audio processor of claim 44, wherein the host memory includes a stream buffer and a sample pool, wherein the sample pool stores the first part of the digital waveform signals, and wherein the control means further comprises:
- a stream engine coupled to the mass storage device input and to the stream buffer;
- a synthesizer engine coupled to the stream buffer and the output, wherein the synthesizer engine provides the first part of the selected digital waveform from the sample pool to the output and the stream engine provides the remaining part of the selected digital waveform from the mass storage device input to the stream buffer, and the synthesizer engine provides the remaining part of the selected digital waveform from the stream buffer to the output.
- 49. The audio processor of claim 48, wherein the control circuit further comprises:
- a command parser coupled to the stream engine, the command parser building an event list including a plurality of selected digital waveform signals, the stream engine reading the event list and providing remaining parts of the selected digital waveform signals from the mass storage device input and to the stream buffer.
- 50. The audio processor of claim 49, wherein the stream buffer is comprised of a plurality of stream buffer cells, each stream buffer cell storing at least a portion of one of the selected digital waveform signals.
- 51. The audio processor of claims 50, wherein each stream buffer cell is comprised of a deck buffer pointer storing an address of the first part of the selected digital waveform, a stream control data buffer for storing control data related to the selected digital waveform, and a stream buffer unit for storing the portion of the selected digital waveform.
- 52. The audio processor of claim 51, wherein the sample pool includes a plurality of sample cells, each of the sample cells including a deck buffer storing the first part of the digital waveform signals, and a sample control data buffer for storing control data related to the digital waveform signals.
- 53. The audio processor of claim 52, wherein the control circuit includes a download module, the download module receiving the first part of the digital waveform signals from the mass storage device means and storing the first part of the digital waveform signals in the sample deck buffer.
- 54. The audio processor of claim 53, wherein the download module receives control data associated with the digital waveform signals from the mass storage device input and stores the control data in the sample control data buffer.
- 55. The audio processor of claim 44, wherein the control circuit includes a system thread manager for ensuring that the stream engine is active an appropriate amount of time.
- 56. The audio processor of claim 55, wherein the control circuit is operated in a multi-tasking environment.
- 57. A digital synthesizer system, comprising:
- a mass storage device means for storing a plurality of digital waveform signals, each of the digital waveform signals corresponding to a particular sound of a plurality of sounds;
- a control input means for receiving a digital control signal, the digital control signal being indicative of a selected sound of the sounds;
- a host memory means for storing a first part for each of the digital waveform signals; and
- a processor means for generating a digital sound signal at an output, the processor means providing from the host memory the first part of the digital waveform signal corresponding to the selected sound to the output and providing a second part of the digital waveform signal corresponding to the selected sound from the mass storage device means to the output, whereby the processor means utilizes a caching technique to provide the second part to the output.
- 58. The digital synthesizer system of claim 57, wherein the processor means is a CPU operating in an operating system environment.
- 59. The digital synthesizer of claim 57, wherein the processor means utilizes a priority scheduling mechanism to handle the second part of the selected sound in a priority order with respect to other sounds.
- 60. The digital synthesizer of claim 57, wherein the mass storage device means is an optical disk drive, tape drive, hard disk drive, or floppy disk drive.
- 61. The digital synthesizer of claim 57, wherein the host memory means includes a sample pool for storing the first part and a stream buffer for temporarily storing the second part before the processor means provides the second part to the output.
CROSS REFERENCE TO RELATED APPLICATIONS
The present application is a continuation of U.S. Ser. No. 08/863,829, filed May 27, 1997 (now U.S. Pat. No. 5,811,706), by Van Buskirk, et al, and assigned to the Assignee of the present invention.
US Referenced Citations (10)
Continuations (1)
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Number |
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863829 |
May 1997 |
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