Patent Application
20240148523
This invention generally concerns systems and methods for neuromodulation, and, more specifically, concerns miniaturized neurostimulators in integrated circuits that convert and exploit the problem of mismatch error into an effective means of achieving super-resolution signal accuracy in neuromodulation.
This invention also generally concerns the field of electrical converters including digital-to-analog converters (DACs) and analog-to-digital converters (ADCs). More particularly, the invention relates to super-resolution DACs using redundant sensing techniques.
Electrical stimulation has been used in research and in therapeutics for probing neural circuitry and identifying networks of neurons for many years. Despite its extensive use, the mechanism of electrical stimulation on the nervous system remains poorly understood, and the results of applying novel approaches to such therapeutic stimulation cannot be predicted with a reasonable degree of certainty by those of ordinary skill in the art due to the uncertainty of the outcome prior to pre-clinical experimental research on animal models and clinical experimental development on human subjects. There exists a need for an integrated hardware and software platform system that can sense, analyze, and modulate neural signals, and to define, incorporate, and transmit neural feedback-influenced electrical signals in order to improve electrical stimulation outcomes. Currently available or known electrical stimulation devices do not adequately sense nerve neural signals, being unable to satisfactorily overcome the fact that nerve neural signals are smaller than signals measured in the brain, meaning that existing recording technology is inadequate for resolving nerve neural signals from signals measured in the brain, which constitute sources of signal noise.
Signal Noise. Noise, in the context here of signal processing, is defined as a general term for unwanted (and, in general, unknown, unknowable, or unpredictable) modifications that a signal may suffer during capture, storage, transmission, processing, and conversion of the signal for purposes of recording and analyzing the signal of interest. This problem is made even worse when a prior art neurostimulation device is a non-dermal penetrating type of cuff electrode. When penetrating or intraneural electrodes are used to address this problem, nerve signal quality is improved at early time points, but the signal decays over time due to foreign body host response processes (e.g. inflammatory responses) and due to the micro-motion of the position of the tethered electrodes, in relation to the surrounding soft tissues into which the electrodes are embedded. Additionally, there is the inherent problem that whenever electrical stimulation is applied, there are large, sustained noise artifacts. Prior art attempts to address this have been through efforts at blocking or blanking out the noise, rather than subtracting out the noisy signals, thereby losing neural responses that may be measured locally with greater accuracy. An integrated approach as utilized in the present invention for developing a superior neuromodulation device therefore will comprise the four strategies of: (1) developing ultra-low noise hardware technology for sensing neural signals, most preferably (but not exclusively) without requiring electrode penetration into a nerve; (2) developing a deep neural network-based algorithm to analyze and decode signals; (3) developing hardware technology for both selective amplification of signals of interest and for removing stimulation signal residual charges and noise artifacts to support simultaneous recording and stimulation of a nerve; and (4) developing prediction models of therapeutic outcomes, based on stimulation parameters and neural signals. The present invention will, in its most preferred embodiment, play a major part in signal analysis and decoding, operating within the overall architecture of this four-part integrated approach.
Poor signal-to-noise ratio (SNR) of neural signals in nerves. Epineural electrodes, such as cuffs, provide a robust and stable interface for recording whole-nerve neural activity, but the electrical isolation of the epineurium/perineurium reduces the magnitude of signals, resulting in a low SNR. In particular, the biological noise in epineural electrodes can significantly distort recordings and even bury the neural signals, if the precision of the recorder is not sufficiently high. Post-signal processing to remove biological noise often creates new noise artifacts that can be confounded with nerve signals. Due to different chemical compounds, cell tissue environments, and tissue responses to implants, the electrode-tissue interface noise can be very different from a measurement in a bench testing apparatus. Several models and more recent measurement data suggest that a large portion of electrode noise is non-Ohmic (Johnson-Nyquist noise, or thermal noise), which is the electronic noise generated by the thermal agitation of the charge carriers (usually the electrons) inside an electrical conductor at equilibrium, which happens regardless of any applied voltage. For such non-Ohmic noise, the sensing electronics can play a role in reducing the electrode noise. The amount of electronics noise in nerve recordings can be quite large due to elevated filter noise. For example, when recording a nerve in the abdomen, the constant motion of viscera causes large amplitude-motion artifacts. To avoid saturating electronics, an add-on analog filter with a corner frequency at least ten times higher than the artifact frequency is required. This ten-fold requirement increases the analog filter noise in the neural signal band up to tens of μV and beyond. Therefore, it can be seen that the battle to improve neural recording signal quality goes beyond the optimization of individual noise components.
Inabilities to extract signals of individual fascicles and inabilities to develop chronic stability. Noninvasive nerve interface approaches provide small signals from a highly limited number of electrodes. Current technologies have demonstrated that recordings of compound nerve action potentials (CNAPs), mostly from exposed nerves, are sufficiently greater than the background noise activities, but CNAPs constitute such a volley of synchronous action potentials that it is not possible to deconvolute them into individual fiber activities, which is required to perform neural decoding. Spontaneous or less-synchronized neural activities from a nerve are much smaller than CNAPs, and where it is particularly true of cuff electrodes, it is seen that such signals are further attenuated by the physical presence of the nerve sheath. For example, it has been confirmed in the prior art that after using neuromuscular blockers, surface canine vagus nerve signals are in the range of microvolts to tens of microvolts for de-sheathed nerves, but are even smaller (estimated at less than 10 μV) when the epineurium was intact during surface recordings. A nerve is an enclosed, cable-like bundle of many myelinated nerve fibers, structured as sheaths: the endoneurium is a layer of connective tissue around the myelin sheath of each fiber. The endoneuria with their enclosed nerve fibers are bundled into nerve fascicles, and each fascicle is within its own protective sheath called a perineurium. Multiple fascicles are bundled within yet another sheath, the epineurium. These multiple protective sheaths isolate fibers, making it extremely hard to record and then modulate signals on individual fibers from the outside of the nerve. Invasive intraneural electrodes may produce detectable signals at early time points, but signal decay over time due to tissue response has remained a problem. Initial insertion of the electrodes causes an early host immune system foreign body response leading to tissue encapsulation, with extensive tissue damage resulting from the micro-motion of the tethered electrodes relative to the soft tissue. Due to a lack of chronic stability, intraneural electrodes pose a significant long-term usage challenge. Therefore, there is still a need to pursue non-penetrating neural interfaces with significantly reduced noise so as to be able to accurately record small nerve signals, which is a necessary prerequisite to therapeutic neuromodulation.
Inability to record microvolt-level nerve activity in the presence of stimulation pulses applied to the same nerve. During stimulation, electrode-generated stimulation artifacts often produce a shift in the differential mode signal and the common mode signal, both of which need to be properly rejected. Subtraction of the stimulation artifact requires compensating for the frequency-dependent amplitude and phase of the transfer function. This subtraction process cannot be done as a matter of routine because the process requires a very high precision amplifier buffer to store the collection of superimposed artifacts and the collected neural signals. As noted, in brain recording experiments, the amplitude of neural signals (spikes and field potentials) is seen to be around a few hundred μV, but the amplitude of stimulation artifacts can reach as great as several Volts. To deal with a signal amplitude that can be less than 10 μV, there is a requirement for higher precision electronics capable of carrying out linear amplification. Every extra bit of increased precision of this type requires a 4-fold increase in the supplied power, which is consistent with the thermal slope in commercial analog electronics. As a result of this phenomenon, a commensurate upgrade of present-day brain technologies that could support simultaneous recording and stimulation on a peripheral nerve would require a multi thousand-fold increase in power. A power source capable of such power will be relatively large, bulky, and highly undesireable from a patient's point of view, possibly even leading to patient non-compliance with use of the device.
Mismatch error. A central problem in the development of neurostimulator designs for electrical stimulation of neurons is referred to by those of ordinary skill in the art as that of mismatch error. In a signal processing system several operations or computations are performed on a signal in different stages sequentially. Each of these operations seeks to emphasize a wanted component or property of the signal of interest, without adding too much, or too many, unwanted extra components. These unwanted extra components are now known to be due to the non-idealities of a given circuit's implementation compared to the circuit's specified operation. Circuit non-idealities can be divided into two groups: random errors; and systematic errors.
In this field, random errors are the result of the randomly-determined, or stochastic, nature of many physical processes. The stochastic behavior of charge carriers in a conductor, for instance, results in various types of noise signals, and the stochastic nature of the physical phenomena that take place during the manufacturer's fabrication of integrated circuits results in a random variation of the properties of the fabricated on-chip devices and furthermore results in mismatches between identically designed devices.
Systematic errors occur because a typical circuit implementation only approximates an ideal signal processing operation to a limited extent. These errors are caused, for instance, by the non-linear operating characteristics of devices or by the influence of parasitics (unwanted resistance, capacitance, or inductance in a circuit element) in the signal path or device structure.
The effect of these non-idealities may be of different kinds. The non-ideality of noise signals limit the minimal signal that can be processed with the system. The non-ideality of device mismatch limits the accuracy of the circuit behavior and again limits the minimal signal or energy that is required to execute meaningful signal operation functions. For linear systems, the non-linearities of devices generate distortion components of the signals or modulate unwanted ‘noise’ signals into the used signal band. This typically limits the maximal signal that can be processed correctly.
The circuit designer of ordinary skill in the art has heretofore attempted to reduce the effect of such distortion non-idealities by using small modulation indices for the bias signals. By using large device sizes, the impact of mismatch is lowered and by using low impedance levels, the thermal noise signals are reduced. Such measures have, however, very important consequences on the power consumption and operational speed of the system. Therefore, the quality of a circuit realization is evaluated from the obtained accuracy, noise level, or linearity relative to the used power and the speed of operation, all in an effort to achieve, for a given speed, an optimized balance of best performance with minimal power consumption.
Transistor mismatch. In the specialized circuit case of transistor mismatch, the circuit designer of ordinary skill can reduce the effect of distortion non-idealities by the use of small modulation indices for the bias signals; so by using large device sizes, the impact of mismatch is lowered, and by using low impedance levels, the thermal noise signals are reduced. These measures have, however, very important consequences on the power consumption and operation speed of the system. Therefore, the quality of a circuit realization is evaluated from the obtained accuracy, noise level or linearity relative to the used power and the speed of operation. The designer would try to achieve, for a given speed, the best performance with minimal power consumption.
Inherent transistor mismatch. Any two identically designed devices, here transistors, on an integrated circuit have random differences in their behavior and show a certain level of random mismatch in the parameters which model their behavior. This mismatch is due to the randomly determined, or stochastic, nature of physical processes that are used to fabricate such devices. Mismatch is thus the process that causes time-independent random variations in physical quantities of identically designed devices. For example, the mismatch of two complementary symmetry metal-oxide silicon transistors (CMOS), that are identical in their manufacture, is characterized by the random variation of the difference in their threshold voltage VT0, their body factor γ and their current factor β. For technologies with a minimal device size larger than typically 2 μM, a widely accepted and experimentally verified model for these random variations is a normal distribution with mean equal to zero and a variance dependent on the gate-width W and gate-length L and the mutual distance D between the devices. The characterization of transistor mismatch is a tedious process which requires a very large measurement effort. The design, realization, and validation of the measurement set-up, the acquisition of the experimental data and the statistical processing of the data have to be performed with great care to avoid errors and systematic effects. Moreover, when migrating towards sub-micron and deep-sub-micron technologies, the standard mismatch models have to be checked for their validity; if necessary, the effects of the short or narrow channel effects have to be accounted for in model extensions. A general relation can be derived for the minimal power consumption of a signal processing system due to the effect of the mismatch in the components. Transistor mismatch (as well as the phenomenon of thermal noise) are both random processes and therefore put a limit on the smallest signal that can be processed in a circuit; both phenomena will impose a minimum power consumption to achieve a certain drive, specification, accuracy, and speed. Prior art knowledge in the field of transistor mismatch held that such mismatch puts a fundamental limitation on the maximal total performance of analog signal processing systems, since the Speed-Accuracy/Power ratio is fixed by technological constants that constrain the ability to express the theoretical matching quality of the technology as a device.
Exemplary prior art efforts and attempts to control and reduce mismatch are discussed in “Implications of transistor mismatch on analog circuit design and system performance”, https://www.ee.columbia.edu/˜kinget/papers_files/chapter3.pdf, the entire disclosure of which is incorporated herein by reference, and which readily shows the great degree of challenge and importance placed on the problem of reducing mismatch. The origins of transistor mismatch, on the other hand, are linked to the given device structure, and device physics, and to the fabrication technology of integrated circuits. Device mismatch originates from the stochastic nature of physical processes used for the industrial fabrication of devices, such as ion implantations, diffusions, or etching. The device structure using a channel in a doped material and its operation by modulating the channel resistance result in random fluctuations of the device's properties and operation. For integrated circuit technologies that are fabricated and used today, these physical limitations are very fundamental and device mismatch is unavoidable. From this perspective, the limits imposed by device mismatch are restricted to signal processing systems realized using integrated circuits. As such, they are of course very important in the quest for minimal power consumption in integrated circuits. Prior art attempts to cope with the above described challenges include the following fields.
Deep neural networks to process nerve neural signals. Recording nerve neural signals with cuff electrodes is an important milestone towards developing a high-performance, minimally invasive neural interface. The thrust of this is to develop tools to analyze and understand the observed neural signal recordings. Differing from a brain single-unit recording which contains activities of a few neurons, a cuff electrode records neural signals from a nerve bundle of thousands of axons, where the recorded signals can vary in shape and in pattern, and are characterized in having poorer signal to noise ratios. Therefore, methods commonly used to process brain signals (for example, spike sorting, firing interval engineering, and rate based codings) will be less effective in processing nerve neural data. The ability to separate weak neural signals from background noise is crucial in nerve signal processing. Signal detection is preferably accomplished in a preferred embodiment of the invention by using a modified deep variational autoencoder (VAE) means for signal detection. An exemplary deep VAE consists of sequentially connected encoder and decoder networks, where the encoder learns a class label y and a probability distribution of the code z with stochastic variables of the input data x, and the decoder aims to reconstruct the input based on the class label and the code. Use of such a deep VAE means may enable the development of a large-scale, well-annotated nerve dataset, as well as a thorough exploration of inputted signals and noise, and the generation of representations of the collected and inputted signals and noise, all through the use of the deep VAE, which in turn enables the enforcement use of a de-noising criterion such that the noise will be maximally removed. After such a training phase, the deep VAE will be able to de-noise the received data in a subject or patient and hence to improve signal detection. The present invention's novel use of an improved and novel VAE is performed in combination with a novel dataset and a novel de-noising algorithm.
Datasets. Deep learning algorithms rely on large-scale, well-annotated datasets to achieve a superior performance. For example, ImageNet, a large-scale visual database designed for use in visual object recognition software research, contains over 14 million hand-annotated images, and is considered by those of ordinary skill in the art as having enabled a revolution in deep learning. The database of annotations of third-party image is freely available directly from, for example, ImageNet at https://www.image-net.org. In the present invention, to bridge deep learning and neural signal processing, a dataset similar to the taxonomy and annotation strategy of ImageNet is first constructed, according to procedures and processes well known to those of ordinary skill in the artificial intelligence (AI) arts. The dataset then is used for developing neural signal processing algorithms.
Dataset generation. Cuff electrode data are a data summation from both filtered intraneural signals (signals within the nerve) and from noise arising out of external sources. Normally, cuff electrode data (both signals and labels) are not available for learning algorithms, especially for supervised learning, to record high quality, multi-site intraneural signals, and must be generated by the user or practitioner as part of the practice of the invention as claimed. The inventors have now built a cuff electrode dataset based on intraneural signals. First, a finite element model of epineurium signals is developed to simulate cuff electrode neural signals based on multi-site intraneural signals. To this database is then added noise that has been segmented from cuff electrode recordings, and the procedure is repeated with data from different electrodes and data from experimentally-derived and from third party-sourced animal model preparations. This yields a dataset derived from a sufficient set of experiments that the dataset can support the development of supervised learning algorithms to process neural signals.
Deep learning de-noising. Mathematically, the data representation process with the deep VAE can be expressed as:
pθ(x,y,z)=pθ(x|y,z)p(y)p(z)
where pθ(x|y, z) quantifies how the observed values of x are related to the latent random variables y and z, and p(y), p(z) represent a known prior distribution of the latent variables y and z. Given this representation model, the posterior distribution pθ(y|z, x) can be used to infer y, z and to find parameters θ that maximize the marginal likelihood pθ(x). To approximate the intractable pθ(y|z, x) a decoding distribution qΦ(y|z, x) is modeled by learning the parameters Φ from the data. Next, one considers a 1-D time-series input xt={Xt−T1, . . . , Xt+T2}, where X represents a single-electrode recording and [t−T1, t+T2] is a temporal scanning window. The binary classification label (i.e., either neural signals or noise) at time t is denoted as a one-hot vector yt, and the corresponding latent variables are represented as zt. The preferred embodiment of the deep VAE of the present invention models a joint distribution according to pθ(xt|yt, zt) factorized as pθ(xt, yt, zt)=pθ(xt|yt, zt)p(yt)p(zt). For the decoder model, the present invention uses pθ(xt|zt, yt)=N(μθ(zt, yt), σ2θ(zt, yt)I); and for the encoder model, relying on the theory of variational inference to approximate the intractable posterior, pθ((z|x, yt) with a tractable auxiliary distribution qΦ(zt|xt, yt)=N(μΦ(xt, yt), σ2Φ(xt)I). In the supervised case with an annotated dataset, the label yt is observed, allowing the parameters θ and Φ to be optimized by maximizing the extended variational lower bound as expressed as:
log pθ(xt,yt)≥EqΦ(zt≥|xt,yt)[log pθ(xt|yt,zt)+log pθ(yt)+log pθ(zt)−log qΦ(zt|xt,yt)]=def LL(xt,yt).
For de-noising a nerve recording, the user injects the cuff electrode noise ε into xt to synthesize cuff recordings ˜xt=xt+ε, where the noise is picked from the cuff data.
Simultaneous recording and stimulation on a peripheral nerve. Proof of concept of electroceuticals requires integrating the stimulation function and performing personalized adaptive neural modulation therapies based on neural feedback. Another challenge that the invention had to overcome is that nerve neural signals are relatively very weak, and thus they are vulnerable to the stimulation noise artifacts. To reduce such noise artifacts, a key feature of the novel invention as claimed is that of the novel redundant crossfire (RXF) stimulator design, based upon redundant sensing scientific theory.
Redundant sensing. Redundancy is a fundamental characteristic of many biological processes such as those in the genetic, visual, muscular, and nervous systems; yet its underlying causative driving mechanism is not well understood. A complete discussion of the phenomenon of redundancy is set forth at A Bio-inspired Redundant Sensing Architecture, accessible at https://papers.nips.cc/paper/6564-a-bio-inspires-redundant-sensing-architecture.pdf the entire disclosure of which is incorporated herein by reference. The present invention utilizes the redundancy inherent in materials engineering to enhance the accuracy and precision aspects of the system, by focusing on the application of the phenomenon of redundancy to reduce stimulation signal residual charge, and thus reduce the effects of stimulation noise artifacts. In the invention's use of redundant sensing, each entry of information can be represented by a plurality of distinct configurations or microstates, and there is a distinct subset of such microstates that will allow linear representation of the entries of information, and such a set or subset will not be bounded by the classic Shannon limit (see C. E. Shannon, The Mathematical Theory of Communication, by Claude E. Shannon and Warren Weaver. University of Illinois Press, 1964, the entire disclosure of which is incorporated herein by reference) when processed according to the practice of the present invention. The invention's identification of an optimized subset is an NP-incomplete problem, but it is possible to find a sub-optimal solution with sufficient efficiency to obtain a well-operating final complete embodiment of the invention. For example, in the case where a target stimulus signal is a 100 μA biphasic current, with a 6-bit resolution in amplitude, the anodic and cathodic branches will have up to a 3% mismatch depending on electrode conditions and clock jitter. Thus, the mismatch current is 100 μA×(3%+½6)=4.5 μA, which represents the cause of the resulting residual charge and stimulation noise artifacts. It can be seen from this example that a given amount of mismatch is stimulus dependent, time variant, and sensitive to electrode-electrolyte offset, thus posing a significant challenge to effective reduction of residual charge and stimulation noise artifacts, without having to resort to the prior art strategies of increasing the amount of power consumed or increasing the size of the neurostimulation device, both of which are product design strategies that ultimately produce a finished device of poor ergonomics and disappointing user satisfaction, possibly even resulting in patient noncompliance.
RXR stimulator. Based on the redundant sensing strategy, the present invention comprises an redundant crossfire, or RXF, stimulator, wherein the outputs of two or more independent stimulation channels with a current-digital-to-analog converter (IDAC) output driver will effectively form a redundant sensing structure. The sensed redundancy is exploited to fine tune and achieve precise matching between the anodic and cathodic stimulation currents, thus suppressing the residual charge and stimulation noise artifacts.
Accordingly, a need exists for a solution to at least one of the aforementioned challenges. The present invention addresses the challenges of the shortcomings of the prior art in attempting to solve the problems in circuit engineering described above, by designing a high-resolution constant-current stimulator (CCS) in integrated circuits without incurring penalties such as relatively large silicon area and/or high degree of power consumption because of the phenomenon of electronic component mismatch error in general, and transistor mismatch error in particular. Studies have shown that the phenomenon of random mismatch error is one of the major factors in limiting circuit design's effective resolution of such problems, especially when scaling down the circuits to submicron CMOS processes. Arising from random variations in the lithography process that are beyond the designers' control, mismatch error is the scourge of high-resolution analog IC designs. Nearly all neurostimulator designs are affected because mismatches appear in any type of component on an integrated circuit (IC) such as transistors, diodes, resistors, and capacitors. Current-controlled stimulators (CCS) are primarily affected by transistor mismatches, while voltage-controlled stimulators (VCS) and switched-capacitor stimulators (SCS) are primarily affected by transistor and capacitor mismatches. Mismatches influence the circuit's ability to produce accurate current/voltage output and synchronously match negative and positive stimulation phases, leading to charge imbalance problems. The work and resources involved in compensating for these errors requires extra calibration circuits, which in turn add complexity, area, and power.
Exploitation of the phenomenon of excessively large mismatches. All previous works in the literature have employed calibration circuits or chip layout techniques to attempt to remove or compensate for random mismatch error. Here, in the present invention as claimed, we disclose an entirely different approach to address this challenge, not by avoiding or compensating the mismatch error, but by embracing and exploiting excessively large mismatches to achieve super-resolution over 10-fold beyond the intrinsic resolution of the design. The redundant crossfire, or RXF, circuitry and method involves combining (i.e., crossfiring) the output of two or more current drivers to form a redundant structure. In the presence of large random mismatch errors (10-20%), such resultant redundant structure may be configured to generate the output that has an effective resolution that is many times above the Shannon limit as determined by physical constraints, including the number of unit-transistors. RXF in the present invention as claimed is a practical derivation of the theoretical framework that includes RS and RS-based super-resolution, wherein information redundancy is elegantly engineered and manipulated to boost system resolution. Furthermore, by handling extremely large mismatches, the present invention now makes it possible to implement high-resolution analog circuits in deep submicron technologies.
High-resolution, fully-integrated neurostimulators are at the core of many implantable or wearable devices. The neurostimulator's function is to generate stimulation pulses with accurately controlled parameters such as pulse-width, current amplitude, and frequency. It is a well-established method for interfacing with neural circuits well known to those of ordinary skill in the art. Proper uses of neurostimulation potentially offer a viable conduit to relay information to the human brain, and neurostimulation is widely used in neuroprosthesis applications to augment or replace missing or degraded human sensory functionality. Uses can include retinal implants for restoring vision, cochlear implants for restoring hearing, and prosthetic limbs for restoring somatosensation.
The present invention demonstrates a specific, most highly preferred application of a novel neurostimulator chip, in a prosthetic limb neuroprosthesis system, for the restoration of somatosensation for an amputee. A similar design can be adopted in a wide range of neuromodulation applications where the stimulator is the essential component of a bidirectional human-machine interface.
In a preferred embodiment of the present invention, a novel circuit, conceived of to be a component of one or more integrated circuits, is employed in order to utilize a redundant crossfire (RXF) technique in the design of neurostimulators, with super-resolution accuracy. The technique derives from the redundant sensing circuit architecture known to those of ordinary skill in the art. See Luu et al. (2019). Achieving Super-Resolution with Redundant Sensing. IEEE Transactions on Biomedical Engineering, 66(8), 2200-2209. (2019), the entire disclosure of which is incorporated herein by reference. There, the aim was to achieve engineering information redundancy, built into the system's architecture, in order to exploit the phenomenon of random transistor mismatch, and to thereby enhance the overall effective resolution capability of the device. The application of RXF in the present invention involves combining the RXF (i.e., crossfiring) outputs of two or more current drivers in order to form a redundant structure. See Nguyen et al. (2021). Super-Resolution in Neurostimulator Design by Exploiting Transistor Mismatch. IEEE Journal of Solid-State Circuits, 56(8), 2452-2465. (August 2021), the entire disclosure of which is incorporated herein by reference. When properly configured, this novel redundant structure can produce accurate current pulses with an effective super-resolution that is beyond the limitation commonly permitted by the physical constraints. Notably, and unlike any previous works, the novel circuitry of the device of the present invention unexpectedly and surprisingly achieves high accuracy by directly exploiting random transistor mismatch with an excessively large mismatch ratio of 10-20%, an outcome which cannot have been predicted with a reasonable degree of success.
In one most preferred embodiment of the present invention, effectiveness is significantly increased by, for example, incorporating a neurostimulator chip characterized in that each of a plurality of current drivers has a 5-bit current digital-to-analog converter (IDAC) and two 4-bit current multipliers. By crossfiring two drivers, it is feasible to achieve an effective super-resolution of 9.75 bits in a 1.1 mA full-range or 27× the ideal intrinsic resolution of each IDAC. The performance boost is verified through benchtop measurements of fabricated chips, and is consistent with the Monte Carlo (i.e. a broad class of computational algorithms that rely on repeated random sampling to obtain numerical results, where the underlying concept is to use randomness to solve problems that might be deterministic in principle) simulations that were run, demonstrating that the proposed technique is robust and dependable. A most highly preferred application of the fabricated chip here is to deliver neuro-feedback to a human amputee through peripheral nerves, where the amplitude of stimulation pulses is being accurately controlled in order to encode the intensity of tactile response.
The process of quantization i.e., analog-to-digital conversion (ADC) and the reverse operation de-quantization i.e., digital-to-analog conversion (DAC) are the basis of all modern sensory data acquisition systems. They allow “digital” artificial systems to sense and interact with the “analog” physical world. Quantization is essentially a lossy data compression process where information from a higher-resolution space is represented in lower-resolution counterparts. In practical implementations, the precision of this process is always bounded by the system resource constraints such as size, power, bandwidth, and memory, etc. For example, in many ADC and DAC integrated circuits designs, an addition 1-bit of resolution or 2× precision often require a 4× increase of chip area and power consumption. While ultra-high resolution ADCs/DACs up to 32-bits are possible, the large size and power consumption limit the use of these devices in many practical applications. Similarly, higher resolution image sensor requires more pixel count and buffer memory thus also results in larger device and power consumption. While it is possible to improve the pixel density, the smaller pixel size is associated with increased noise which limits the sensor's dynamic range.
Super-resolution (SR) are techniques that aim at achieving an effective resolution exceeding the precision that the system's resource constraints commonly permit. They have wide applications in various fields of engineering and science concerning imaging and instrumentation where higher resolution data acquisition is always desired. Previous SR techniques focus on recovering fine details of the object of interest by integrating the information obtained from coarse observations. These techniques could be generally divided into two primary classes: modeling-based and oversampling-based, which are also known as single-frame and multi-frame in image processing.
Modeling-based (single-frame) techniques focus on modeling the input sources from available data points and reconstructing the missing information by means of approximation. In these techniques, SR is achieved by relying on known statistical properties of the input signals such as their sparse property as utilized in compressive sensing, or properties extracted from numerous example data as utilized in many machine learning based methods. On the other hand, oversampling-based (multi-frame) techniques acquire and combine multiple samples of the input obtained at various spatial or temporal instants to extract the sub-least-significant-change information. In these techniques, SR is possible because the low-resolution data contain aliasing which embeds high-resolution contents that can be extracted with sufficient amount of data by algorithm based (e.g., de-noising, deconvolution, etc.) or machine learning based methods. For compressive sensing or other data-driven methods including most existing machine learning based techniques, optimization or approximation is performed during the reconstruction process, after the low-resolution data have been acquired.
Additionally, mismatch error is one of the major obstacles hindering the implementation of high-precision DACs/AD Cs in sub micron CMOS processes. Mismatch error is the random deviation taken place in during the fabrication of integrated circuits (ICs). Mismatch error can result in random changes of the intrinsic properties of the IC components including active electrical elements such as transistors and/or passive electrical elements such as capacitors and/or resistors, which leads to unpredictable behavior of the circuit and the degradation of the overall system precision. For example, a DAC/ADC designed with 10-bit resolution may only have an effective resolution about 8-9 bits in practice due to mismatch error.
It would therefore be desirable to provide systems and methods for designing digital-to-analog converters that provide super-resolution without post-processing and in presence of mismatch error.
In summary, the invention, in its most preferred embodiment, is a neurostimulator system, comprising at least one digital-to-analog converter configured to receive an analog peripheral nervous system electrical signal from a subject or a patient, and to convert the analog signal into a corresponding digital signal; at least two current mirror circuits configured to receive digital electrical signals from the digital-to-analog converter and to provide mirrored current to at least two additional circuit components; at least two or more current drivers, at least one being an anodic output current driver, and at least one being a cathodic output current driver, the drivers being configured to scale the current signals received from the mirror circuits by a multiplying factor, and further configured to driving the constant current to at least one output electrode; wherein the outputs of the two or more current drivers are configured so as to create a combined, crossfiring, output of the current drivers that produces a redundant sensing structure, that in turn produces accurate current pulses that have the property of having an effective super-resolution accuracy beyond the ordinary limitations that are imposed by the predicted inherent physical constraints of materials in the system. The redundant sensing structure is configured so as to achieve a super-resolution signal accuracy outcome by applying the effects of random mismatch error function to the system, with the proviso that mismatch avoidance and mismatch compensation functions are not applied in achieving such super-resolution signal accuracy outcomes. In a most highly preferred embodiment, the random mismatch error function is configured so as to select and tune transistor size to achieve a desired mismatch ratio of 10% to 20%. Preferably, the system additionally comprises an on-chip timing generator, and additionally comprises both on-chip and off-chip components that are each configured so as to retrievably store calculated optimal transistor configurations obtained through foreground calibration, and which configurations can be retrieved and read by the on-chip timing generator so as to produce signal output with super resolution accuracy. Such an on-chip component is preferably a memory chip component of the system, whereas the off-chip component is a look-up table component of the system. The system additionally comprises an external controller configured so as to ensure charge-balancing that is achieved by digital compensation for residual mismatch between the anodic and cathodic currents. This charge balancing capability of the system is further characterized as being able to finely level charge balancing within the system, or to coarsely level charge balancing within the system. The system is configured so as to modulate the neurostimulation intensity of the cross firing redundant signal output to create various levels of somatosensorial signal outputs of from light to strong touch in real time in a neuroprosthesis device. The described random mismatch error function is configured so as to select and tune resistor size or to tune capacitor size or to tune diode size to achieve a desired mismatch ratio. A preferred embodiment of the system is configured so as to apply the effects of a random mismatch error function in the system, in turn configured so as to be applied to extremely large mismatch sets to achieve super-resolution that is over 10-fold beyond the intrinsic resolution of the system that one of ordinary skill would predict as being imposed by the physical constraints of the materials utilized in the manufacture of components in the system. The circuit of the invention may be embodied in a high-resolution constant-current stimulator neuroprosthesis neurostimulator chip. The circuit of the invention may be embodied in an electrical neuromodulation neurostimulator chip for the generation of neurostimulation signals in a neuroprosthesis. The invention additionally comprises a method of rehabilitating an amputee by fitting the amputee with a tactile-sensitive neuroprosthesis comprising the neurostimulator chip of the present invention. A preferred neuroprosthesis is a prosthetic forearm and hand while an alternative embodiment preferred neuroprosthesis is a prosthetic hand.
In another aspect, the incorporation of, and combination of, a digital-to-analog converter device is provided by the present disclosure. The digital-to-analog converter device includes a set of components, where each component included in the set of components includes a number of unit cells and at least one component including a number of unit cells that is not a power of two. The digital-to-analog converter device further includes a plurality of switches, each switch included in the plurality of switches being coupled to a component included in the set of components, an output electrode coupled to the plurality of switches, the digital-to-analog converter device being configured to output an output signal at the output electrode, and a controller coupled to the plurality of switches. The controller is configured to receive a desired output current, determine an anodic component configuration including at least one component included in the set of components based on the desired output current, determine a cathodic component configuration including at least one component included in the set of components based on the desired output current, and cause a current pulse to be output at the output electrode based on the anodic component configuration and the cathodic component configuration.
In the digital-to-analog converter device, the current pulse can include a positive current pulse and a negative current pulse.
In the digital-to-analog converter device, the controller can include a memory that can include a set of positive current values and negative current values associated with a set of component configurations, and the anodic component configuration and the cathodic component configuration can be included in the set of component configurations.
In the digital-to-analog converter device, the anodic component configuration can include at least one component not included in the cathodic component configuration.
In the digital-to-analog converter device, an effective resolution of the digital-to-analog converter device can be at least four times greater than an intrinsic resolution of the digital-to-analog converter device. The effective resolution of the digital-to-analog converter device can be equal to a Shannon entropy of the digital-to-analog converter device, and the intrinsic resolution can be equal to log base two of the number of unit cells plus one.
The digital-to-analog converter device can be included in a neurostimulator device.
In the digital-to-analog converter device, a first unit cell size associated with a first unit cell included in the set of components can be different than a second unit cell size associated with a second unit cell included in the set of components, and the first unit cell size can include a length and width of the first unit cell. The first unit cell size and the second unit cell size can be associated with a transistor process size.
In the digital-to-analog converter device, each unit cell can include at least one transistor.
In the digital-to-analog converter device, an effective resolution of the digital-to-analog converter device can be at least two hundred times greater than an intrinsic resolution of the digital-to-analog converter device for at least ninety-five percent of a sample space of the digital-to-analog converter device.
In another aspect, a digital-to-analog converter device including a set of components, each component included in the set of components including a number of unit cells, each unit cell being associated with a unit cell size indicating manufacturing specifications of the unit cell is provided by the present disclosure. The digital-to-analog converter device further includes a plurality of switches, each switch included in the plurality of switches being coupled to a component included in the set of components, and an output electrode coupled to the plurality of switches. The digital-to-analog converter device is configured to output an output signal at the output electrode. A first unit cell size associated with a first unit cell included in the set of components is different than a second unit cell size associated with a second unit cell included in the set of components.
In the digital-to-analog converter device, the unit cell size can include a length value and a width value.
In the digital-to-analog converter device, the unit cell size can be associated with a transistor process size.
In the digital-to-analog converter device, at least one component included in the set of components can include a number of unit cells that is not a power of two. [0022] The digital-to-analog converter device can be a current digital-to-analog converter.
The digital-to-analog converter device can further include a controller coupled to the plurality of switches. The controller can be configured to receive a desired output current, determine a component configuration based on the desired output current and a predetermined output current value measured at the output electrode, the predetermined output current value associated with the component configuration, and cause a current pulse to be output from the digital-to-analog converter device based on the component configuration.
In yet another aspect, a method for determining manufacturing parameters for a digital-to-analog converter device including a set of components, each component included in the set of components including at least one unit cell, and each unit cell being associated with a unit cell size is provided by the present disclosure. The method includes determining a required mismatch error value for the unit cells included in the component set based on a targeted effective resolution value, determining an initial unit cell size based on the required mismatch error value, setting the unit cell size of each unit cell included in the component set to be equal to the initial unit cell size, determining an effective resolution of the digital-to-analog converter device by performing simulations, determining that the effective resolution is below the targeted effective resolution, adjusting the unit cell size of one or more unit cells included in the component set in response to determining that the effective resolution is below the targeted effective resolution, and providing each unit cell size associated with each unit cell to a manufacturing facility.
In the method, the targeted effective resolution can be at least four times higher than an intrinsic resolution of the digital-to-analog converter device.
In the method, the unit cell size can include a length value and a width value, and each unit cell can include at least one transistor.
In the method, at least one component included in the set of components can include a number of unit cells that is not a power of two.
In the method, the simulations can be Monte Carlo simulations.
The foregoing and other aspects and advantages of the invention will appear from the following description. In the description, reference is made to the accompanying drawings which form a part hereof, and in which there is shown by way of illustration a preferred embodiment of the invention. Such embodiment does not necessarily represent the full scope of the invention, however, and reference is made therefore to the claims and herein for interpreting the scope of the invention.
Turning first to
i
A
=I
IDAC
·x
SA
=I
ref
·x
D
·x
SA
i
C
=I
IDAC
·x
SC
=I
ref
·x
D
·x
SC
Where Iref is a fixed reference current, xSA and xSC are the multiplier codes, and xD is the IDAC code.
Σ(n)=(2N
With each additionally added crossfire driver, the number of configurations (i.e., level of redundancy) grows exponentially, but the physical resources required, i.e., for example chip area, will only increase linearly. This is a significant improvement in improving signal output and quality without a parallel increase in apparatus resource, which would otherwise impose physical size constraints and energy consumption constraints on a neuromodulation device.
Code diffusion allows for the generation of sub-integer codes, e.g. [0.1, 0.2, 0.3, . . . ] with a certain probability that is not normally possible. These sub-integer codes correspond to the sample space's finer partitions, so that there is thus an effective super-resolution that is beyond the baseline figure. For example, to achieve a (+1) super-resolution, redundant configurations that generate all the e.g. sub-integer codes of [0, 0.5, 1, 1.5, . . . ] must be found. To achieve (+2) super-resolution, the required sub-integer codes are [0, 0.25, 0.5, 0.75, 1, . . . ]. While identifying the correct configuration for every output code is an NP-hard optimization problem, it is only possible in an information redundant architecture such as RS. In computational complexity theory, a problem is NP-complete when: a brute-force search algorithm can solve it, and the correctness of each solution can be verified quickly, and the problem can be used to simulate any other problem with similar solvability; where RS is Reed-Solomon codes, which operate on a block of data treated as a set of finite field elements called symbols. RS codes are able to detect and correct multiple symbol errors. The probability of accomplishing this task is maximized when the codes distribute evenly across the sample space, as shown in
H
N
=log2√{square root over (12·MN
where HN
where SN
Proceeding contrary to conventional wisdom, the present invention utilizes a large level of transistor mismatch of approximately 10-20% as a desirable element of a most preferred design embodiment. The present invention's key advantage is its ability to convert mismatch error from a concerning and vexing problem into a desirable and useful means for achieving previously unachievable signal resolution and sensitivity, allowing designers of ordinary skill in the art to utilize smaller-sized components, and to relax physical layout constraints, which were engineering compromises that were required to be made in order to suppress mismatches in past design approaches. While the implication is that the RXF technique would work better in a deep submicron complementary metal-oxide semiconductor (CMOS) process with a large amount of mismatch, the random mismatch existing in the standard CMOS process may not be adequate. In situations where a “naturally” occurring mismatch is thought to be insufficient, it is now possible to increase the amount of error on purpose.
The on-chip timing generator circuits produce stimulation pulses. This is essential to achieve a near-perfect synchronization of multiple drivers in a crossfire configuration. All of the stimulation parameters, such as pulse-width, IDAC, multiplier, polarity, and the like, are stored in integrated registers. The anodic and cathodic phases of a biphasic pulse can be independently configured to produce both symmetrical and asymmetrical stimulation with any ratio setting. New IDAC and multiplier configurations are loaded during the interphase delay. In a most preferred embodiment of the invention, a 16-bit register at a base clock of 10 MHz to control the pulse-width is used. This allows generating any timing from 0.01 msec to 6.56 msec with 0.1 μsec adjustment step. The adjustment step is also used to digitally compensate for the residual mismatch between the anodic and cathodic currents to ensure charge-balancing. This is achieved by tuning the anodic and cathodic pulse-width such that:
minimize|iA·(tA+ΔtA)−iC·(tC+ΔtC)|
The adjustment timings (ΔtA, ΔtC) are computed by an external controller based on the measured currents iA, iC and required pulse-width (tA, tC).
Chip measurement results.
Turning now to
Super Resolution Digital-to-Analog Converters Based on Redundant Sensing.
Systems and methods for producing digital-to-analog converters (DACs) that provide super-resolution without post-processing and in the presence of mismatch error are now provided by the present disclosure.
The UN grouping-based SR technique detailed here is fundamentally different from certain previous approaches because it does not involve reconstructing the missing information nor rely on any statistical properties of the input data. The SR capability has been embedded in the sensor's endogenous structure once fabricated thanks to its redundant architecture. This “hidden” potential must be revealed by optimization in order to achieve SR data acquisition. The optimization process only needs to be done once for each sensor and is independent of the input signals. Once optimized, the sensor can capture any type of signals at super-resolved resolution regardless of their statistical distributions. For compressive sensing or other data-driven methods including most existing machine learning based techniques, optimization or approximation is performed during the reconstruction process, after the low-resolution data have been acquired. In contrast, for the UN grouping method, optimization is performed on the sensor before acquiring any data and the fine-detailed information content of the input signal is never lost during quantization. This is achieved not only because of the RS architecture itself but also by elegantly manipulating mismatch error—an undesirable precision-limiting factor in conventional designs.
In the following “Super Resolution” section, the mechanisms of the new theory to facilitate SR in a RS architecture are presented. The Monte Carlo method is used to demonstrate the advantages of the UN technique. The Monte Carlo analysis is an effective and widely-used methodology when traditional proofs are too complex or not feasible, especially in this case which can be shown to be a NP-hard optimization problem. The analysis is performed at both abstract-level where a simple probabilistic distribution of the components is assumed and circuit-level where all the non-ideal factors due to process variation are considered. A component is an assembly of one or more unit cells that behaves like a single entity. The component set (which may also be referred to as a set of components) is the collection of components used by the sensor to generate its internal reference. For example, a binary-weighted sensor has the component set of {1, 2, 4, . . . , 2N-1} that is assembled from 2N−1 identical unit cells where a unit cell has the weight of 1 (unit). The unit cells can output an electrical signal such as a voltage or a current. The results demonstrate an extra 8-9 bits resolution or 256-512× precision can be accomplished on top of a 10-bit quantizer at 95% sample space. In the “Practical Consideration And Applications” section, potential applications and practical considerations of the proposed SR technique in fully-integrated miniaturized biomedical devices where the structure's complexity can be mitigated by approximation or conveniently circumvented are described. An example design is shown where the UN grouping technique can be applied to boost the resolution of the current DAC in a neurostimulator, giving more precise control of the output stimulation current.
Super-Resolution; Quantization and Mismatch Error
Quantization is a process of mapping a continuous set (analog) to a finite set of discrete values (digital). Without loss of generality, it can be assumed that a No quantizer divides the continuous interval [0, 1) into 2N 0 partitions defined by a set of references θ0≤θ1< . . . ≤θ2 N 0 where each partition is mapped onto a digital code d ranging from 0 ro 2N 0−1. It can be shown that HN 0<N0 for all values of reference θd. Equality occurs only when 2N 0 references are equally spaced, i.e., ∀i,j:θi+1−θi=θj+1−θj. This fundamental maximum value of entropy is referred as the Shannon limit, where the device's effective resolution is theoretically bounded only by its intrinsic quantization error.
In practice, the quantizer's precision is also affected by the randomly occurred mismatch error, resulting in the undesirable deviation of the references and degradation of entropy. For example, some integrated ADC or DAC chips generate their references by arrays of identical elementary components regarded simply as unit cells. A N0-bit device generally has 2N 0−1 unit cells which could be miniature capacitors, resistors or transistors. The random mismatch of individual unit cells due to variations of the fabrication process and other non-ideal factors is one of the primary sources of mismatch error that could significantly deteriorate the device's precision.
To effectively control the unit cells, the cells are generally grouped into bundles regarded simply as components. Grouping significantly reduces the number of control signals required. For example, with the conventional binary-weighted method, 2N 0−1 unit cells are arranged into No components with the nominal weight of {20, 21, . . . , 2N 0-1}. Such system is orthogonal because with No binary control signals, i.e., 0/1 bits, 2N 0 references corresponding to each digital code in [0, 2N 0−1] can be uniquely created by selecting and assembling the components according to the binary numeral system.
Redundant Sensing. Redundant Sensing (RS) is a design framework that aims at engineering redundancy for enhancing the system's performance regarding accuracy and precision, instead of reliability and fault-tolerance like other designs. A practical RS implementation must satisfy two criteria, namely representational redundancy (RPR) and entangled redundancy (ETR). RPR refers to a non-orthogonal scheme of information representation where every outcome in the sample space is encoded by numerous distinct system configurations. Each configuration responses differently to mismatch error such that in any given instance, there almost always exists one or more configurations that have smaller errors than the conventional representation.
ETR refers to the implementation of the RS structure such that the statistical distribution of different system configurations is partially correlated (i.e., entangled) allowing a large degree of redundancy without incurring excessive resource overhead. ETR should be differentiated from conventional replication-based method to realize redundancy where the degree of redundancy is linearly proportional to the resource utilization. While using the same amount of physical resource (i.e., 7 unit cells), in the RS structure, each digital code can be created by multiple distinct assemblies of components, each expresses a different, partially correlated distribution with respect to random mismatch error. This redundant system of information representation has been shown to suppress mismatch error by allowing searching for the optimal component assembly with the least error with respect to each and every digital code. The redundant mechanism can be elegantly exploited to realize an effective resolution beyond the conventional limit of No bounded by quantization error.
Code Diffusion. Mismatch ratio am is defined as the standard deviation of each unit cell which is assumed to have a Gaussian distribution with unity mean. In the absence of mismatch error or σm=0, regardless how the unit cells are grouped and assembled, an array of 2N 0−1 identical units can only generate a finite number of references. Code diffusion is the property of an RS structure where the actual value of its internal references spreads into the neighbor sample space because of random mismatch error. With sufficient level of mismatch ratio, the reference's probability density function covers almost all the sample space with relatively even chances. It is also interesting to point out that mismatch error, which is conventionally regarded as an undesirable non-ideal factor, is the crucial element that enables SR. Maximal effectiveness of SR is obtained only when the mismatch ratio reaches a certain level (e.g., ˜10%) which would be considered excessively large in many ordinary applications. Such mechanism is only possible because the number of distinct references that can be generated by a RS structure is significantly larger than the ingrinsic cardinality due to redundancy. Furthermore, not only the number of different component assemblies but also the mutual correlation between them play an important role. Ideally, the assemblies would be spread evenly across all the sample space to have the maximum chance of approximating ΘN k. This characteristic is determined by the device's internal architecture, i.e., how the components are designed.
Grouping Method. The grouping method is a preferred way, where unit cells are arranged into components. Almost all conventional designs can be categorized as binary-weighted (BW) structures where the quantization partitions are uniquely encoded according to the binary numeral system. In contrast, the proposed RS architecture employs a different strategy to realize redundancy with both RPR and ETR properties. There is no limitation to how the unit cells are grouped. While the grouping method does not alter the number of unit cells, thus has little effect on the resource constraints, it determines the system's endogenous architecture and greatly affects the references' number and distribution. The design of grouping method differentiates one redundant structure from another.
Beyond the Shannon Limit. SR in the context of this disclosure should be understood as a resource-constraint problem. The precision of a sensor consists of 2N 0−1 unit cells was previously thought to be bound by the Shannon limit of No determined by quantization error. By arranging the unit cells in a specific manner to realize a redundant structure and exploiting the statistical property of random mismatch error, an effective resolution beyond this conventional “limit” is achieved.
As the analysis of code diffusion suggested, the best performance of SR is obtained with the mismatch ratio being above ˜10%. Both HS and UN grouping method offers 3-4 bits increase of effective resolution or 8 x-16× enhancement of precision. The entropy's STD is less than 0.2-bit within 10-50% mismatch ratio where the UN method has a marginally better outcome. These results suggest that the solution for SR is consistent which in practical applications, will translate to the good yield of the device under random error.
Furthermore, the consistency of the mechanism implies that mismatch error may not need to be truly “random”. In certain application, 10% random deviation may seem unrealistic. Instead, the deviation can be intentionally added to the structure during the design process. Even if these artificial pseudo-random deviations could carry a certain level of error, the consistency of SR mechanism guarantees that a solution can always be found. Furthermore, the proposed SR method can also be applied to enhance the performance of numerous biomedical devices that employ a DAC. For example, electrical neurostimulators generally require a DAC to generate an internal reference current. A higher resolution DAC is always desirable as it gives more precise control of the stimulation current in a wider range, which could imply better modulation of different neural circuits. In another example, many ultrasound imaging modalities employ a DAC in their transmission stage to generate the necessary analog signals. High-precision commercial DACs up to 12 bits and beyond have been used in various systems to facilitate their operation. Implementing such high-precision DACs (10-12 bits) on-chip is generally challenging and expensive because they occupy large silicon area, especially in high-voltage processes (>30 V). The proposed UN method could greatly benefit these designs by help achieving a similar resolution with a much lower cost. The results that the proposed SR mechanism can be utilized to greatly enhance the performance of a high-precision device by exploiting the natural mismatch of the transistors.
Moreover, unlike the ADC example, the neurostimulator's operations are always governed by an external controller during normal operation. The controller regularly communicates with the neurostimulator to update its parameters and trigger its function when needed. Subsequently, the optimal system setting at every DAC output can be simply determined upfront via foreground calibration and saved on an external memory, i.e., a look-up table, which is accessed by the controller at any instant. This effectively circumvents the computational-hard problem by diverting it into a memory-hard problem which could be more easily handled in certain circumstances. For instance, assuming a targeted SR of 16-bit is to be achieved with 20 components, storing all the optimal configurations would require 216×20=1.3·106 bits or 163 KB of memory per DAC—a trivial amount for an off-chip flash memory. A DAC converter device can include a number of DAC channels. In some embodiments, the DAC device can include sixteen channels. One or more controllers can be coupled to the channels included in the DAC device in order to control the channels as described above. In some embodiments, any suitable computer readable media can be used for storing instructions for performing the functions and/or processes described herein. For example, in some embodiments, computer readable media can be transitory or non-transitory. For example, non-transitory computer readable media can include media such as magnetic media (such as hard disks, floppy disks, etc.), optical media (such as compact discs, digital video discs, Blu-ray discs, etc.), semiconductor media (such as RAM, Flash memory, electrically programmable read only memory (EPROM), electrically erasable programmable read only memory (EEPROM), etc.), any suitable media that is not fleeting or devoid of any semblance of permanence during transmission, and/or any suitable tangible media. As another example, transitory computer readable media can include signals on networks, in wires, conductors, optical fibers, circuits, or any suitable media that is fleeting and devoid of any semblance of permanence during transmission, and/or any suitable intangible media. It should be noted that, as used herein, the term mechanism can encompass hardware, software, firmware, or any suitable combination thereof.
This disclosure presents a new interpretation of the RS architecture that allows quantization or de-quantization processes to achieve an effective resolution many folds beyond the limitation that their resource constraints commonly permit. Using Monte Carlo simulations, it is shown that SR is feasible by elegantly exploiting the statistical property called “code diffusion” that is unique to a redundant structure in the presence of random mismatch error. By applying the UN method on a 10-bit device, a profound theoretical increase of 8-9 bits effective resolution or 256-512× enhancement of precision at 95% sample space is demonstrated. The UN grouping method can be applied to various fields of biomedical imaging and data acquisition instrumentation, especially low-power fully-integrated sensors and devices where higher resolution is always desired, as well as other applications such as audio and video processing, data communications including wire/wireless data transmission and/or data storage, remote sensing such as radar, sonar, ultrasound and/or infrared sensing, sensors and actuators used in robotics, etc.
Thus, the present disclosure provides systems and methods for producing digital-to-analog converters that provide super-resolution without post-processing and in the presence of mismatch error.
The present invention has been described in terms of one or more preferred embodiments, and it should be appreciated that many equivalents, alternatives, variations, and modifications, aside from those expressly stated, are possible and within the scope of the invention.
While the above description contains much specificity, these should not be construed as limitations on the scope of any embodiment, but as exemplifications of the presented embodiments thereof. Many other alternative embodiments and variations are possible within the teachings of the various embodiments. While the invention has been described with reference to exemplary embodiments, it will be understood by those skilled in the art that various changes may be made, and equivalents may be substituted for elements thereof without departing from the scope of the invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from the essential scope thereof. Therefore, it is intended that the invention will not be limited to the particular embodiment disclosed as the best or only mode contemplated for carrying out this invention, but that the invention will include all embodiments falling within the scope of the appended claims. Also, in the drawings and the description, there have been disclosed exemplary embodiments of the invention and, although specific terms may have been employed, they are, unless otherwise stated, used in a generic and descriptive sense only and not for purposes of limitation, the scope of the invention therefore not being so limited. Moreover, the use of the terms first, second, etc. do not denote any order or hierarchy of importance, but rather the terms first, second, etc. are used to distinguish one element from another. Furthermore, the use of the terms a, an, etc. do not denote a limitation of quantity, but rather denote the presence of at least one of the referenced items.
While the invention has been described, exemplified, and illustrated in reference to certain preferred embodiments thereof, those skilled in the art will appreciate that various changes, modifications, and substitutions can be made therein without departing from the spirit and scope of the invention. It is intended, therefore that the invention be limited only by the scope of the claims which follow, and that such claims be interpreted as broadly as is reasonable.
The present application is a continuation-in-part application that is based on, claims priority to, and incorporates by reference in its entirety for all purposes, PCT Application PCT/US22/35016, filed Jun. 24, 2022, which claims priority to U.S. Provisional Application Ser. No. 63/214,623, filed Jun. 24, 2021, and each is entitled: “SYSTEM AND METHOD FOR AN IMPROVED REDUNDANT CROSSFIRE CIRCUIT IN A FULLY INTEGRATED NEUROSTIMULATION DEVICE AND ITS USE IN NEUROTHERAPY.”
This invention was made with government support under Agency Grant Number 1845709 awarded by the National Science Foundation, and Agency Grant Number 1R21NS111214-01 awarded by the National Institute of Health. The government has certain rights in the invention.
| Number | Date | Country | |
|---|---|---|---|
| 63214623 | Jun 2021 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | PCT/US2022/035016 | Jun 2022 | US |
| Child | 18396610 | US |
