BRIEF DESCRIPTION OF THE DRAWINGS
A more complete understanding of the present disclosure may be had by reference to the following Detailed Description when taken in conjunction with the accompanying drawings wherein:
FIG. 1 depicts a high-level circuit abstraction scheme involving an IC block where intrinsic capacitance may be approximated according to one or more embodiments of the present disclosure;
FIG. 2 is a flowchart of a method of approximating intrinsic capacitance of an IC block in one embodiment;
FIG. 3 depicts an exemplary CMOS model for illustrating N-well capacitance of an IC block;
FIG. 4 depicts a flowchart of a method of estimating N-well capacitance of an IC block in one embodiment;
FIGS. 5A and 5B depict exemplary CMOS models for illustrating non-switching circuitry capacitance of an IC block;
FIG. 6 depicts a flowchart of a method of estimating non-switching circuitry capacitance of an IC block in one embodiment;
FIG. 7 depicts an exemplary IC block with different functional blocks; and
FIG. 8 illustrates a computer system operable to implement the method of approximating intrinsic capacitance in accordance with an embodiment of the present disclosure.