Claims
- 1. A method of regulating power comprising:
charging an inductor with a source voltage for a first time period by coupling said inductor to said source voltage; discharging an inductor for a second time period by coupling said inductor to a ground; disconnecting said inductor from both said source voltage and said ground for a third time period; wherein said disconnecting step is commenced when a current flowing through said inductor equals zero amperes.
- 2. The method of claim 1 wherein said charging step comprises:
turning on a first switch coupling the inductor to the source voltage; and turning off a second switch coupling the inductor to ground.
- 3. The method of claim 1 wherein said discharging step comprises:
turning off a first switch coupling the inductor to the source voltage; and turning on a second switch coupling the inductor to ground.
- 4. The method of claim 1 wherein said disconnecting step comprises:
turning off a first switch coupling the inductor to the source voltage; and turning off a second switch coupling the inductor to ground.
- 5. The method of claim 1 wherein said disconnecting step is commenced by a signal transmitted by a zero current detection circuit.
- 6. The method of claim 1 wherein said disconnecting step comprises:
coupling an input of a first device to said inductor; connecting an input of a second device to a ground; supplying said first device and said second device with substantially equal currents; comparing the output voltage of said first device with the output voltage of said second device; and transmitting a signal to commence said disconnecting step.
- 7. The method of claim 6 wherein:
said first device comprises transistor comprising a gate, source, and a drain; and said second device comprises a transistor comprising a gate, source, and a drain.
- 8. The method of claim 6 wherein:
said comparing step utilizes a low-offset, high-speed comparator coupled to said first device and said second device.
- 9. An apparatus for converting power comprising:
a first transistor; a second transistor coupled to ground and to said first transistor, forming a junction between said first transistor and said second transistor; an inductor coupled to said junction between said first transistor and said second transistor; and a zero current detection circuit coupled to said junction between said first transistor and said second transistor.
- 10. A method for detecting a zero current condition in a power converter comprising:
coupling an input of a first device to an output inductor of said power converter; connecting an input of a second device to a ground; supplying said first device and said second device with substantially equal currents; and comparing the output voltage of said first device with the output voltage of said second device.
- 11. The method of claim 10 wherein:
said first device comprises transistor comprising a gate, source, and a drain; and said second device comprises a transistor comprising a gate, source, and a drain.
- 12. The method of claim 10 wherein:
said comparing step utilizes a low-offset, high-speed comparator coupled to said first device and said second device.
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application is a continuation of application Ser. No. 09/978,125, filed Oct. 15, 2001, which will issue as U.S. Pat. No. 6,507,175 on Jan. 14, 2003, and which claims the benefit of provisional patent application Ser. No. 60/240,340, filed Oct. 13, 2000.
Provisional Applications (1)
|
Number |
Date |
Country |
|
60240340 |
Oct 2000 |
US |
Continuations (1)
|
Number |
Date |
Country |
Parent |
09978125 |
Oct 2001 |
US |
Child |
10342741 |
Jan 2003 |
US |