This U.S. Patent application is a divisional application of U.S. patent application Ser. No. 08/714,750, filed Sep. 16, 1996, now U.S. Pat. No. 5,897,656.
Number | Name | Date | Kind |
---|---|---|---|
4245344 | Richter | Jan 1981 | A |
4796232 | House | Jan 1989 | A |
4953081 | Feal et al. | Aug 1990 | A |
4982321 | Pantry et al. | Jan 1991 | A |
5115411 | Kass et al. | May 1992 | A |
5119485 | Ledbetter, Jr. et al. | Jun 1992 | A |
5193163 | Sanders et al. | Mar 1993 | A |
5225374 | Fare et al. | Jul 1993 | A |
5265211 | Amini et al. | Nov 1993 | A |
5269005 | Heil et al. | Dec 1993 | A |
5293603 | MacWilliams et al. | Mar 1994 | A |
5319766 | Thaller et al. | Jun 1994 | A |
5325510 | Frazier | Jun 1994 | A |
5359715 | Heil et al. | Oct 1994 | A |
5369748 | McFarland et al. | Nov 1994 | A |
5369753 | Tipley | Nov 1994 | A |
5386517 | Sheth et al. | Jan 1995 | A |
5398325 | Chang et al. | Mar 1995 | A |
5404462 | Datwyler et al. | Apr 1995 | A |
5414820 | McFarland et al. | May 1995 | A |
5442754 | Datwyler et al. | Aug 1995 | A |
5495570 | Heugel et al. | Feb 1996 | A |
5495585 | Datwyler et al. | Feb 1996 | A |
5553258 | Godiwala et al. | Sep 1996 | A |
5553263 | Kalish et al. | Sep 1996 | A |
5644753 | Ebrahim et al. | Jul 1997 | A |
5673400 | Kenny | Sep 1997 | A |
5684977 | Van Loo et al. | Nov 1997 | A |
5740400 | Bowles | Apr 1998 | A |
5822755 | Shippy | Oct 1998 | A |
5828835 | Isfeld et al. | Oct 1998 | A |
5829033 | Hagersten et al. | Oct 1998 | A |
5857084 | Klein | Jan 1999 | A |
5900011 | Saulsbury et al. | May 1999 | A |
Number | Date | Country |
---|---|---|
195 06 734 | Sep 1995 | DE |
0 507 063 | Oct 1992 | EP |
Entry |
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Corollary Inc., Gemini External Design Specification, Dec. 4, 1995, pp. 1-107.* |
“VIC 8251F VIC to VME Interface with Mirrored Memory,” Creative Electronic Systems, Version 1.1, Jun. 1994, pp. 1-103, XP002198526, Petit-Lancy, Switzerland. |
“IBM patents—Abstract/Exempt Claim”, U.S. patent No. 5,018,053 issued May 21, 1991, patent title “Method for Reducing Cross-Interrogate Delays in a Multiprocessor System”, Micron Technology Confidential Information, p. 2658, Mar. 27, 1996. |
Customer Request Summary—E014 Full-Text Patent Report, U.S. Patent No. 5,369,753, issued Nov. 29, 1994, patent title “Method and Apparatus for Achieving Multilevel Inclusion in Multilevel Cache Hierarchies”, SPO Services Results, 18 pages, Mar. 13, 1996. |
Anderson, Don, et al., “Chapter 4: Multiple Processors and the MESI Model”, Pentium™ Processor System Architecture, pp. 65-91, 1995. |
Glaskowsky, Peter N., “Profusion Adds Processors and Performance: Corollary Creates Credible Chip Set for 8-CPU Pentium Pro Servers”, Microdesign Resources, 2 pages, Sep. 16, 1996. |
“ULTRASPARC™—Ultra Port Architecture (UPA): The New-Media System Architecture”, from Sun Microelectronics, 4 pages, last updated Jun. 6, 1996. |
“Gemini External Design Specification”, Corollary Confidential Document, pp. i-107, Dec. 4, 1995. |
“Gemini Reference Platform Specification”, Corollary Confidential Document, pp. i-29, Mar. 15, 1996. |
Handy, Jim, “Chapter 4: Maintaining Coherency in Cached Systems”, The Cache Memory Book, pp. 125-190, 1993. |