This application claims priority to Chinese Patent Application No. 201911080720.2, filed Nov. 7, 2019 and entitled “System and Method for Performing Reflow Modeling in a Virtual Fabrication Environment”, the entire content of which is incorporated herein by reference.
Semiconductor development organizations at integrated device manufacturers (IDMs) and independent foundries spend significant resources developing the integrated sequence of process operations used to fabricate the chips (integrated circuits (ICs)) they sell from wafers (“wafers” are thin slices of semiconductor material, frequently, but not always, composed of silicon crystal). A large portion of the resources is spent on fabricating experimental wafers and associated measurement, metrology (“metrology” refers to specialized types of measurements conducted in the semiconductor industry) and characterization structures, all for the purpose of ensuring that the integrated process produces the desired semiconductor device structures. These experimental wafers are used in a trial-and-error scheme to develop individual processes for the fabrication of a device structure and also to develop the total, integrated process flow. Due to the increasing complexity of advanced technology node process flows, a large portion of the experimental fabrication runs result in negative or null characterization results. These experimental runs are long in duration, weeks to months in the “fab” (fabrication environment), and expensive. Recent semiconductor technology advances, including FinFET, TriGate, High-K/Metal-Gate, embedded memories and advanced patterning, have dramatically increased the complexity of integrated semiconductor fabrication processes. The cost and duration of technology development using this trial-and-error experimental methodology has concurrently increased.
A virtual fabrication environment for semiconductor device structures offers a platform for performing semiconductor process development at a lower cost and higher speed than is possible with conventional trial-and-error physical experimentation. In contrast to conventional CAD and TCAD environments, a virtual fabrication environment is capable of virtually modeling an integrated process flow and predicting the complete 3D structures of all devices and circuits that comprise a full technology suite. Virtual fabrication can be described in its most simple form as combining a description of an integrated process sequence with a subject design, in the form of 2D design data (masks or layout), and producing a 3D structural model that is predictive of the result expected from a real/physical fabrication run. A 3D structural model includes the geometrically accurate 3D shapes of multiple layers of materials, implants, diffusions, etc. that comprise a chip or a portion of a chip. Virtual fabrication is done in a way that is primarily geometric, however the geometry involved is instructed by the physics of the fabrication processes. By performing the modeling at the structural level of abstraction (rather than physics-based simulations), construction of the structural models can be dramatically accelerated, enabling full technology modeling, at a circuit-level area scale. The use of a virtual fabrication environment thus provides fast verification of process assumptions, and visualization of the complex interrelationship between the integrated process sequence and the 2D design data.
Embodiments of the present invention provide the ability to perform reflow modeling in a virtual fabrication environment. More particularly, embodiments enable the virtual fabrication environment to model metal reflow to refill an unexpected seam or void occurring during metal deposition in a small trench or via. Embodiments also enable the simulation of metal reflow for bump/solder ball formation. Embodiments additionally enable the virtual fabrication environment to model material reflow to smooth material surfaces such as when fabricating a round Si nanowire.
In one embodiment, a computing device-implemented method for performing reflow modeling in a virtual fabrication environment includes the step of receiving a selection of a process sequence in a process editor for a semiconductor device structure to be virtually fabricated, the process sequence including a user-specified reflow modeling step. The reflow modeling step indicates a point during the process sequence for reflow modeling to be performed. The method further performs with the computing device a virtual fabrication run that models an integrated process flow used to physically fabricate the semiconductor device structure by using the process sequence and 2D design data to simulate patterning, material addition and/or material removal steps performed to physically fabricate the semiconductor device structure. The virtual fabrication run executes the process sequence up until the reflow modeling step and builds a 3D structural model of the semiconductor device structure. The 3D structural model is predictive of a result of a physical fabrication of the semiconductor device structure. The virtual fabrication run further performs the reflow modeling step within a region of the 3D structural model which generates reflow data. The reflow modeling step also outputs the reflow data.
In another embodiment, a system for performing reflow modeling in a virtual fabrication environment includes a system for performing reflow modeling in a virtual fabrication environment. The system includes at least one materials database. The system further includes at least one computing device equipped with one or more processors and configured to generate a virtual fabrication environment that includes a reflow modeling module. The reflow modeling module when executed receives a selection of a process sequence in a process editor for a semiconductor device structure to be virtually fabricated. The process sequence includes a user-specified reflow modeling step that indicates a point during the process sequence for reflow modeling to be performed. The reflow modeling module when executed further performs with the computing device a virtual fabrication run that models an integrated process flow used to physically fabricate the semiconductor device structure by using the process sequence and 2D design data to simulate patterning, material addition and/or material removal steps performed to physically fabricate the semiconductor device structure. The virtual fabrication run executes the process sequence up until the reflow modeling step. The executing of the process sequence builds a 3D structural model of the semiconductor device structure using data from the materials database. The 3D structural model is predictive of a result of a physical fabrication of the semiconductor device structure. The virtual fabrication run further performs the reflow modeling step within a region of the 3D structural model which generating reflow data. The reflow modeling step also outputs the reflow data.
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate one or more embodiments of the invention and, together with the description, help to explain the invention. In the drawings:
Semiconductor device fabrication typically includes large numbers of patterning steps and material addition and removal steps that occur in a carefully organized sequence as part of the fabrication process. Reflow operations may be used during fabrication to correct errors and/or to better achieve a desired result from a step in a process sequence by providing thermal energy to metal or other material to cause the metal or other material to “reflow” to a desired condition. As one example of the use of reflow operations during semiconductor device fabrication, metal deposition fill in a small trench or via well will sometimes form an unexpected seam/void in the small trench or via. “Reflow” may be introduced to give the metal a thermal energy to refill the trench or via. Similarly, bump/solder ball formation are important processes during chip package, and one of the key steps is to heat the metal and let it “reflow” to finally obtain the bump shape. In addition, material “reflow” to smooth material surfaces is also an important application in advanced node. For instance, in Si nanowire formation in a Gate All Around (GAA) process, E-field crowding due to square-shaped Si nanowire is a major concern. Si “reflow” may be introduced to generate a rounded Si nanowire. Additional uses of reflow include display applications for lense formation with thermal reflow and planarization material and thermal reflow to smooth a surface. Unfortunately, reflow is a highly complicated process with abstruse physics and has therefore conventionally not been well-suited to modeling in a virtual fabrication environment.
Embodiments of the present invention provide a virtual fabrication environment enabling reflow modeling as part of a process sequence. However, prior to discussing the reflow modeling provided by embodiments in greater detail, an exemplary 3D virtual fabrication environment which may be utilized to practice the embodiments is first described.
Exemplary Virtual Fabrication Environment
Computing device 10 may store and execute virtual fabrication application 70 including 3D modeling engine 75. 3D modeling engine 75 may include one or more algorithms such as algorithm 1 (76), algorithm 2 (77), and algorithm 3 (78) used in virtually fabricating semiconductor device structures. Virtual fabrication application 70 may also include reflow modeling module 79 containing executable instructions for modeling reflow operations. 3D modeling engine 75 may accept input data 20 in order to perform virtual fabrication “runs” that produce semiconductor device structural model data 90. Virtual fabrication application 70 and 3D modeling engine 75 may generate a number of user interfaces and views used to create and display the results of virtual fabrication runs. For example, virtual fabrication application 70 and 3D modeling engine 75 may display layout editor 121, process editor 122 and virtual fabrication console 123 used to create virtual fabrication runs. Virtual fabrication application 70 and 3D modeling engine 75 may also display a tabular and graphical metrology results view 124 and 3D view 125 for respectively displaying results of virtual fabrication runs and 3D structural models generated by the 3D modeling engine 75 during virtual fabrication of semiconductor device structures.
Input data 20 includes both 2D design data 30 and process sequence 40. Process sequence 40 may be composed of multiple process steps 43, 44, 47, 48 and 49. As described further herein, process sequence 40 may also include one or more virtual metrology measurement process steps 45. Process sequence 40 may further include one or more subsequences which include one or more of the process steps or virtual metrology measurement process steps. 2D design data 30 includes of one or more layers such as layer 1 (32), layer 2 (34) and layer 3 (36), typically provided in an industry-standard layout format such as GDS II (Graphical Design System version 2) or OASIS (Open Artwork System Interchange Standard).
Input data 20 may also include a materials database 60 including records of material types such as material type 1 (62) and material type 2 (64) and specific materials for each material type. Many of the process steps in a process sequence may refer to one or more materials in the materials database. Each material has a name and some attributes such as a rendering color. The materials database may be stored in a separate data structure. The materials database may have hierarchy, where materials may be grouped by types and sub-types. Individual steps in the process sequence may refer to an individual material or a parent material type. The hierarchy in the materials database enables a process sequence referencing the materials database to be modified more easily. For example, in virtual fabrication of a semiconductor device structure, multiple types of oxide material may be added to the structural model during the course of a process sequence. After a particular oxide is added, subsequent steps may alter that material. If there is no hierarchy in the materials database and a step that adds a new type of oxide material is inserted in an existing process sequence, all subsequent steps that may affect oxide materials must also be modified to include the new type of oxide material. With a materials database that supports hierarchy, steps that operate on a certain class of materials such as oxides may refer only to the parent type rather than a list of materials of the same type. Then, if a step that adds a new type of oxide material is inserted in a process sequence, there is no need to modify subsequent steps that refer only to the oxide parent type. Thus hierarchical materials make the process sequence more resilient to modifications. A further benefit of hierarchical materials is that stock process steps and sequences that refer only to parent material types can be created and re-used.
3D Modeling Engine 75 uses input data 20 to perform the sequence of operations/steps specified by process sequence 40. As explained further below, process sequence 40 may include one or more virtual metrology steps 45, 49 that indicate a point in the process sequence during a virtual fabrication run at which a measurement of a structural component should be taken. The measurement may be taken using a locator shape previously added to a layer in the 2D design data 30. In an alternative embodiment the measurement location may be specified by alternate means such as (x, y) coordinates in the 2D design data or some other means of specifying a location in the 2D design data 30 instead of through the use of a locator shape. Process sequence may also include one or more reflow modeling steps 50 that indicate a point in the process sequence during a virtual fabrication run at which a reflow modeling operation should be performed. The performance of the process sequence 40 during a virtual fabrication run generates virtual metrology data 80 and 3D structural model data 90. 3D structural model data 90 may be used to generate a 3D view of the structural model of the semiconductor device structure which may be displayed in the 3D viewer 125. Virtual metrology data 80 may be processed and presented to a user 2 in the tabular and graphical metrology results view 124.
Inserted layers in the design data displayed in the layout editor 121 may include inserted locator shapes. For example, a locator shape may be a rectangle, the longer sides of which indicate the direction of the measurement in the 3D structural model. For example, in
There may be hundreds of steps in the process sequence and the process sequence may include sub-sequences. For example, as depicted in
One or more steps in the process sequence may be virtual metrology steps inserted by a user. For example, the insertion of step 4.17 “Measure CD” (414), where CD denotes a critical dimension, in process sequence 412 would cause a virtual metrology measurement to be taken at that point in the virtual fabrication run using one or more locator shapes that had been previously inserted on one or more layers in the 2D design data. By inserting the virtual metrology steps directly in the fabrication sequence, the embodiment of the present invention allows virtual metrology measurements to be taken at critical points of interest during the fabrication process. As the many steps in the virtual fabrication interact in the creation of the final structure, the ability to determine geometric properties of a structure, such as cross-section dimensions and surface area, at different points in the integrated process flow is of great interest to the process developer and structure designer.
While building a single structural model can be valuable, there is increased value in virtual fabrication that builds a large number of models. The virtual fabrication environment enables a user to create and run a virtual experiment. In a virtual experiment of the present invention, a range of values of process parameters can be explored. A virtual experiment may be set up by specifying a set of parameter values to be applied to individual processes (rather than a single value per parameter) in the full process sequence. A single process sequence or multiple process sequences can be specified this way. The 3D modeling engine 75, executing in virtual experiment mode, then builds multiple models spanning the process parameter set, all the while utilizing the virtual metrology measurement operations described above to extract metrology measurement data for each variation. This capability provided by the embodiments of the present invention may be used to mimic two fundamental types of experiments that are typically performed in the physical fab environment. Firstly, fabrication processes vary naturally in a stochastic (non-deterministic) fashion. As explained herein, embodiments of the present invention use a fundamentally deterministic approach for each virtual fabrication run that nevertheless can predict non-deterministic results by conducting multiple runs. The virtual experiment mode provided by an embodiment of the present invention allows the virtual fabrication environment to model through the entire statistical range of variation for each process parameter, and the combination of variations in many/all process parameters. Secondly, experiments run in the physical fab may specify a set of parameters to be intentionally varied when fabricating different wafers. The virtual experiment mode of the present invention enables the Virtual Fabrication Environment to mimic this type of experiment as well, by performing multiple virtual fabrication runs on the specific variations of a parameter set.
Each process in the fabrication sequence has its own inherent variation. To understand the effect of all the aggregated process variations in a complex flow is quite difficult, especially when factoring in the statistical probabilities of the combinations of variations. Once a virtual experiment is created, the process sequence is essentially described by the combination of numerical process parameters included in the process description. Each of these parameters can be characterized by its total variation (in terms of standard deviation or sigma values), and therefore by multiple points on a Gaussian distribution or other appropriate probability distribution. If the virtual experiment is designed and executed to examine all of the combinations of the process variations (multiple points on each Gaussian, for example the ±3 sigma, ±2 sigma, ±1 sigma, and nominal values of each parameter), then the resulting graphical and numerical outputs from virtual metrology steps in the sequence cover the total variation space of the technology. Even though each case in this experimental study is modeled deterministically by the virtual fabrication system, the aggregation of the virtual metrology results contains a statistical distribution. Simple statistical analysis, such as Root Sum Squares (RSS) calculation of the statistically uncorrelated parameters, can be used to attribute a total variation metric to each case of the experiment. Then, all of the virtual metrology output, both numerical and graphical, can be analyzed relative to the total variation metric.
In typical trial-and-error experimental practice in a physical fab, a structural measurement resulting from the nominal process is targeted, and process variations are accounted for by specifying an overly large (conservative) margin for the total variation in the structural measurement (total structural margin) which must be anticipated in subsequent processes. In contrast, the virtual experiment embodiments of the present invention can provide quantitative predictions of the total variation envelope for a structural measurement at any point in the integrated process flow. The total variation envelope, rather than the nominal value, of the structural measurement may then become the development target. This approach can ensure acceptable total structural margin throughout the integrated process flow, without sacrificing critical structural design goals. This approach, of targeting total variation may result in a nominal intermediate or final structure that is less optimal (or less aesthetically pleasing) than the nominal structure that would have been produced by targeting the nominal process. However, this sub-optimal nominal process is not critical, since the envelope of total process variation has been accounted for and is more important in determining the robustness and yield of the integrated process flow. This approach is a paradigm shift in semiconductor technology development, from an emphasis on the nominal process to an emphasis on the envelope of total process variation.
With this parsing and assembling, subsequent quantitative and statistical analysis can be conducted. A separate output data collector module 110 may be used to collect 3D model data and virtual metrology measurement results from the sequence of virtual fabrication runs that comprise the virtual experiment and present them in graphical and tabular formats.
Once the results of the virtual experiment have been assembled, the user can review 3D models that have been generated in the 3D viewer (step 614a) and review the virtual metrology measurement data and metrics presented for each virtual fabrication run (step 614b). Depending on the purpose of the virtual experiment, the user can analyze the output from the 3D modeling engine for purposes of developing a process sequence that achieves a desired nominal structural model, for further calibrating process step input parameters, or for optimizing a process sequence to achieve a desired process window.
The 3D modeling engine's 75 task of constructing multiple structural models for a range of parameter values (comprising a virtual experiment) is very compute intensive and therefore could require a very long time (many days or weeks) if performed on a single computing device. To provide the intended value of virtual fabrication, model building for a virtual experiment must occur many times faster than a physical experiment. Achieving this goal with present day computers requires exploiting any and all opportunities for parallelism. The 3D modeling engine 75 of the present invention uses multiple cores and/or processors to perform individual modeling steps. In addition, the structural models for different parameter values in a set are completely independent and can therefore be built in parallel using multiple cores, multiple processors, or multiple systems.
3D modeling engine 75 may represent the underlying structural model using a voxel-based implicit geometry representation. Voxels are essentially 3D pixels. Each voxel is a cube of the same size, and may contain one or more materials, or no materials. An implicit geometry representation is one in which the interface between materials in the 3D structural model are defined without an explicit representation of the (x,y,z) coordinate locations of that interface. Many of the operations performed by the 3D modeling engine are voxel modeling operations. Modeling operations based on a digital voxel representation are far more robust than the corresponding operations in a conventional analog solid modeling kernel (e.g. a NURBS-based solid modeling kernel). Such solid modeling kernels generally rely on a large number of heuristic rules to deal with various geometric situations, and modeling operations may fail when the heuristic rules do not properly anticipate a situation. Aspects of semiconductor structural modeling that cause problems for NURBS-based solid modeling kernels include the very thin layers produced by deposition processes and propagation of etch fronts that results in merging faces and/or fragmentation of geometry.
Some simulation tools require a volume mesh to be generated from some form of explicit boundary representation and previous solutions exist for creating a volume mesh of B-rep geometry or from surface meshes. Such volume meshes for finite-element or finite-volume simulation techniques will preserve the location of the interface between materials to a high level of accuracy. Such a volume mesh is called a boundary-conforming mesh or simply a conformal mesh. A key feature of such a mesh is that no element crosses the boundary between materials. In other words, for a volume mesh of tetrahedral elements, then each element is wholly within one material and thus no tetrahedron contains more than one material. However, neither B-rep and similar solid modeling kernels, nor surface mesh representations are optimal for virtual fabrication. Solid modeling kernels generally rely on a large number of heuristic rules to deal with various geometric situations, and modeling operations may fail when the heuristic rules do not properly anticipate a situation. Geometry representations that instead represent the boundaries implicitly do not suffer from these problems. A virtual fabrication system that uses an implicit representation exclusively thus has significant advantages, even if it may not represent the interfaces as accurately.
Geometric data represented with voxels implicitly represents the interface between materials.
Material properties at a location within the geometry are approximated using the properties of the majority material within each voxel. For instance, in an operation to determine electrical resistance if a boundary voxel is more than 50% of material 2 in circle 1011, then the bulk resistivity of material 2 is used for all values of x within that voxel, and similarly voxels of 50% or more of material 1 use bulk resistivity of material 1. This is equivalent to filling those voxels full of the majority material as shown in
Reflow Modeling
Embodiments of the present invention enable a virtual fabrication environment to behaviorally solve for metal or material “reflow” or movement as part of the virtual fabrication of a semiconductor device of interest. More particularly, embodiments enable a reflow modeling step with user-specified parameters to be inserted into a process sequence used during virtual fabrication of a semiconductor device structure. The reflow modeling may be performed to either correct errors in the fabrication process or to more efficiently achieve a desired fabrication result. Exemplary reflow uses include, without limitation, performing filling of unwanted voids or seams, solder ball formation and Si nanowire rounding.
Embodiments provide a simplified approach for liquid metal reflow modeling that does not rely on abstruse physics. The approach is based on two principals, first that liquid surface tension of liquid on the surface of an object being modeled makes the surface curvature the same everywhere, and, secondly, that if the surface curvature does have a difference, the liquid surface tension pushes out the convex surfaces while smoothing the concave surfaces. Based on these principals, in one embodiment, metal reflow modeling of a 3D model represented using a voxel-based implicit geometry representation can be performed in a virtual fabrication environment by performing interface recognition detecting an interface between materials and air in the 3D model, calculating the surface curvature of specified portions of the interface of the 3D model, performing net recognition to restrict the reflow modeling to the desired nets of the model, and performing voxel replacement for the 3D model to mimic metal reflow pushing out convex surfaces and smoothing concave surfaces.
Bump/Solder ball formation are important processes during chip package, and one of the key steps is to heat the metal and let it “reflow” to obtain the bump shape. If the particular reflow modeling operation involves solder ball formation or a similar operation, in one embodiment the curvature calculation step may include an additional curvature calculation method (discussed further below) to identify the contact angle at the interface between the solder ball and the substrate (step 1203). Following the calculation of the curvature of the surface voxel (step 1204), a safety check is made to make sure the voxel is confined within a desired metal net (step 1205). Assuming the voxel is within the desired metal net (step 1205), voxel replacement takes place (step 1206) to simulate metal reflow to the concave areas of the model. A convex voxel with a metal value may be replaced with an air value and a concave voxel with an air value may be replaced with a metal value (to simulate metal flow). The process then loops and iterates until an acceptable surface appearance is determined, either by the virtual fabrication environment user or systematically by the reflow modeling module of the virtual fabrication environment applying pre-determined criteria. The material volume in the 3D structural model is conserved during the replacement process as the voxel values are swapped and the process does not result in voxel loss.
In addition to metal reflow operations to repair voids, embodiments also enable the modeling of material reflow. Material “reflow” to smooth material surfaces is an important application in advanced node. For example, in Si nanowire formation in a Gate-All-Around (GAA) process, E-field crowding due to square-shaped Si nanowire is a significant concern. Accordingly, in one embodiment, Si “reflow” may be used to generate a rounding Si nanowire.
As discussed above, embodiments may use a voxel-based modeling approach to create a 3D model of the semiconductor device being virtually fabricated. The voxels identify one or more materials. In one embodiment, the voxels are loaded into a numpy array. It should be appreciated that the use of other types of arrays instead of a numpy array are also within the scope of the present invention. Binaryzation/Trinaryzation then takes place with each array element indicating a value indicating either air/void, metal or another material (e.g. substrate). For example, air/void voxel elements may be assigned a value of 0, metal voxel elements may be assigned a value of 1 and any other locations not corresponding to metal or air may be assigned another value between 0 and 1 which decides the contact angle between the metal and other materials. This other value “A” (the material weight) may be calculated by the desired contact angle α divided by π (as discussed further in
Once the surface markers identifying the interface have been determined embodiments perform a surface curvature calculation at the interface locations.
In one embodiment, the surface curvature calculation accounts for the fact that many surface voxels have the same curvature which presents a problem in differentiating locations with the same curvature. Embodiments perform voxel replacement on a 1 to 1 basis where 1 metal voxel replaces 1 air/void voxel in order to keep metal volume conservative. During voxel replacement, the minimum curvature values for metal are swapped with minimum curvature values for air/void so having the same curvature values creates ambiguity in determining which voxel value to swap since, for example, 2 convex voxels with the same curvature cannot be moved to replace 1 concave air/void voxel. To address this issue embodiments may add small insignificant random variation on the calculated curvature to allow the different locations to be distinguished as depicted in
As noted above, in some embodiments such as in solder ball formation it may be desirable to control the contact angle at the interface. More particularly, as depicted in
c
X
≈πr
2/2
while cY (1680) at the ball/material interface may be calculated as
and the contact angle α (1690)
α=Aπ
where A is the material weight. The contact angle α can be adjusted by adjusting the substrate material weight A. When A is adjusted from 0 to 1, α from 0 to π can be obtained.
The contact angle at the interface may be different depending upon the type of material in the substrate and the metal will often be in contact with more than one type of substrate material at the same time. Accordingly, in one embodiment, metal contact with different materials with different contact angles may be simulated in the virtual fabrication environment. By assigning different weights for substrate materials, the multiple angles between the metal and the different substrate materials may be obtained. For example, as depicted in
In an equilibrium state where cX=cY=cz. the contact angles may be calculated as:
In one embodiment, as depicted in
Once the surface curvature calculations have been completed, embodiments perform a net recognition step to make sure that the reflow modeling is confined to a particular “net”.
In one embodiment, the reflow modeling step allows a user to simulate metal reflow with multiple patterns and multiple nets. Nets move and nets merge during reflow. By setting different contact angles the movement and merger of the metal reflow may be controlled.
Depending on the problem being solved, different nets need different reflow rates. Embodiments enable the reflow rates to be controlled based on a fixed value, a net volume and/or a net surface area ratio. The fixed values method moves a fixed number of voxels for each net in each cycle (each single loop). The fixed net volume and surface ratio can move a fixed ratio of volume or surface voxels in each reflow cycle.
Solder ball formation is an important process in chip package and embodiments enable the modeling of reflow for solder ball formation.
In one embodiment, the reflow modeling step may be further refined to control the distance over which reflow modeling takes place. Local distance control allows the voxel curvature to be locally sorted so that the voxels are moved from a local convex feature to a local concave feature within a constrained distance. With this approach voxel movement is confined to a local area with each iteration of the loop which is a more realistic result as metal can only flow so far within a certain time. The end result of the simulation may end up being the same as described above given enough iterations but the user is given more granular information as to how the reflow evolves over time. Local distance control in exemplary embodiments is graphically depicted in
Local distance control is further depicted in
In one embodiment, the virtual fabrication environment may provide a graphical user interface which includes a user-selectable parameter in the reflow modeling step by which the user can indicate a preference for local distance control.
It should be appreciated that the reflow modeling described herein may be provided in a number of different ways. For example, in one embodiment, the graphical user interfaces and some or all of the associated code for performing reflow modeling may be integrated into the virtual fabrication environment. In another embodiment, the graphical user interface and some or all of the associated code for performing reflow modeling may be provided via a plug-in or other external executable application or process that interacts with the virtual fabrication environment.
In an embodiment, the reflow distance, either from a user-supplied parameter or a pre-defined distance, is used to create a local array of voxels, then local curvature is filtered and voxel replacement occurs locally to perform a local concave fill within the specified distance of a local convex feature being removed.
In an embodiment, the reflow modeling step also accounts for the effect of gravity on the surface curvature calculation in single and multiple nets. More particularly, gravity changes what would otherwise be a spherical shape of the reflow material into an ellipsoid. For example, as depicted in
In an embodiment, a stable solder ball 2510 may have A and B radii and surface curvatures cx, cy where cx=cy. An ellipsoid 2511 with radii a,b as shown may be used to calculate the curvature for cx=cy using a gravity coefficient parameter that changes the vertical/horizontal ratio of the ellipsoid. In one embodiment, the effect of gravity may be expressed as Gravity=b/a=R*ell/R where ell is the retrieved gravity coeffeicient and R is the ellipsoid radius as graphically depicted in
In an embodiment, as depicted in
In one embodiment, the effect of gravity on multiple nets may be calculated during the reflow modeling step. More particularly, the effect of gravity may be determined based on the use of a gravity coefficient, metal density and net volume (volume*density*g). In the case of a solder ball, for a particular material, a small net volume leads to a rounder shape while a larger net volume leads to a flatter plate-like shape. For example, if b/a=f(v) and f (v)=1/(e{circumflex over ( )}((v−Vref)/D)+1), the gravity effect of a particular metal may be calibrated once Vref and D are set properly. In sequence, after capturing the gravity value (gravity=Vref) and D, net volume is calculated after the net recognition step, and curvature is calculated using the net volume information. In this manner, gravity is considered with net volume and metal density to realize different ellipsoids with different volumes. Increasing Vref leads to rounder shapes while increasing D leaves to flatter shapes.
Although the description herein has focused on voxel-based models simulated by the virtual fabrication environment, it should be appreciated that embodiments of the present invention are not so limited. In some embodiments, the techniques described herein for reflow modeling may be applied in virtual fabrication environments that do not rely on voxel-based representation of models
Portions or all of the embodiments of the present invention may be provided as one or more computer-readable programs or code embodied on or in one or more non-transitory mediums. The mediums may be, but are not limited to a hard disk, a compact disc, a digital versatile disc, a flash memory, a PROM, a RAM, a ROM, or a magnetic tape. In general, the computer-readable programs or code may be implemented in any computing language.
Since certain changes may be made without departing from the scope of the present invention, it is intended that all matter contained in the above description or shown in the accompanying drawings be interpreted as illustrative and not in a literal sense. Practitioners of the art will realize that the sequence of steps and architectures depicted in the figures may be altered without departing from the scope of the present invention and that the illustrations contained herein are singular examples of a multitude of possible depictions of the present invention.
The foregoing description of example embodiments of the invention provides illustration and description, but is not intended to be exhaustive or to limit the invention to the precise form disclosed. Modifications and variations are possible in light of the above teachings or may be acquired from practice of the invention. For example, while a series of acts has been described, the order of the acts may be modified in other implementations consistent with the principles of the invention. Further, non-dependent acts may be performed in parallel.
Number | Date | Country | Kind |
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201911080720.2 | Nov 2019 | CN | national |
Filing Document | Filing Date | Country | Kind |
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PCT/US2020/058651 | 11/3/2020 | WO |