Patent Application
20120176139
User input switch devices, such as buttons, are used in various electronics products for users to input commands. As an example, left and right buttons are commonly found in a computer mouse for users to selectively press to activate a right mouse click or a left mouse click, which are essential when using the optical mouse to perform various operations in a computer operating environment.
A common technique to sense the activation of a user input switch device, which is typically mounted on a printed circuit board, is to use a sense circuit with a receiver and a weak pull-up transistor in an integrated circuit (IC). The printed circuit board is connected to the IC via a pin of the IC, which is commonly known as an IC package pin. The input of the receiver, the drain of the weak pull-up transistor and one terminal of the user input switch device are connected to the pin of the integrated circuit board. The other terminal of the user input switch device is connected to ground. The weak pull-up transistor is always enabled. When the user input switch device is open, i.e., not activated, the voltage at the pin is same as the supply power voltage due to the weak pull-up transistor. Hence, the receiver will output a high signal. When the user input device is closed, i.e., activated, the pin will be shorted to ground. Since the voltage at the pin is zero, the receiver will output a low signal. The output signal of the receiver is used to determine whether the user input switch device has been activated or not.
A concern with the above technique to sense a user input switch device is that, if there are multiple user input switch devices, each user input switch device will need an input pin on an IC that includes a sense circuit for the user input switch devices. This will increase pin count on the IC and increase the cost of the IC and the final product.
Therefore, there is a need for a system and method for sensing multiple user input switch devices with reduced pin count on an integrated circuit with a sense circuit.
A system and method for sensing multiple user input switch devices uses a generated sense current that corresponds to an electrical current through a node to which the user input switch devices are connected to sense current states of the user input switch devices. The sense current is used to produce multiple output signals that indicate the current states of the user input switch devices.
In an embodiment, a system comprises a plurality of user input switch devices and a sense circuit. Each of the user input switch devices is configured to be switched between two states. Each of the user input switch devices is connected to a node and connected in parallel to each other. The sense circuit is electrically connected to the user input switch devices through the node. The sense circuit is configured to generate a sense current that corresponds to an electrical current through the node when at least one of the user input switch device is switched to one of the two states. The sense circuit is configured to produce multiple output signals based on the sense current, wherein the multiple output signals indicate current states of the user input switch devices.
In another embodiment, a system comprises a plurality of user input switch devices and a sense circuit. Each of the user input switch devices is configured to be switched between two states. Each of the user input switch devices is connected in parallel to each other. Each of the user input switch devices is connected in series with one of a plurality of resistors between a node and a low voltage rail. The sense circuit is electrically connected to the user input switch devices through the node. The sense circuit is configured to generate a sense current that corresponds to an electrical current through the node when at least one of the user input switch device is switched to one of the two states. The sense circuit is configured to produce multiple output signals based on the sense current, wherein the multiple output signals indicate current states of the user input switch devices.
In an embodiment, a method for sensing multiple user input switch devices comprises providing a supply power to the user input switch devices through a node to which each of the user input switch devices is connected, each of the user input switch devices being configured to be switched between two states, generating a sense current that corresponds to an electrical current through the node when at least one of the user input switch device is switched to one of the two states at a sense circuit connected to the user input switch devices through the node, and producing multiple output signals based on the sense current at the sense circuit, wherein the multiple output signals indicate current states of the user input switch devices.
Other aspects and advantages of the present invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrated by way of example of the principles of the invention.
It will be readily understood that the components of the embodiments as generally described herein and illustrated in the appended figures could be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of various embodiments, as represented in the figures, is not intended to limit the scope of the present disclosure, but is merely representative of various embodiments. While the various aspects of the embodiments are presented in drawings, the drawings are not necessarily drawn to scale unless specifically indicated.
The described embodiments are to be considered in all respects only as illustrative and not restrictive. The scope of the invention is, therefore, indicated by the appended claims rather than by this detailed description. All changes which come within the meaning and range of equivalency of the claims are to be embraced within their scope.
Reference throughout this specification to features, advantages, or similar language does not imply that all of the features and advantages that may be realized with the present invention should be or are in any single embodiment. Rather, language referring to the features and advantages is understood to mean that a specific feature, advantage, or characteristic described in connection with an embodiment is included in at least one embodiment. Thus, discussions of the features and advantages, and similar language, throughout this specification may, but do not necessarily, refer to the same embodiment.
Furthermore, the described features, advantages, and characteristics of the invention may be combined in any suitable manner in one or more embodiments. One skilled in the relevant art will recognize, in light of the description herein, that the invention can be practiced without one or more of the specific features or advantages of a particular embodiment. In other instances, additional features and advantages may be recognized in certain embodiments that may not be present in all embodiments of the invention.
Reference throughout this specification to “one embodiment,” “an embodiment,” or similar language means that a particular feature, structure, or characteristic described in connection with the indicated embodiment is included in at least one embodiment. Thus, the phrases “in one embodiment,” “in an embodiment,” and similar language throughout this specification may, but do not necessarily, all refer to the same embodiment.
With reference to
As illustrated in
The sense circuit 102 operates to sense when one or more of the user input switch devices D_1, D_2 . . . D_M have been switched to the closed state. As described in more detail below, the sense circuit produces output signals that indicate which user input switch devices have been turned on. For example, if the user input switch devices are pressed, the sense circuit will produce output signals that indicate which buttons have been pressed. In the illustrated embodiment, the sense circuit is part of an integrated circuit 110 formed on a semiconductor chip. The sense circuit includes a current sensing stage 112 and a current comparing stage 114. The current sensing stage operates to sense the electrical current through the node 106 and to generate an electrical sense current Isense, which corresponds to the current through the node. The electrical current through the node varies in strength when one or more user input switch devices are closed. Thus, the sense current Isense also varies in strength when one or more user input switch devices are activated. The current comparing stage operates to compare the sense current Isense with reference currents to generate N output signals out_1 . . . out_N, where N equals 2M (M=the total number of user input switch devices). These output signals vary according to the strength of the sense current Isense. Thus, the output signals of the current comparing stage provide information regarding which of the user input switch devices have been closed, e.g., activated.
Turning now to
In the illustrated embodiment, the current sensing stage 112 further includes a capacitor 216 and a resistor 218, which are connected in series between the output of the operational amplifier 202 and the electrical connector 212. The series connected capacitor and resistor are used for frequency compensation so that the voltage at the electrical connector will be stable.
In operation, the current sensing stage 112 of the sense circuit 102 generates the sense current Isense when one or more of the user input switch devices D_1, D_2 . . . D_M are closed, e.g., pressed. The strength of the sense current Isense will vary depending on which user input switch devices are closed. As an example, if the user input switch device D_1 is closed, a current path will be formed from the supply voltage rail 210 to the low voltage rail 108 through the transistors 204 and 208, the electrical connector 212, the resistor R_1 and the user input switch device D_1. The current through the transistor 204 is mirrored through the transistor 206 to produce the sense current Isense. The sense current Isense in this example will be defined as:
Isense=Vbg/R—1=ID—1, (Equation 1)
where ID_1 is the current through the user input switch device D_1 and R_1 is the resistance value of the resistor R_1. Since the resistance of the resistor R_1 is much greater than the resistance of the user input switch device D_1, the resistance of the user input switch device D_1 is negligible, and thus, can be ignored in the above equation. When only one of the user input switch devices is closed, the sense current Isense will be defined as:
Isense=Vbg/Ri=IBi, (Equation 2)
where i=1, 2 . . . or M. Equation 2 is a generalized version of Equation 1. However, when more than one of the user input switch devices are closed, the sense current Isense will be the sum of the currents through the closed user input switch devices. Thus, for any number of closed user input switch devices, the sense current Isense will be defined as:
Isense=ΣVbg/Ri=ID—1+ID—2 . . . +ID—M, (Equation 3)
where ID_1 is the current through the user input switch device D_1 and R_1 is the resistance value of the resistor R_1. Since the resistances of the resistors R_1, R_2 . . . R_M are different, the strength of the sense current Isense will be unique for every possible combination of closed and open user input switch devices. That is, for each possible combination of one or more closed user input switch devices, the sense current Isense will be unique. Thus, the sense current Isense indicates which of the user input switch devices have been closed, e.g., pressed.
As shown in
Each of the current comparators 222_1 . . . 222_N is configured to compare the sense current Isense to a unique reference current and to generate an output signal based on the difference between the sense current Isense and that reference current. In an embodiment, each of the current comparators is configured to generate either a high signal or a low signal, which represent a logical “0” and a logical “1,” respectively. In the illustrated embodiment, each of the current comparators includes similar components. Thus, only the current comparator 222_1 is described in detail below as an example of the current comparators.
As shown in
The transistor 228_1 is connected to the node 240_1 and the low voltage rail 224 on a parallel current path from the transistor 226_1. The control terminal, i.e., the gate, of the transistor 228_1 is connected to the node 240_1. The current through the transistor 228_1 is referred to herein as the difference current Idiff, which equals the reference current Iref1 minus the current through the transistor 226_1, i.e., the sense current Isense. Thus, the current Idiff through the transistor 228_1 can be expressed as Iref1−Isense.
The transistor 232_1 is configured to mirror the current through the transistor 228_1. Thus, the current through the transistor 228_1 will also be equal to the difference current Idiff or Iref1−Isense. The control terminal, i.e., the gate, of the transistor 232_1 is connected to the control terminal of the transistor 228_1 so that the voltages on the control terminals of the transistors 228_1 and 232_1 are tied together. In addition, the size of the transistor 232_1 is same as the transistor 228_1. The transistor 232_1 is connected in series with the transistor 230_1 between the power supply rail 238 and the low voltage rail 224. Specifically, the transistor 230_1 is connected to the power supply rail, while the transistor 230_1 is connected to the low voltage rail. The transistors 230_1 and 232_1 are connected to each other at a node 242_1, which is connected to the buffer 236_1.
The transistor 230_1 serves as an active load, and for simplicity, can be viewed as a resistor. The resistance of the transistor 230_1 depends on its size. The voltage Vpre_out1 at the node 242_1 is defined by the current through the transistor 232_1 and the resistance of the transistor 230_1 according to the following equation:
Vpre_out1=Vpower−IdifF*Rtransistor, (Equation 4)
where Vpower is the voltage of the power supply on the power supply rail 238, Idiff is the difference current through the transistor 232, and Rtransistor is the on/off resistance of the transistor 230_1. The output signal out_1 from the buffer 236_1 is the buffered version of the signal at the node, i.e., the voltage Vpre_out1. In a particular implementation, the buffer includes two series connected inverters that produce the output signal out_1.
When the reference current Iref1 provided by the reference current source 234_1 is greater than the current through the transistor 226_1, i.e., the sense current Isense, there will be some current flow to the transistor 228_1. The current through the transistor 228_1 will be:
Idiff=Iref1−Isense, (Equation 5)
wherein Idiff is the current through the transistor 228_1, Iref1 is the reference current provided by the reference current source 234_1 and Isense is the current through the transistor 226_1. Since the current through the transistor 228_1 is mirrored by the transistor 232_1, the current through the transistor 232_1 will also be equal to Iref1−Isense, which would be greater than zero. If the current through the transistor 228_1 is large, i.e., greater than zero by a threshold, then the voltage Vpre_out1 at the node 242_1 will be low, and thus, the output signal out_1 will also be low.
When the reference current Iref1 provided by the reference current source 234_1 is smaller than the current Isense through the transistor 226_1, all the current from the reference current source will flow through the transistor 226_1. Hence, practically no current will flow through the transistor 228_1, and thus, Idiff=0. Since the current through the transistor 228_1 is mirrored by the transistor 232_1, the current through the transistor 232_1 will also be zero. As noted above, the voltage Vpre_out1 at the node 242_1 is defined as Vpre_out1=Vpower−Idiff*Rtransistor. Since the current Idiff through the transistor 232_1 is zero, the voltage Vpre_out1 will be the voltage of the power supply, and thus, will be high. Consequently, the output signal out_1 will also be high.
The other current comparators 222_2 . . . 222_N include the same components found in the current comparator 222_1. However, the reference current sources Iref2 . . . IrefN of the other current comparators are configured to generate different reference currents as compared to each other and to the reference current Iref1. In some embodiments, the reference currents Iref1 . . . IrefN generated by the reference current sources 234_1 . . . 234_N of the current comparators 222_1 . . . 222_N are defined by the following relationship: Iref1<Iref2<Iref3<Iref4 . . . <IrefN. In an embodiment in which N=7, the reference currents generated by the reference current sources of the current comparators are defined by the following relationships:
Iref1<ID—1;
ID—1<Iref2<ID—2;
ID—2<Iref3<(ID—1+ID—2);
(ID—1+ID—2)<Iref4<(ID—3);
(ID—3)<Iref5<(ID—3+ID—1);
(ID3+ID—1)<Iref6<(ID—3+ID—2); and
(ID—3+ID—2)<Iref7<(ID—3+ID—2+ID—1).
The output signals out_1 . . . out_N from the current comparators 222_1 . . . 222_N are used to determine which of the user input switch devices D_1 . . . DM, if any, is/are closed, e.g., pressed or activated. The following table shows the values of the output signals for different states of the user input switch devices, i.e., closed or open, for a particular embodiment in which the system 100 includes three user input switch devices (M=3) and seven current comparators (N=7). In the columns for the user input switch devices, “1” indicates that the corresponding user input switch device is pressed or closed and “0” indicates that the corresponding user input switch device is not pressed or open. In the columns for the output signals, “1” indicates that the corresponding output signal is high and “0” indicates that the corresponding output signal is low.
The output signals out_1 . . . out_N are transmitted to a host device, such as a personal computer or other computing device, or a processor of an electronic device so that the host device or the processor can initiate operations in response to the current states of the user input switch devices D_1 . . . D_M.
A method for sensing multiple user input switch devices in accordance with an embodiment of the invention is described with reference to a process flow diagram of
Although the operations of the method herein are shown and described in a particular order, the order of the operations of the method may be altered so that certain operations may be performed in an inverse order or so that certain operations may be performed, at least in part, concurrently with other operations. In another embodiment, instructions or sub-operations of distinct operations may be implemented in an intermittent and/or alternating manner.
In addition, although specific embodiments of the invention that have been described or depicted include several components described or depicted herein, other embodiments of the invention may include fewer or more components to implement less or more feature.
Furthermore, although specific embodiments of the invention have been described and depicted, the invention is not to be limited to the specific forms or arrangements of parts so described and depicted. The scope of the invention is to be defined by the claims appended hereto and their equivalents.
