Claims
- 1. A method aligning internal operations (IOPs) for dispatch comprising:conditionally asserting a predecode based on a particular dispatch slot that an instruction is going to be placed; and using the information related to the predecode in a masking operation to expand an instruction into at least one dummy operation and an IOP operation whenever the instruction would not be supported in the particular dispatch slot.
- 2. The method of claim 1 further comprising supporting a plurality of types of instructions for each of a plurality of the dispatch slots.
- 3. The method of claim 2 placing the plurality of the instructions in proper dispatch slots without requiring a new dispatch group to be formed by utilizing routing controls.
- 4. The method of claim 1 wherein the step of using the information related to the predecode in a masking operation further comprises forming a first mask of appropriate dispatch slots and forming a second mask which indicates which dispatch slot the instruction is going to be placed.
- 5. The method of claim 4 further comprising inverting the first mask and performing a bitwise logical AND operation of the inverted first mask and the second mask.
CROSS-REFERENCE TO RELATED APPLICATIONS
The present application is related to applications Ser. No. 09/263,663, entitled “A Method and System for Optimizing the Fetching of Dispatch Groups in a Superscalar Processor”, filed Mar. 5, 1999, still pending; Ser. No. 09/263,667, entitled “An Instruction Buffer Arrangement for a Superscalar Processor”, filed Mar. 5, 1999, still pending; Ser. No. 09/263,669, still pending, entitled “A Simplified Method to Generate BTAGs in a Decode Unit of a Processing System”, filed Mar. 5, 1999; Ser. No. 09/263,664, still pending, entitled “Decode Scheme for the Optimization of Accessing Constrained or Volatile Storage”, filed Mar. 5, 1999; Ser. No. 09/263,666, entitled “Destructive Operation Optimization for Operations Which Modify Partial Datums”, filed Mar. 5, 1999 now abandoned; and Ser. No. 09/263,670, entitled “Fast Microcode/Branch Selector Scheme”, filed Mar. 5, 1999, still pending.
US Referenced Citations (6)
Number |
Name |
Date |
Kind |
5742783 |
Azmoodeh et al. |
Apr 1998 |
A |
5930508 |
Faraboschi et al. |
Jul 1999 |
A |
6044450 |
Tsushima et al. |
Mar 2000 |
A |
6092176 |
Iadonato et al. |
Jul 2000 |
A |
6122722 |
Slavenburg |
Sep 2000 |
A |
6170051 |
Dowling |
Jan 2001 |
B1 |