Patent Application
20100070733
The present invention relates generally to a system and method of allocating memory locations, and more particularly but not by limitation to a system and method of dynamic memory allocation for storage of data blocks or data block portions of particular sizes in solid-state memory devices.
In general, solid-state memory devices can be made to emulate disc access of hard disc storage devices. In this example, such solid-state memory devices can operate as sector-based devices. However, in solid-state memory devices, each logical sector may be mapped to any physical sector of the memory, which results in a large memory mapping table that consumes a significant amount of random access memory (RAM). In a particular example, a 256 MB flash memory device uses about 524,288 records. In this example, if each record consists of six bytes for a logical block address (LBA) and three bytes for a flash physical sector, the mapping table is approximately 4.5 MB. Further, operations related to the mapping table, such as searching, adding, and deleting data, can take a significant amount of time. Additionally, deletion of stale or duplicate data (sometimes referred to as “garbage collection”) can be slow.
Embodiments of the present invention provide solutions to these and other problems, and offer other advantages over the prior art.
In a particular embodiment, a controller is adapted to allocate each memory segment location of a plurality of memory segment locations of a storage media to store data blocks having a particular data block size. Each memory segment location includes one or more storage blocks of the particular data block size. The controller is adapted to write a data block to one or more selected storage blocks of a selected memory segment location based on a size of the data block and an allocated data block size associated with the selected memory segment location.
In another particular embodiment, a storage device includes storage media adapted to store data and includes a controller adapted to control read/write access to the storage media. The controller is adapted to allocate each memory segment location of a plurality of memory segment locations of the storage media to store data blocks having a particular data block size. Each memory segment location includes one or more storage blocks of the particular data block size. The controller selectively writes one or more portions of a data block to at least one selected memory segment location of the plurality of memory segment locations based on a data block size associated with the data block and an allocated data block size associated with the selected memory segment location.
In still another particular embodiment, a method is disclosed that includes allocating each memory segment location of a plurality of memory segment locations of a storage media to store at least one data block having a particular data block size. Each memory segment location includes at least one data storage block of the particular data block size. The method further includes selectively writing the at least one data block to the at least one selected data storage block of a selected memory segment location based on a size of the at least one data block and an allocated data block size associated with the selected memory segment location.
Other features and benefits that characterize embodiments of the present invention will be apparent upon reading the following detailed description and review of the associated drawings.
The data storage device 102 includes a control circuit 108 that is adapted to communicate with a primary storage media 110, a random access memory (RAM) 114, and firmware 116. In a particular embodiment, during operation, the RAM 114 may store a logical block address (LBA) lookup table 118 that represents a mapping of LBAs to physical memory locations of the primary storage media 110. In a particular example, the primary storage media 110 can include flash memory, such as NAND flash memory and NOR flash memory, other solid-state memory, or any combination thereof that is adapted to store data.
The control circuit 108, sometimes referred to as a “controller,” includes logical block address (LBA) update logic 120 to update the LBA lookup table 118 as data is written to the primary storage media 110. The control circuit 108 also includes storage media access control logic 122 that is adapted to control read/write access to the primary storage media 110. The control circuit 108 further includes memory segment data block storage logic 124 that is adapted to divide a data storage area 126 of the primary storage media 110 into a plurality of memory segment locations 128, including a first memory segment location 130 and a second memory segment location 132. It should be understood that the data storage area 126 is divided logically, rather than physically partitioning the storage area 126. In a particular example, the plurality of memory segment locations 128 includes a plurality of physical address blocks of a particular size that are logically grouped to form a memory segment location, such as the first memory segment location 130. The memory segment data block storage logic 124 is adapted to allocate a particular memory segment location to store data blocks of a particular data block size and to allocate other memory segment locations to store data blocks of other data block sizes. In a particular example, a plurality of memory segment locations can be allocated for storage of data of different sizes (different granularities).
In a particular embodiment, the control circuit 108 is adapted to dynamically assign or allocate memory segment locations for storage of various sized data blocks, to determine a data block size associated with a data block to be written to the storage media, to identify a memory segment location allocated for storage of data blocks of a corresponding size, and to selectively write the data block to one or more storage blocks of the identified memory segment location. In a particular example, the particular data block size allocated to a particular memory segment location, such as the first memory segment location 130, remains allocated until the control circuit 108 performs a garbage collection operation to delete data from the particular memory segment location.
The firmware 116 includes instructions that are executable by the control circuit 108. The firmware 116 includes logical memory segmentation logic 134 that can be loaded and executed by the control circuit 108 to logically divide the primary storage media 110 into the plurality of memory segment locations 128. Additionally, the firmware 116 includes data block size detection logic 136 that can be loaded and executed by the control circuit 108 to determine a data block size associated with a particular data block. Further, the firmware 116 includes data block storage logic 138 that can be loaded and executed by the control circuit 108 to identify a memory segment location from the plurality of memory segment locations 128 and to selectively write a data block to the identified memory segment location. In a particular embodiment, the firmware 116 includes garbage collection logic 140 that can be loaded and executed by the control circuit 108 to identify redundant data, obsolete data, or other data that can be deleted, and to delete the identified data. In a particular example, the control circuit 108 is adapted to reallocate memory segment locations for storage of data blocks having a different data block size after the garbage collection operation is completed.
In a particular example, the first memory segment location 130 and the second memory segment location 132 are allocated to store data blocks having particular data block sizes. In one particular example, the first memory segment location 130 is allocated to store data blocks having a first data block size and the second memory segment location 132 is allocated to store data blocks having a second data block size, where the first data block size is a power of two multiple of the second data block size.
In a particular embodiment, once a block or memory segment location is allocated for a particular data block size (granularity), the block or memory segment location belongs to that particular granularity (data block size) until the block or memory segment location is garbage collected. In other words, the data block size allocation remains until a garbage collection operation is completed. By controlling memory locations to store data blocks having a particular size, a number of advantages are realized, including reduced code and data storage complexity, reduced data size, reduced logical block address (LBA) table size, reduced mapping time, reduced firmware overhead, and easier and faster garbage collection operations. In particular, since each memory segment location stores data blocks of a particular size, garbage collection, lookups and other operations can be simplified to access the pre-allocated memory segment locations. By dividing a memory into multiple segments, each segment can store a particular data size group, and memory segment locations can be categorized by the data size groups. Since each memory segment location is allocated for storage of data blocks of a particular size, a length associated with a memory access request can be used to determine where the data is likely to be stored at the storage media, simplifying search and retrieval operations. Further, memory space usage is enhanced because wasted memory space is reduced when data blocks of different and unpredictable data sizes are stored, since the data blocks may be stored at memory segments that are allocated for the particular memory sizes.
For example, if a 17 KB data block is to be written to the storage media 110, the controller (the control circuit 108) can divide the 17 KB data block into two 8 KB data block portions, which can be written to two storage blocks of an 8 KB memory segment location, such as the first memory segment location 130. The remaining 1 KB data block portion can be written to a storage block associated with a 1 KB memory segment location, such as the second memory segment location 132. In this particular example, the first memory segment location 130 can be allocated to store data blocks (or data block portions) having a size of 8 KB or less, and the second memory location 132 can be allocated for storage of data blocks (or data block portions) having a size of 1 KB or less. In general, the storage media 110 can include any number of memory segment locations to provide a wide range of granularities, for example, ranging from 16 MB to 0.5 KB (as illustrated by the granularity head 302 in
The hybrid storage device 202 includes recording subsystem circuitry 206 and a head-disc assembly 208. The recording subsystem 206 includes storage device read/write control circuitry 210 and disc-head assembly control circuitry 220. The recording subsystem circuitry 206 includes an interface circuit 212, which includes a data buffer for temporarily buffering the data and a sequencer for directing the operation of the read/write channel 216 and a preamplifier 250 of the disc-head assembly 208 during data transfer operations. The interface circuit 212 is coupled to the host system 204 and to a control processor 218, which is adapted to control operation of the hybrid storage device 202. In a particular embodiment, the control processor 218 includes dynamic memory allocation logic 238 that is adapted to logically divide a storage media, such as one or more discs 256 into a plurality of segments 257. Each of the plurality of segments 257 includes one or more storage blocks allocated to store data blocks or data block portions having a particular size. The control processor 218 is adapted to determine a data size associated with a data block to be written to the one or more discs 256 and to selectively write the data block to one or more storage blocks of a selected segment of the plurality of segments 257 based on the determined data block size.
The control processor 218 is coupled to a servo circuit 222 that is adapted to control the position of one or more read/write heads 254 relative to the one or more discs 256 as part of a servo loop established by the one or more read/write heads 254. Generally, the one or more read/write heads 254 are mounted to a rotary actuator assembly to which a coil 252 of a voice coil motor (VCM) is attached. As is known in the art, a VCM includes a pair of magnetic flux paths between which the coil 252 is disposed so that the passage of current through the coil causes magnetic interaction between the coil 252 and the magnetic flux paths, resulting in the controlled rotation of the actuator assembly and the movement of the one or more heads 254 relative to the surfaces of the one or more discs 256. The servo circuit 222 is used to control the application of current to the coil 252, and hence the position of the heads 254 with respect to the tracks of the one or more discs 256.
In general, the disc-head assembly control circuitry 220 includes the servo circuit 222 and includes a spindle circuit 226 that is coupled to a spindle motor 258 to control the rotation of the one or more discs 256. The hybrid storage device 202 also includes an auxiliary power device 228 that is coupled to the disc-head assembly control circuitry 220 and that is adapted to operate as a power source when power to the hybrid storage device 202 is lost. In a particular embodiment, the auxiliary power device 228 can be a capacitor or a battery that is adapted to supply power to the hybrid storage device 202 under certain operating conditions. In a particular example, the auxiliary power device 228 can provide a power supply to the recording subsystem assembly 206 and to the disc-head assembly 208 to record data to the one or more discs 256 when power is turned off. Further, the auxiliary power device 228 may supply power to the recording subsystem assembly 206 to record data to a data (NAND) flash 230 or to a code (NOR) flash 234 when power is turned off.
Additionally, the hybrid storage device 202 includes the data (NAND) flash 230, a dynamic random access memory (DRAM) 232, the code (NOR) flash 234, other memory 236, or any combination thereof. In a particular embodiment, the code (NOR) flash 234 stores dynamic memory allocation logic instructions 240. In a particular embodiment, the NAND flash 230 may store a logical block address (LBA) lookup table 231 that represents a mapping of logical block addresses to physical memory locations within the one or more discs 256.
In a particular embodiment, the code (NOR) flash 234 is a processor-readable medium that embodies dynamic memory allocation logic instructions 240 that are executable by the control processor 218 to logically divide the one or more discs 256 into a plurality of segments 257 including one or more storage blocks, to determine a data size associated with a data block to be written to the one or more discs 256, and to selectively write the data block to one or more storage blocks of a selected segment of the plurality of segments 257 based on the determined data block size.
In another particular embodiment, the head-disc assembly 208 can be replaced with a solid-state storage media, such as a flash memory, an electrically programmable memory, other programmable solid-state memory, or any combination thereof. When the head-disc assembly 208 is replaced with a solid-state storage media, the spindle circuit 222 and the servo circuit 222 can also be omitted. In a particular embodiment, the code (NOR) flash 234 is a processor-readable medium that is accessible to the control processor 218. The code (NOR) flash 234 stores a plurality of instructions that are executable by the control processor 218. In a particular example, the code (NOR) flash 234 includes operating instructions for the control processor 218, including the dynamic memory allocation logic instructions 240.
In a particular embodiment, the control processor 218 is adapted to logically divide a storage media, such as the one or more discs 256, into memory segment locations and to allocate each memory segment location for storage of data blocks or data block portions of a particular size. In general, each memory segment location includes one or more storage blocks adapted to store data having a particular data block size. The control processor 218 is adapted to control access to the memory segment locations by dividing and subdividing blocks of data into data block portions and selectively writing the data block portions to storage blocks to store data of particular allocated sizes associated with the memory segment locations.
In a particular embodiment, the control processor 218 is configured to selectively write data according to a course-grain data storage technique or a fine-grain data storage technique. When the control processor 218 is configured for course-grain data storage, a data block is written to one or more storage blocks of a selected memory segment location, leaving unused blocks empty and treating them as occupied. When the control processor 218 is configured for fine-grain data storage, a data block is written to one or more storage blocks of one of more selected memory segment locations to use any available sectors of the memory.
In general, the systems 100 and 200 described with respect to
For example, the in-page area 400 of the storage media includes a first virtual page 402 and a second virtual page 404, both of which include eight sectors (0-7). In a particular example, if five sectors are written to a newly allocated memory block (the first virtual page 402) of a solid-state memory device (such as a Flash memory), as indicated at 412, the five sectors 412 will occupy the eight sectors of the first virtual page 402 of the memory, though only five sectors are written. If another seven sectors 414 are written to the storage device, a controller of the storage device writes the seven sectors 414 starting from the second virtual page 404, for example filling sectors 0-6 of the second virtual page 404.
For example, the cross-page area 500 includes a plurality of virtual pages (0-7) 502. Further, the cross-page area 500 includes a first eight-page segment 504 and a second eight-page segment 506. In a particular example, each page includes eight sectors. In a particular illustrative example, storage media accesses having an access length from 33 to 64 sectors are allocated to a memory segment location that is associated with a 32 KB granularity head, such as the 32 KB granularity head illustrated in
For example, the last cross-block area 600 includes a plurality of pages (0-F) 602, and a plurality of page numbers 604, 606, 608, and 610. In a particular example, each page includes eight sectors and the cross-block area 600 includes 64 pages. In a particular illustrative example, storage media accesses having an access length of greater than 128 KB are allocated to a memory segment location that is associated with the block area that includes the last cross-block area 600. In a particular example, if 14,623 KB are to be written to a memory segment location, fifty-eight data blocks will be allocated from the memory. The first fifty-seven blocks will be fully programmed, and the last cross-block area 600 will be programmed up to the seventh page as indicated at 601. The last page (7) of the programmed portion 601 is has a sector ID 612 and sector addresses 614 and 616, which may be partially programmed with a last portion of the 14,623 KB. Unused sectors can be left empty and considered as unoccupied.
In general, the embodiments described with respect to
In a particular example, a data block to be written to the memory 700 is repetitively divided and modulated by two to find a block in a next smaller memory segment location or granularity list. For example, if 17 KB is to be written to the memory, the controller programs 8 KB in a block under the 8 KB memory segment locations (granularity list) and 1 KB at a block within the 1 KB memory segment locations (granularity list). If there is not enough memory space in an existing block under a group of particular memory segment locations, a new block can be allocated from the memory (from a clean free pool of memory blocks) to the particular data block size. In a particular example, some granularity can be skipped to facilitate memory block traversal and to allow free space for garbage collection (such as for deletion of stale or duplicate data).
In a particular example, a data block 710 having a size of 65,535 sectors is to be written to the memory 700. For each logical block address (LBA) data size range, the data block 710 is repetitively divided and modulated by two to find a block in a next smaller memory segment location (granularity list). In a particular example, 65,535 sectors may represent a maximum logical block address (LBA) range length in a non-volatile component feature set. In this example, the controller 710 is adapted to program multiple blocks within the block area 704, except at the boundaries between block sizes and page sizes. For example, if the data block sizes fall within the 256 KB memory segment locations (granularity list), the system can be adapted to store only one of the data blocks or data block portions at a storage block associated with the 256 KB memory segment location and to store other portions of the data at memory segment locations that are allocated for smaller data block portions. For example, multiple blocks can be programmed within the 16 MB to 512 KB memory segment locations (granularity lists). From the 256 KB memory segment locations (granularity list) downward, through the page area 706 and the in-page area 708, only one block per memory segment location (granularity list) is programmed.
In general, the memory segment locations allocated to a particular data block size can represent a logical grouping of physical memory locations. Further, such physical memory locations need not be adjacent to one another at the storage media. Instead, a logical block address (LBA) table can be used to map the LBA to the physical locations where the data blocks are stored anywhere on the storage media.
In a particular embodiment, the method further includes performing a garbage collection operation to delete data from a particular memory segment location of the plurality of memory segment locations and selectively reallocating the particular memory segment location for storage of data blocks of a different data block size. In a particular example, each of the plurality of memory segment locations is allocated dynamically during operation by a controller of a storage device that includes the storage media.
In a particular embodiment, each of the plurality of memory segment locations is allocated for storage of data blocks of a particular data block size. In another particular embodiment, the plurality of memory segment locations is allocated for storage of different data block sizes. In a particular example, the different data block sizes vary by a power of two. In still another particular embodiment, each of the plurality of memory segment locations are allocated dynamically during operation by a controller of a storage device that includes the storage media.
Returning to 1008, if the memory segment location exists, the method advances to 1012. Otherwise, if it doesn't exist, the memory segment location is allocated and the method advances to 1012. At 1012, the received data block is written to the memory segment location. The method terminates at 1014.
In general,
At 1202, an input/output (I/O) access request is received that includes a data block to be written to the storage media, which is divided into a plurality of data block segments allocated to store data blocks of particular data block sizes. Advancing to 1204, the data block is divided into data block portions of sizes corresponding to one or more of the particular data block sizes to produce a set of data blocks portions that have an enhanced storage area usage. In a particular example, each data block portion has an associated size that corresponds to an allocated data block size range. Each size range entry can be repetitively divided and modulated by two to find the block in a next smaller memory segment location (granularity list). For example, if 17 KB is to be written to the storage media, a controller of the storage media can repetitively divide the 17 KB into 8 KB, 8 KB, and 1 KB blocks, which can be written to storage blocks of the corresponding memory segment locations. Continuing to 1206, the data block portions are selectively written to the storage areas associated with the plurality of data block segments according to the particular data block sizes. The method terminates at 1208.
In general, the storage devices and techniques described above with respect to
It is to be understood that even though numerous characteristics and advantages of various embodiments of the invention have been set forth in the foregoing description, together with details of the structure and function of various embodiments of the invention, this disclosure is illustrative only, and changes may be made in detail, especially in matters of structure and arrangement of parts within the principles of the present invention to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed. For example, the particular elements may vary depending on the particular application for the storage system while maintaining substantially the same functionality without departing from the scope and spirit of the present disclosure. Further, the storage system can be a solid-state storage device or a hybrid storage device. It will be appreciated by those skilled in the art that the teachings of the present disclosure can be applied to various storage systems, without departing from the scope and spirit of the present invention.
