1. Technical Field
This disclosure relates to data storage systems, such as non-volatile data storage systems, for computer systems. More particularly, the disclosure relates to managing system data using garbage collection and hybrid self-mapping.
2. Description of the Related Art
Data storage systems can utilize various types of system data, such as logical to physical address mapping data, which associates logical addresses used by a host system for accessing stored data with corresponding physical locations in a data storage system where data is stored. Due to updates of data stored in the data storage system, certain stored data may become outdated, thereby causing entries in the mapping table corresponding to such outdated data to become invalid. In such circumstances, the data storage system can generate updated mapping table entries. However, various problems arise with maintenance of system data, such as increased write amplification associated with storing system data, increased reconstruction times, and the like. Accordingly, it is desirable to provide mechanisms that efficiently handle maintenance of system data.
Systems and methods that embody the various features of the invention will now be described with reference to the following drawings, in which:
While certain embodiments are described, these embodiments are presented by way of example only, and are not intended to limit the scope of protection. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms. Furthermore, various omissions, substitutions, and changes in the form of the methods and systems described herein may be made without departing from the scope of protection.
Overview
Data storage systems can utilize various types of system data, including logical to physical address mapping data, superblock data, invalid page data, invalid counter data, wear level data, and so on. Logical to physical address mapping table can comprise information associating logical addresses used by a host system to store data in a data storage system and/or access stored data with physical locations in the data storage system where data is stored. Superblock table can comprise information concerning logical groupings of non-volatile memory blocks into superblocks. Superblocks can be utilized to achieve parallel or concurrent execution of multiple storage access operations. In one embodiment, each block in a superblock can be on one die of a group of non-volatile memory dies. Other configurations are possible in other embodiments. For example, a superblock can be comprised of blocks from various planes in a group of dies. In another embodiment, multiple blocks within a superblock may be on the same die/plane. Invalid page table can comprise information concerning locations of non-volatile memory pages that are defective or unreliable (e.g., those pages where data should not be stored). Invalid counter table can comprise information corresponding to the associations of invalid pages with particular superblocks. Wear level table can comprise erase counts for non-volatile memory locations (e.g., partial pages, pages, blocks, groups of blocks, etc.).
Some embodiments of the present invention generate and update system data quickly and efficiently while reducing write amplification associated with managing system data. Advantageously, reconstruction time of system data (e.g., during initialization) is also reduced. In addition, segmenting of system data (e.g., storing and loading segments of system data) is allowed, and efficiency of loading segments of system data is increased.
In some embodiments of the present invention, system data can be maintained in a volatile memory of a data storage system, and is periodically stored or flushed to a non-volatile memory for persistent storage. First and second sets of system data pages can be flushed to first and second regions (e.g., superblocks) in a non-volatile memory array. As a result of performing storage access operations in the data storage system, certain entries of the first and second sets of system data pages may become invalid. In response to determining that a number of remaining valid entries in the first set of system data pages falls below a selected threshold, valid entries pages of the first set are copied to a third region of the non-volatile memory array. The first region can be marked as free for future use.
In some embodiments of the present invention, the first region comprises the smallest number of valid system data pages in any region of the non-volatile memory where system data pages are stored. This region is selected for freeing (e.g., by performing garbage collection). Accordingly, write amplification associated with flushing system data is reduced because the region with the smallest amount of valid system data can be selected for garbage collection, which can comprise copying valid system data to the third region.
In some embodiments of the present invention, a mapping information (e.g., mapping page or pages) indicating non-volatile memory array locations in which the system data pages are stored is generated. Generating and storing in the non-volatile memory such mapping page reduces time associated with reconstruction of system data (which can reduce initialization or start up time of the data storage system). This is because the mapping page can be used to locate system data pages based on the indications of locations where system data pages are stored. Thereby, a copy of the located system data pages can be loaded from non-volatile memory to the volatile memory.
Some embodiments of the present invention do not utilize logs for tracking changes to system data (e.g., changes that are associated with updates of data stored in the data storage system). Instead, updated system data information is generated and flushed to the non-volatile memory.
System Overview
In some embodiments, non-volatile memory 150 can be partitioned into dies, planes, channels, blocks, pages, and so on. In certain embodiments, a non-volatile memory page (e.g., NAND page) can refer to a smallest grouping of memory cells (or smallest granularity) that can be programmed or written in a single operation or as a unit (e.g., atomically). In some embodiments, the data storage system 120 can also comprise other types of storage, such as one or more magnetic storage modules 160, which can comprise volatile cache (e.g., DRAM) 162 and non-volatile magnetic media 164.
The controller 130 can be configured to receive data and/or storage access commands from a storage interface module 112 (e.g., a device driver) of a host system 110. Storage access commands communicated by the storage interface 112 can include write data and read data commands issued by the host system 110. Read and write commands can specify a logical address (e.g., LBA) used to access the data storage system 120. The controller 130 can execute the received commands in the non-volatile memory array 150 and/or other storage modules, such as magnetic storage 160.
Data storage system 120 can store data communicated by the host system 110. In other words, the data storage system 120 can act as memory storage for the host system 110. To facilitate this function, the controller 130 can implement a logical interface. The logical interface can present to the host system 110 data storage system's memory as a set of logical addresses (e.g., contiguous address) where host data can be stored. Internally, the controller 130 can map logical addresses to various physical locations or addresses in the non-volatile memory array 150 and/or other storage modules. Such mapping can be performed using a logical to physical address mapping table.
The controller 130 includes a system data manager module 132 for generating, maintaining, updating, storing, etc. various types of system data. Such system data can include one or more of the following: logical to physical address mapping data, superblock data, invalid page data, invalid counter data, wear level data, and so on. Although logical to physical address mapping table system data example is used throughout this disclosure, approaches disclosed herein are applicable to other types of system data organized as tables or using other suitable data structures. In some embodiments, approaches disclosed herein can be particularly applicable to types of system data whose changes tend to be localized because of host activity (e.g., operating system activity). Examples of such types of system data include logical to physical mapping data, invalid page data, invalid counter data, wear level data, and the like.
The controller 130 also includes volatile memory 134 where various types of data can be stored, such as system data 136. It may be advantageous to store system data in the volatile memory 134 for faster access (e.g., particularly data that is frequently used by the controller 130 and/or the data storage system 120). In some embodiments, volatile memory 134 can be located outside the controller 130.
Garbage Collection and Hybrid Self-Mapping
With reference to
With reference to
In some embodiments, write amplification in the best case is 1.0 (e.g., region with no valid mapping table entries is garbage collected). In certain embodiments, write amplification in the worst case can be determined according to the following equation or some variation thereof:
maximum write amplification=1/over-provisioning (1)
where over-provisioning is the amount of extra regions allocated to or reserved for storing the mapping table. For example, the amount of over-provisioning for the mapping table 200 is 50% (or 0.5) because, as is show in
With reference to
In one embodiment, the mapping page 280 can include a header that provides information regarding aggregate number of valid mapping table pages within each region (e.g., 3 KB/4 KB or 75%). The header or other identifying information (such as metadata) may be used to identify the mapping page among pages of non-volatile memory array 150.
The mapping page 280 can be used to increase the start-up or power-up time of the data storage system 120. During reconstruction of the mapping table (e.g., loading of the mapping table from the non-volatile memory 150 to the volatile memory 134), the mapping page provides a list of pointers to locations in the non-volatile memory where mapping table pages are stored. Using mapping page information allows for faster full or partial (e.g., segmented) reconstruction of the mapping table.
In one embodiment, the mapping page 280 can be periodically generated and stored in (or flushed to) the non-volatile memory array 150. For example, the mapping page can be generated and stored after N number of updates to the mapping table have been performed, where N is an integer number (e.g., 2, 4, 8, 10, 16, 20, 32, 64, etc.). That is, a new mapping page can be generated and stored after N new mapping table pages have been generated and stored. As another example, a new mapping page can be generated and stored periodically, such as after every N number of new updates to the mapping table have been performed.
In an embodiment, the mapping page 280 can be generated and stored in (or flushed to) the non-volatile memory array 150 when the data storage system 120 experiences a power interruption, power loss, system shutdown, system reset, etc. In addition, any generated updated mapping table pages can also be stored in (or flushed to) the non-volatile memory array 150. Such flushing keeps the mapping table power safe.
In one embodiment, multiple mapping pages can be generated and flushed to the non-volatile memory array 150. For example, a next mapping page (e.g., mapping page generated after a current mapping page has already been generated) can reflect changes in locations of mapping table pages due to copying valid mapping pages as a result of performing garbage collection, changes in locations of mapping table pages due to updates of stored data and due to marking certain table pages as invalid, and the like. In another embodiment, the already generated mapping page can be updated to reflect such changes.
In block 408, the 400 process may determine that a non-volatile memory 150 region allocated for mapping table data needs to be freed. As described above, the process 400 can select for garbage collection a region having an amount of valid mapping table data (e.g., valid mapping table pages) that is below a valid data threshold. For example, a region having the least amount of valid data can be selected. In block 410, the process can perform garbage collection of the selected region. In one embodiment, the process can copy valid mapping table data (e.g., valid mapping table pages) from the selected region to another non-volatile memory region (e.g., spare or free region). In block 412 the process 412 can designate or mark the selected region (from which valid mapping table data was copied) as a free region so that the region can be used in the future for storing mapping table data.
In block 414, the process 400 can generate a mapping page indicating locations of valid mapping table pages in the non-volatile memory array 150. For example, as described above, the mapping page can be generated and stored after the process 400 generates and stores (e.g., flushes to the non-volatile memory array) a certain amount of mapping table data that includes new (or replacement) associations between logical addresses and physical locations. The mapping page can be generated when the number reaches and/or exceeds a threshold, as is described above. The process 400 can terminate after the mapping page has been flushed.
In block 504, the process 500 locates the mapping page(s). The process 500 can locate the mapping page(s) by scanning non-volatile memory regions. As is described above, the mapping page(s) can have an identifying header or other identifying information (such as metadata). In one embodiment (as is described above), the mapping page(s) can be periodically flushed to the non-volatile memory 150. For example, the process 500 can scan non-volatile memory regions for the mapping page(s) by scanning backward in a region (e.g., superblock) starting from the last updated table page flushed to the non-volatile memory array 150. The process 500 can scan the non-volatile memory backward until it locates the mapping page(s). In another embodiment, the process 500 can store physical location(s) of the mapping page(s) (e.g., pointer(s) to the physical location(s)) in a well-known memory location (e.g., root table, parent table, etc.). This location information can be used to locate the mapping page(s) in the non-volatile memory array 150.
In block 506, the process 500 can use information in the mapping page(s) to locate mapping table data stored in the non-volatile memory array 150 (e.g., each mapping table page when full reconstruction is performed or a selected set of mapping table pages when segmented reconstruction is performed). The process 500 can load located mapping table data into the volatile memory 134. In block 508, the process 500 can locate additional mapping table data stored past or beyond the mapping page(s). As is described above, mapping table pages can include identifying information (e.g., metadata). If such additional mapping table data is found, the process can load such data into the volatile memory 134. The process can terminate when it loads the entire mapping table or a desired segment of the mapping table (which may be referred to as loading).
To increase the efficiency of managing and storing system data and to reduce reconstruction time, a data storage system can utilize garbage collection and hybrid self-mapping. Write amplification associated with managing and storing system data can be reduced at least in part because of the delay in committing system data changes or updates to non-volatile memory, such as the delay in copying updated system data from one non-volatile memory region to another non-volatile memory region. In addition, write amplification can be reduced because only valid system data can be copied when garbage collection is performed. Reconstruction time can be reduced because mapping associating system data with physical locations in non-volatile storage where system data is stored can be generated. Logs that indicate changes to system data may not be necessary.
Other Variations
Those skilled in the art will appreciate that additional system components can be utilized, and disclosed system components can be combined or omitted. In some embodiments system data can be generated without being stored in the non-volatile memory. In addition, while in some embodiments a table page refers to a quantity of mapping table data that fits into a page of non-volatile memory, other storage arrangements can be utilized. Although logical to physical address mapping table system data example is used throughout this disclosure, approaches disclosed herein are applicable to other types of system data organized as tables or using other suitable data structures. System data can be stored in other non-volatile memory modules, such as magnetic storage. For example, in one embodiment where the data storage system is a shingled magnetic device, which may use address indirection that require maintenance of mapping table data, the system data may be saved in the magnetic storage 160 in the manners described herein. Further, other methods of scanning for mapping information or page(s) can be used. Logs indicating changes to system data additionally can be used in some embodiments. The actual steps taken in the disclosed processes, such as the processes illustrated in
While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the protection. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms. Furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made without departing from the spirit of the protection. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the protection. For example, the systems and methods disclosed herein can be applied to hard disk drives, hybrid hard drives, and the like. In addition, other forms of storage (e.g., DRAM or SRAM, battery backed-up volatile DRAM or SRAM devices, EPROM, EEPROM memory, etc.) may additionally or alternatively be used. As another example, the various components illustrated in the figures may be implemented as software and/or firmware on a processor, ASIC/FPGA, or dedicated hardware. Also, the features and attributes of the specific embodiments disclosed above may be combined in different ways to form additional embodiments, all of which fall within the scope of the present disclosure. Although the present disclosure provides certain preferred embodiments and applications, other embodiments that are apparent to those of ordinary skill in the art, including embodiments which do not provide all of the features and advantages set forth herein, are also within the scope of this disclosure. Accordingly, the scope of the present disclosure is intended to be defined only by reference to the appended claims.
Number | Name | Date | Kind |
---|---|---|---|
5835955 | Dornier et al. | Nov 1998 | A |
6728826 | Kaki et al. | Apr 2004 | B2 |
6856556 | Hajeck | Feb 2005 | B1 |
7126857 | Hajeck | Oct 2006 | B2 |
7212440 | Gorobets | May 2007 | B2 |
7430136 | Merry, Jr. et al. | Sep 2008 | B2 |
7447807 | Merry et al. | Nov 2008 | B1 |
7502256 | Merry, Jr. et al. | Mar 2009 | B2 |
7502259 | Gorobets | Mar 2009 | B2 |
7509441 | Merry et al. | Mar 2009 | B1 |
7596643 | Merry, Jr. et al. | Sep 2009 | B2 |
7653778 | Merry, Jr. et al. | Jan 2010 | B2 |
7685337 | Merry, Jr. et al. | Mar 2010 | B2 |
7685338 | Merry, Jr. et al. | Mar 2010 | B2 |
7685374 | Diggs et al. | Mar 2010 | B2 |
7733712 | Walston et al. | Jun 2010 | B1 |
7765373 | Merry et al. | Jul 2010 | B1 |
7898855 | Merry, Jr. et al. | Mar 2011 | B2 |
7912991 | Merry et al. | Mar 2011 | B1 |
7913061 | Gorobets et al. | Mar 2011 | B2 |
7936603 | Merry, Jr. et al. | May 2011 | B2 |
7962792 | Diggs et al. | Jun 2011 | B2 |
8078918 | Diggs et al. | Dec 2011 | B2 |
8090899 | Syu | Jan 2012 | B1 |
8095851 | Diggs et al. | Jan 2012 | B2 |
8108692 | Merry et al. | Jan 2012 | B1 |
8122185 | Merry, Jr. et al. | Feb 2012 | B2 |
8127048 | Merry et al. | Feb 2012 | B1 |
8135903 | Kan | Mar 2012 | B1 |
8151020 | Merry, Jr. et al. | Apr 2012 | B2 |
8161227 | Diggs et al. | Apr 2012 | B1 |
8166245 | Diggs et al. | Apr 2012 | B2 |
8194340 | Boyle et al. | Jun 2012 | B1 |
8243525 | Kan | Aug 2012 | B1 |
8254172 | Kan | Aug 2012 | B1 |
8261012 | Kan | Sep 2012 | B2 |
8296625 | Diggs et al. | Oct 2012 | B2 |
8312207 | Merry, Jr. et al. | Nov 2012 | B2 |
8316176 | Phan et al. | Nov 2012 | B1 |
8341339 | Boyle et al. | Dec 2012 | B1 |
8375151 | Kan | Feb 2013 | B1 |
8392635 | Booth et al. | Mar 2013 | B2 |
8397107 | Syu et al. | Mar 2013 | B1 |
8407449 | Colon et al. | Mar 2013 | B1 |
8423722 | Deforest et al. | Apr 2013 | B1 |
8433858 | Diggs et al. | Apr 2013 | B1 |
8443167 | Fallone et al. | May 2013 | B1 |
8447920 | Syu | May 2013 | B1 |
8458435 | Rainey, III et al. | Jun 2013 | B1 |
8478930 | Syu | Jul 2013 | B1 |
8489854 | Colon et al. | Jul 2013 | B1 |
8503237 | Horn | Aug 2013 | B1 |
8521972 | Boyle et al. | Aug 2013 | B1 |
8549236 | Diggs et al. | Oct 2013 | B2 |
8583835 | Kan | Nov 2013 | B1 |
8601311 | Horn | Dec 2013 | B2 |
8601313 | Horn | Dec 2013 | B1 |
8612669 | Syu et al. | Dec 2013 | B1 |
8612804 | Kang et al. | Dec 2013 | B1 |
8615681 | Horn | Dec 2013 | B2 |
8638602 | Horn | Jan 2014 | B1 |
8639872 | Boyle et al. | Jan 2014 | B1 |
8683113 | Abasto et al. | Mar 2014 | B2 |
8700834 | Horn et al. | Apr 2014 | B2 |
8700950 | Syu | Apr 2014 | B1 |
8700951 | Call et al. | Apr 2014 | B1 |
8706985 | Boyle et al. | Apr 2014 | B1 |
8707104 | Jean | Apr 2014 | B1 |
8745277 | Kan | Jun 2014 | B2 |
20020184436 | Kim et al. | Dec 2002 | A1 |
20030065899 | Gorobets | Apr 2003 | A1 |
20040210706 | In et al. | Oct 2004 | A1 |
20050166028 | Chung et al. | Jul 2005 | A1 |
20080098195 | Cheon et al. | Apr 2008 | A1 |
20090150599 | Bennett | Jun 2009 | A1 |
20100106897 | Yoshimura | Apr 2010 | A1 |
20100174849 | Walston et al. | Jul 2010 | A1 |
20100180068 | Matsumoto et al. | Jul 2010 | A1 |
20100250793 | Syu | Sep 2010 | A1 |
20110099323 | Syu | Apr 2011 | A1 |
20110161621 | Sinclair et al. | Jun 2011 | A1 |
20110283049 | Kang et al. | Nov 2011 | A1 |
20110307651 | Wong | Dec 2011 | A1 |
20120144152 | Jeddeloh | Jun 2012 | A1 |
20120198130 | Noborikawa et al. | Aug 2012 | A1 |
20120260020 | Suryabudi et al. | Oct 2012 | A1 |
20120278531 | Horn | Nov 2012 | A1 |
20120284460 | Guda | Nov 2012 | A1 |
20120324191 | Strange et al. | Dec 2012 | A1 |
20130132638 | Horn et al. | May 2013 | A1 |
20130145106 | Kan | Jun 2013 | A1 |
20130166819 | Yerushalmi et al. | Jun 2013 | A1 |
20130185508 | Talagala et al. | Jul 2013 | A1 |
20130290793 | Booth et al. | Oct 2013 | A1 |
20140059405 | Syu et al. | Feb 2014 | A1 |
20140115427 | Guangming Lu | Apr 2014 | A1 |
20140133220 | Danilak et al. | May 2014 | A1 |
20140136753 | Tomlin et al. | May 2014 | A1 |
Entry |
---|
U.S. Appl. No. 13/152,645, filed Jun. 3, 2011, to Call et al., 19 pages. |