The subject matter herein generally relates to measurement of electricity.
In general, a current detecting circuit mainly uses a current detecting chip to measure the current. However, in practical applications, a current detecting chip can limit the accuracy of the current detecting.
Therefore, there is a room for improvement.
Implementations of the present disclosure will now be described, by way of embodiments, with reference to the attached figures.
It will be appreciated that for simplicity and clarity of illustration, where appropriate, reference numerals have been repeated among the different figures to indicate corresponding or analogous elements. Additionally, numerous specific details are set forth in order to provide a thorough understanding of the embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein can be practiced without these specific details. In other instances, methods, procedures, and components have not been described in detail so as not to obscure the related relevant feature being described. The drawings are not necessarily to scale and the proportions of certain parts may be exaggerated to better illustrate details and features. The description is not to be considered as limiting the scope of the embodiments described herein.
Several definitions that apply throughout this disclosure will now be presented.
The term “coupled” is defined as connected, whether directly or indirectly through intervening components, and is not necessarily limited to physical connections. The connection can be such that the objects are permanently connected or releasably connected. The term “comprising” means “including, but not necessarily limited to”; it specifically indicates open-ended inclusion or membership in a so-described combination, group, series, and the like.
In at least one embodiment, the current measurement system 100 includes a voltage generating unit 12, a voltage obtaining unit 13, a voltage amplifying unit 14, a converting unit 15, a controlling unit 16, and a processing unit 20.
The voltage generating unit 12 is electrically coupled to the current input terminal 11. The voltage generating unit 12 receives the current from the current input terminal 11.
The voltage generating unit 12 is electrically coupled to controlling unit 16. The voltage generating unit 12 receives the control signal from the controlling unit 16, and converts the magnitude of the current into different voltage signals.
The voltage obtaining unit 13 is electrically coupled between the voltage generating unit 12 and voltage amplifying unit 14.
The voltage obtaining unit 13 obtains the voltage signals, and transmits the voltage signals to the voltage amplifying unit 14.
The voltage amplifying unit 14 is electrically coupled between the voltage obtaining unit 13 and the converting unit 15. The voltage amplifying unit 14 amplifies the voltage signal by a preset coefficient, and outputs the amplified voltage signal to the converting unit 15.
The converting unit 15 is electrically coupled to processing unit 20. The converting unit 15 performs analog-to-digital conversion on the amplified voltage signal to obtain a digital signal, and outputs the digital signal to the processing unit 20.
The processing unit 20 selects a magnification according to the digital signal to obtain a corresponding value of current.
In at least one embodiment, the processing unit 20 may include a human-computer interface platform and a computer.
In the embodiment, the voltage generating unit 12 shows only three switch controlling modules (switch controlling module 122, switch controlling module 123, and switch controlling module 124) as an example. In other embodiments, the number of the switch controlling modules in the voltage generating unit 12 may also be greater than three.
In the embodiment, the switch controlling module 122 includes a switch Q1 and a resistor R1. The switch controlling module 123 includes a switch Q2 and a resistor R2. The switch controlling module 124 includes a switch Q3 and a resistor R3.
A first terminal of the switch Q1 is electrically coupled to the controlling unit 16. A second terminal of the switch Q1 is electrically coupled to the current input terminal 11, and the second terminal of the switch Q1 is electrically coupled to a first terminal of the resistor R1. A third terminal of the switch Q1 is electrically coupled to a second terminal of the resistor R1. The first terminal and the second terminal of the resistor R1 are electrically coupled to the voltage obtaining unit 13.
A first terminal of the switch Q2 is electrically coupled to the controlling unit 16. A second terminal of the switch Q2 is electrically coupled to a first terminal of the resistor R2. A third terminal of the switch Q2 is electrically coupled to a second terminal of the resistor R2. The second terminal of the resistor R1 is electrically coupled to the first terminal of the resistor R2. The first terminal and the second terminal of the resistor R2 are electrically coupled to the voltage obtaining unit 13.
A first terminal of the switch Q3 is electrically coupled to the controlling unit 16. A second terminal of the switch Q3 is electrically coupled to a first terminal of the resistor R3. A third terminal of the switch Q3 is electrically coupled to a second terminal of the resistor R3. The second terminal of the resistor R2 is electrically coupled to the first terminal of the resistor R3. The first terminal and the second terminal of the resistor R3 are electrically coupled to the voltage obtaining unit 13.
In at least one embodiment, the switch Q1, the switch Q2, and the switch Q3 can be field effect transistors (FET). The first terminal of the switch Q1, the switch Q2, and the switch Q3 can be gates of the FETs, the second terminal of the switch Q1, the switch Q2, and the switch Q3 can be drains of the FETs, and the third terminal of the switch Q1, the switch Q2, and the switch Q3 can be sources of the FETs.
In at least one embodiment, the resistances of the resistor R1, the resistor R2, and the resistor R3 are all different. For example, the resistance of the resistor R1 is 0.1 ohm, the resistance of the resistor R2 is 0.01 ohm, and the resistance of the resistor R3 is 1 ohm.
In use, the current input terminal 11 inputs current, and the processing unit 20 outputs a switch signal to the voltage generating unit 12 according to the initialized setting, to obtain a current signal. The processing unit 20 determines the magnitude of the current signal.
If the processing unit 20 cannot determine the magnitude of the current signal, the processing unit 20 sends an instruction signal to the controlling unit 16. The controlling unit 16 selects a resistor (such as R1) corresponding to the apparent magnitude of the current signal according to the command signal, and outputs the control signal at a first level to the first end of the switch corresponding to the resistor (such as the switch Q1), so that the switch Q1 is turned off. At the same time, the controlling unit 16 outputs the control signal at a second level to the first end of the switch Q2 and the switch Q3, so that the switch Q2 and the switch Q3 are turned on.
Thereby, the current signal generated by the current input terminal 11 passes through the resistor R1 only. At this time, the voltage obtaining unit 13 acquires a voltage signal of both ends of the resistor R1, and outputs the voltage signal to the voltage amplifying unit 14. The voltage amplifying unit 14 amplifies the voltage signal with a preset amplification factor A (such as 1000 times), and transmits the amplified voltage signal to the converting unit 15.
The converting unit 15 performs analog-to-digital conversion on the amplified voltage signal to obtain the digital signal, and outputs the digital signal to the processing unit 20. The processing unit 20 selects a magnification according to the digital signal to obtain a current value.
Since the resistance values of the resistors are all different, the processing unit 20 will control the conduction states corresponding to the switches Q1-Q3 according to the magnitude of the current signal.
Similarly, the controlling unit 16 controls the current signal input by the current input terminal 11 to pass through all or one other resistor on the same principle as that applied to the resistor R1.
Even though numerous characteristics and advantages of the present technology have been set forth in the foregoing description, together with details of the structure and function of the present disclosure, the disclosure is illustrative only, and changes may be made in the detail, especially in matters of shape, size, and arrangement of the parts within the principles of the present disclosure, up to and including the full extent established by the broad general meaning of the terms used in the claims. It will therefore be appreciated that the exemplary embodiments described above may be modified within the scope of the claims.
Number | Date | Country | Kind |
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201910804361.4 | Aug 2019 | CN | national |