System for the verification of the absence of voltage

Information

  • Patent Grant
  • 10126335
  • Patent Number
    10,126,335
  • Date Filed
    Tuesday, September 22, 2015
    8 years ago
  • Date Issued
    Tuesday, November 13, 2018
    5 years ago
Abstract
A system for the verification of the absence of voltage includes a first impedance, an amplitude limiter electrically connected to the first impedance, a second impedance electrically connected to the first impedance and the amplitude limiter, a varactor circuit electrically connected to the second impedance, an isolation capacitor electrically connected to the second impedance and varactor circuit, an envelope circuit with a voltage detection circuit connected to the isolation circuit via a buffer, and an RF oscillator. The amplitude limiter configured to limit the voltage applied to the varactor circuit. The RF oscillator configured to interact with the varactor circuit in order to create a modulated circuit for the buffer and envelope circuit. The envelope circuit is configured to demodulate the signal for the voltage detection circuit.
Description
FIELD OF THE INVENTION

This invention relates generally to voltage detection systems and more specifically to voltage detection systems using amplitude modulation techniques.


BACKGROUND OF THE INVENTION

Prior to performing work on electrical installation/equipment, workers are required to verify that the equipment is in an electrically safe state. Until proven otherwise, one must assume that the equipment is energized and take all necessary precautions, including utilizing appropriate personal protective equipment (PPE). One part of the verification of an electrically safe work condition involves a test for the absence of voltage. This test is performed by a trained and qualified electrician using an adequately rated voltage tester, usually a portable voltmeter or multi-meter. The electrician first tests his meter on a known, energized source to ensure it is working properly. He/she then verifies that voltage is absent in the electrical equipment by metering phase-to-phase and phase-to-ground. Finally, he re-tests his meter on a known, energized source to ensure it is still functioning properly and wasn't damaged during the test. Although voltage verification is an NFPA 70E requirement and considered a best practice, the test itself still presents a hazard because workers are exposed to energized circuits and conductors when using the voltage tester during the live portions of the test.


A permanent installed device that is able to detect the presence and verify the absence of primary (single- or multi-phase AC or DC) voltage and positively indicate the status of voltage in a particular electrical compartment would be useful for this type of application.


One of the key steps to verifying the absence of a signal is to perform a check to verify that the device/tester can detect a known voltage unit (test the tester). One other step is to verifying the unit is actually measuring the signal and has not unknowingly been disconnected (connectivity test).


SUMMARY OF THE INVENTION

A system for the verification of the absence of voltage includes a first impedance, an amplitude limiter electrically connected to the first impedance, a second impedance electrically connected to the first impedance and the amplitude limiter, a varactor circuit electrically connected to the second impedance, an isolation capacitor electrically connected to the second impedance and varactor circuit, an envelope circuit with a voltage detection circuit connected to the isolation circuit via a buffer, and an RF oscillator. The amplitude limiter configured to limit the voltage applied to the varactor circuit. The RF oscillator configured to interact with the varactor circuit in order to create a modulated circuit for the buffer and envelope circuit. The envelope circuit is configured to demodulate the signal for the voltage detection circuit.





BRIEF DESCRIPTION OF FIGURES


FIG. 1 is a schematic view of a system for the verification of the absence of voltage.



FIG. 2 is a schematic view of a system for the verification of the absence of voltage which is similar to the system of FIG. 1, but adds an inductor in series with the varactor diodes.



FIG. 3 is a schematic view of a system for the verification of the absence of voltage which is similar to the system of FIG. 2, but adds a charge-pump circuit.



FIG. 4 is a schematic view of a system for the verification of the absence of voltage which is similar to the system of FIG. 3, but adds an additional high impedance path to ground from the power line.



FIG. 5 shows how the above systems can be applied to a three-phase power line.





DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS


FIG. 1 shows one embodiment of a system 10 for the verification of the absence of voltage. The system 10 includes a power line 101 (in this application, the power line is the voltage source that is to be detected by the system 10), amplitude limiter 104, varactor circuit 107, isolation capacitor 110, RF oscillator circuit 112, and an envelope detection circuit 115.


The amplitude limiter 104 limits the amplitude of the signal that will be applied to the varactor circuit 107.


The varactor circuit 107 includes two opposing varactor diodes 108. Varactor diodes act as voltage controlled capacitors whose capacitance increases as the reverse voltage applied across the varactor diode decreases. As a result, as the reverse voltage decreases so does the impendence path for the RF oscillator circuit 112. Thus, since the resistor of the oscillator 113 circuit remains constant (and since a voltage divider is created between the resistor 113 and varactor circuit 107), a modulated signal is created for the envelope detection circuit 115 which reflects the voltage applied across the varactor circuit 107.


The envelope detection circuit 115 acts as a demodulator with an output that is dependent upon the detected voltage of the system 10. By monitoring the output voltage of the envelope detection circuit 115, and by knowing a base or calibration magnitude, one can then determine whether voltage is present from the power signal.


The isolation capacitor 110 isolates the RF oscillator circuit 112 and the envelope detection circuit 115 from low frequency and DC signals from the amplitude limiter 104 and varactor circuit 107.



FIG. 1 shows how a power signal 121 will be modified at various points in the system 10. FIG. 1 shows the unmodified sine wave representing the power signal 121. The amplitude limiting circuit 104 then limits the peak voltage of the power signal, creating an amplitude limited voltage 122. An amplitude modulated signal 123 is created from the RF oscillating circuit 112 and the varactor circuit 107. The amplitude modulated circuit 123 is then changed to a voltage detection signal 124 by the envelope detection circuit 105.


The sensitivity of such a system can be optimized around a specific voltage level (such as zero volts) as shown in FIG. 2. FIG. 2 shows a system 20 for the verification of the absence of voltage similar to the system 10 of FIG. 1, but with an added inductor 208 in the varactor circuit 207. The added inductor 208 creates a resonance circuit which acts as a short circuit at the resonance frequency. In one embodiment, the resonance frequency is the same frequency as the signal generated by the RF oscillating circuit 112. The sensitivity of the system 20 can be further optimized by adjusting the Q factor of the LCR circuit created by the RF oscillating circuit 112 and the varactor circuit 207 (with added inductor).


Absence of voltage indicators may need to perform various tests to help indicate that the device is functioning properly. These tests may be performed automatically or manually (initiated by a user). FIG. 3 shows a system 30 for the verification of the absence of voltage which adds a charge-pump circuit 316 to the system of FIG. 2. The charge-pump circuit 316 can present a voltage similar to a voltage the system 30 is intended to detect. Detection of a voltage from the charge-pump circuit 316 will help to establish that the system is operating as intended.


Another test can involve testing for continuity between the power line 101 and the rest of the system. FIG. 4 shows a system 40 for the verification of the absence of voltage similar to the system 30 of FIG. 3, except it adds an independent high impedance path to ground 417 from the power line 101. The addition of the independent high impedance path 417 will act as a voltage divider to the charge pump circuit 316. If the voltage detected from the charge pump circuit 316 is not divided, then it can be determined that the remainder of the system 40 is not connected to the power line 101.


The above systems can be applied with a three phase power line as shown in FIG. 5. A separate power source can be used to operate the system in order to positively indicate the absence of voltage. The positive indication of the absence of voltage can be indicated on a display or as an output signal. In one embodiment, the system can be activated using a test or push button or through a test request signal sent to the system (FIG. 5 shows an embodiment which utilizes a push button). After the system is activated, it can run through a series of tests such as testing the operation through a charge pump circuit and testing for continuity.


In order to meet some fault tolerant requirements and to provide a high degree of confidence in function of the devise, the functions of the system can be split into two independent branch circuits. One is to perform voltage detection function and the other one is for testing the system functionality by presenting various states and monitoring that the voltage-detection branch circuits are functioning as intended. The various states can include a connectivity test on each phase, voltage testability of the device on each phase, and other self-test functions


While particular embodiments and applications of the present invention have been illustrated and described, it is to be understood that the invention is not limited to the precise construction and compositions disclosed herein and that various modifications, changes, and variations may be apparent from the foregoing without departing from the spirit and scope of the invention as described.

Claims
  • 1. A system for the verification of the absence of voltage comprising: a first impedance connected to a power source;an amplitude limiter electrically connected to the first impedance;a second impedance electrically connected to the first impedance and the amplitude limiter;a varactor circuit electrically connected to the second impedance;an isolation capacitor electrically connected to the second impedance and the varactor circuit;an RF oscillator electrically connected to the isolation capacitor;an envelope detection circuit electrically connected to the RF circuit and the isolation capacitor; anda voltage detection circuit connected to the envelope circuit, wherein the amplitude limiter is configured to limit the voltage applied across the varactor circuit, the RF oscillator is configured to interact with the varactor circuit to create a modulated signal for the envelope circuit, and wherein the envelope circuit is configured to demodulate the signal for the voltage detector wherein the envelope circuit is electrically connected to the RF oscillator and the isolation capacitor via a buffer.
  • 2. The system of claim 1 wherein the varactor circuit includes an inductor configured to create a resonance circuit.
  • 3. The system of claim 2 further comprising a charge pump circuit configured to create a voltage similar to one intended to be detected by the system.
  • 4. The system of claim 3 further comprising an independent high impedance path to ground for the charge pump circuit configured to create a voltage divider to the charge pump circuit.
PCT Information
Filing Document Filing Date Country Kind
PCT/US2015/051344 9/22/2015 WO 00
Publishing Document Publishing Date Country Kind
WO2016/048954 3/31/2016 WO A
US Referenced Citations (30)
Number Name Date Kind
3141128 Behr Jul 1964 A
3496453 Swain Feb 1970 A
3536997 Holt Oct 1970 A
3737765 Lee et al. Jun 1973 A
3810003 Portoulas May 1974 A
3863208 Balban Jan 1975 A
3914757 Finlay, Jr. Oct 1975 A
4193026 Finger Mar 1980 A
4489278 Sawazaki Dec 1984 A
4870343 Dooley et al. Sep 1989 A
5245275 Germer et al. Sep 1993 A
5285163 Liotta Feb 1994 A
5353014 Carroll et al. Oct 1994 A
5600524 Neiger et al. Feb 1997 A
5715125 Neiger et al. Feb 1998 A
5814997 Bouchez Sep 1998 A
5867019 Malenko et al. Feb 1999 A
5874895 Devamey Feb 1999 A
5986557 Clarke Nov 1999 A
6075448 Verkhovskiy Jun 2000 A
6100679 McCasland Aug 2000 A
6111733 Neiger et al. Aug 2000 A
6157184 Atherton Dec 2000 A
6313642 Brooks Nov 2001 B1
6703938 Clarke Mar 2004 B1
6988061 Gray et al. Jan 2006 B2
7154281 Piesinger Dec 2006 B2
7268558 Mills et al. Sep 2007 B2
7319315 Martin Jan 2008 B2
20070108992 Yanagisawa May 2007 A1
Foreign Referenced Citations (5)
Number Date Country
10140855 Mar 2003 DE
2597210 Oct 1987 FR
H02214892 Aug 1990 JP
H0651001 Feb 1994 JP
H0977409 Oct 1994 JP
Related Publications (1)
Number Date Country
20170269129 A1 Sep 2017 US
Provisional Applications (1)
Number Date Country
62053420 Sep 2014 US