Patent Application
20180331647
The present application relates to a system in package that may be preferably used in a motor drive circuit, and a motor drive circuit device including the system in package. In addition, the present application also relates to a motor module including a motor and the motor drive circuit device.
Motors such as a brushless DC motor and an alternating current synchronous motor are driven by three-phase current. To accurately control waveforms of the three-phase current, a complex control technique such as vector control is used. In such control technique, an advanced mathematical operation is needed, and a digital operating circuit such as a micro controller (microcontroller) is used. The vector control technique is applied for uses where load fluctuation of the motor is large in fields such as, for example, washing machines, electric-powered assist bicycles, electric-powered scooters, electric-powered power steering, electric automobiles, and industrial equipment. On the other hand, a different motor control system is adopted for a motor where an output is relatively small.
Up to now, a control circuit of the motor has been manufactured while various circuit parts such as a microcontroller, a gate driver circuit, an operational amplifier, and a DC-DC converter are appropriately combined for the motor.
Japanese Unexamined Patent Application Publication No. 2010-187435 discloses a technique to integrate, as a peripheral circuit that controls an inverter, a gate signal generation circuit and a gate driver circuit on a single semiconductor integrated circuit chip (a single semiconductor substrate).
Parts such as a microcontroller for control, a gate driver circuit, an operational amplifier, and a DC-DC converter are appropriately selected in accordance with a type and a size of a motor and individually evaluated, and then it is necessary to mount these parts on a single circuit substrate. Thus, as uses of the motor increase, the number of types of necessary electronic parts increases, and an issue occurs that costs in development and manufacturing of a motor drive circuit device may increase. There is not much difference in situations even when the semiconductor integrated circuit chip disclosed in Japanese Unexamined Patent Application Publication No. 2010-187435 is used.
Embodiments of a system in package and a motor drive circuit device in the present disclosure can solve the above-mentioned issue.
An exemplified system in package in the present disclosure is used by being connected to an inverter output circuit that includes plural pairs each including a high-side transistor and a low-side transistor connected in series and generates motor drive voltages of a plurality of phases each of which is generated from a connection node between the high-side transistor and the low-side transistor in a corresponding pair. The system in package according to an embodiment includes a support including a plurality of terminal electrodes, an analog circuit chip that is electrically connected to a first terminal electrode group included in the plurality of terminal electrodes and includes a plurality of gate driver circuits that output gate drive signals for controlling respective switching operations of the high-side transistors and the low-side transistors to any one of the terminal electrodes of the first terminal electrode group, and a computer chip that is electrically connected to a second terminal electrode group included in the plurality of terminal electrodes and the analog circuit chip and includes a memory in which a motor control program is stored. It is possible to switch between a first mode in which a potential variation range of the gate drive signal for controlling the switching operation of the high-side transistor is set to be identical to a potential variation range of the gate drive signal for controlling the switching operation of the low-side transistor irrespective of a potential of the connection node of the inverter output circuit and a second mode in which the potential variation range of the gate drive signal for controlling the switching operation of the high-side transistor is changed in accordance with the potential of the connection node of the inverter output circuit.
With the system in package according to the embodiment of the present disclosure, various types of motor control can be realized by one system in package by changing the program stored in the memory. In addition, since the operation can be performed by switching between the two different modes, when necessary, another gate driver circuit having a higher breakdown voltage selected in accordance with an output of a motor, instead of the gate driver circuit included in the analog circuit chip, can also be operated by being connected between the system in package and the motor. According to the present disclosure, since highly versatile usage can be realized by one system in package, it is possible to realize reduction in manufacturing costs due to expansion of a mass production scale.
The above and other elements, features, steps, characteristics and advantages of the present invention will become more apparent from the following detailed description of the preferred embodiments with reference to the attached drawings.
In recent years, Intelligent Power Module (IPM) in which the power transistor unit 30 and a gate drive circuit are mounted in one casing is used in some cases.
In this manner, a large number of electronic parts are used, and in addition, various types of products exist in accordance with sizes of voltage and current to be used and other characteristics even for electronic parts of the same type. A motor drive circuit device constituted by appropriately combining these electronic parts receives external instructions including a rotating direction instruction and a speed instruction and outputs a motor drive voltage in conformity to these external instructions. Such external instructions are issued from a higher-order host computer or the like.
A system in package (hereinafter abbreviated as “SiP”) in the present disclosure is a packaged part of a semiconductor integrated circuit element to be used by being connected to an inverter output circuit that drives a motor. In general, the SiP is an electronic part in which a plurality of semiconductor integrated circuit chips is installed in one package and sealed by resin (plastic).
The SiP in the present disclosure includes a computer chip including a memory in which a motor control program is stored and an analog circuit chip, and these chips are mounted in the same package. In the present specification, the computer chip means a monolithic electronic element in which a semiconductor integrated circuit that executes digital signal processing is formed on a semiconductor substrate. The analog circuit chip means a monolithic electronic element in which an analog circuit is formed on a semiconductor substrate. The analog circuit chip in the SiP in the present disclosure generates a signal for directly or indirectly driving a switching element (transistor) of the inverter output circuit. According to the SiP, it is possible to cope with control on various motors of different types by changing the program stored in the memory of the computer chip and the setting of an external constant. Therefore, according to the embodiment of the present disclosure, the number of types and the number of development processes of the necessary electronic parts can be reduced as a whole, and it becomes possible to provide motor drive circuit devices of various types corresponding to various needs at low manufacturing costs.
The program stored in the memory is not limited to a program for vector control and may be any motor control program based on, for example, Open-Loop, PWM (Pulse Width Modulation) drive, PLL (Phase Locked Loop) speed control, sine-wave drive, sensor-less drive, or stepping drive.
When control software becomes further complicated and the amount of memory is not sufficient with a memory circuit alone in the computer chip in the future, a type of product in which a memory chip is mounted in the SiP may also be prepared.
Hereinafter, an embodiment of the present disclosure will be described in detail with reference to the drawings appropriately. It should be noted that detailed descriptions beyond necessity may be omitted in some cases. For example, detailed descriptions of an already well-known item and duplicated descriptions with respect to substantially the same configuration may be omitted in some cases. This is because a situation where the following explanations become unnecessary redundant is avoided to facilitate understanding of those skilled in the art.
The SiP 100 illustrated in the drawing includes an analog circuit chip 40 and a computer chip 60. The SiP 100 is used by being connected to the inverter output circuit 300 that drives the motor 200. As will be described below, another circuit element or circuit may be connected between the SiP 100 and the inverter output circuit 300.
The motor 200 according to the present embodiment includes a plurality of coils through which three-phase alternating currents flow. The motor 200 is typically a synchronous motor of a permanent-magnet type but may also be a motor of another type. According to the embodiment of the present disclosure, a type, a structure, and a size of the motor 200 that may be used are not particularly limited. It is sufficient when the inverter output circuit 300 has a known configuration selected in accordance with the motor 200. The motor module according to the embodiment of the present disclosure may also include other circuit elements which are not illustrated in the drawing. The SiP 100, the inverter output circuit 300, and other circuits (not illustrated) are used by being mounted to a substrate such as, for example, a printed-circuit board.
A power source voltage VS is supplied to each of drains of the high-side transistors HTU, HTV, and HTW. On the other hand, sources of the low-side transistors LTU, LTV, and LTW are grounded. Sources of the high-side transistors HTU, HTV, and HTW are respectively connected to drains of the low-side transistors LTU, LTV, and LTW via the nodes NU, NV, and NW. In the example disclosed in the present specification, any of the power transistors is constituted by an N-type transistor, but an N-type transistor and a P-type transistor may be combined and used.
A conductive or non-conductive state of each power transistor changes in response to a gate drive signal for controlling a switching operation of the inverter output circuit 300. As a result, the motor drive voltages of the three phases of U, V, and V respectively swing between the power source voltage VS and an earth voltage (0 V) in different phases. For example, when the high-side transistor HTU turns on and the low-side transistor LTU turns off in the U-phase output portion, a potential of the node NU approximately indicates a size of the power source voltage VS. When the high-side transistor HTU turns off and the low-side transistor LTU turns on, the potential of the node NU approximately indicates a size of a ground level (0 V). The same also applies to the V-phase and W-phase output portions. When gate drive signals having appropriate waveforms are supplied to respective gate terminals of the high-side transistors HTU, HTV, and HTW and the low-side transistors LTU, LTV, and LTW, it becomes possible to control the motor 200 by supplying three-phase sine-wave current having the appropriate waveforms to the motor 200.
The power source voltage VS supplied to the inverter output circuit 300 is set at a level at which a current necessary for the motor drive flows through the motor. Thus, a size of the power source voltage VS largely varies in accordance with the type and the use of the motor. A breakdown voltage of the transistors constituting the inverter output circuit 300 is set in accordance with the size of the power source voltage VS. For example, when the high-side transistor HTU turns on and the low-side transistor LTU turns off, a voltage of a size close to the power source voltage VS is applied between the source and the drain of the low-side transistor LTU. Accordingly, the inverter output circuit 300 needs to be constituted by using power transistors having a breakdown voltage sufficiently higher than the power source voltage VS. When the breakdown voltage of the power transistor is low, a leak current of the power transistor may increase. A waveform of a motor drive voltage may become abnormal, and the transistor may be damaged.
Gate driver circuits are used to control switching operations of the high-side transistors HTU, HTV, and HTW and the low-side transistors LTU, LTV, and LTW. As will be described below, the gate driver circuits are integrated on the analog circuit chip 40 in the SiP 100.
A reference will be made to
The SiP 100 includes a support 120 for installing the analog circuit chip 40 and the computer chip 60. An example of the support 120 may be a ceramic substrate or a metal base substrate. The support 120 includes a plurality of terminal electrodes 110. The analog circuit chip 40 and the computer chip 60 are fixed to the support 120 and are connected to predetermined terminal electrodes 110 inside the SiP 100. Electric connections between the terminal electrodes 110 and the respective chips 40 and 60 and an electric connection between the analog circuit chip 40 and the computer chip 60 are performed by a metal wire inside the SiP 100 such as, for example, an interconnecting line. According to the embodiment, an entirety of the interconnecting line and the chips 40 and 60 may be molded together with the support 120 by plastic.
According to the present specification, for convenience, terminals to which the analog circuit chip 40 is connected among the plurality of terminal electrodes 110 will be referred to as a “first terminal electrode group 110A”. Similarly, terminals to which the computer chip 60 is connected among the plurality of terminal electrode 110 will be referred to as a “second terminal electrode group 110B” (see
A configuration of the package and the terminals is not limited to the example illustrated in the drawing. For example, various modes such as a QFP (Quad Flat Package) type, a QFN (Quad Flat No-Lead package) type, and a BGA (Ball Grid Array) type may be adopted.
Next, a reference will be made to
In the example illustrated in
In the example in
Exemplary configurations of the gate driver circuits 41, 42, and 43 will be described with reference to
The gate driver circuit 41 for the U phase includes a gate driver HGU that outputs a gate drive signal supplied to a gate of the high-side transistor HTU and a gate driver LGU that outputs a gate drive signal supplied to a gate of the low-side transistor LTU. The gate driver circuit 42 for the V phase includes a gate driver HGV that outputs a gate drive signal supplied to a gate of the high-side transistor HTV and a gate driver LGV that outputs a gate drive signal supplied to a gate of the low-side transistor LTV. The gate driver circuit 43 for the W phase includes a gate driver HGW that outputs a gate drive signal supplied to a gate of the high-side transistor HTW and a gate driver LGW that outputs a gate drive signal supplied to a gate of the low-side transistor LTW. Hereinafter, in the present specification, the gate drivers HGU, HGV, and HGW may be referred to as “high-side gate drivers”, and the gate drivers LGU, LGV, and LGW may be referred to as “low-side gate drivers” in some cases.
Exemplary internal configurations of the gate driver circuits 41, 42, and 43 will be described below. The outputs of the gate driver circuits 41, 42, and 43 change on the basis of the signals supplied from the gate drive control logic circuit 44 to the gate driver circuits 41, 42, and 43.
A reference will be made to
The high-side gate power source 45 supplies the gate driver circuits 41, 42, and 43 with power source voltages necessary for the gate driver circuits 41, 42, and 43 to output the gate drive signals at appropriate levels in both a first mode and a second mode. The voltage regulator 46 receives the external power source and generates the power source voltage at 12 V, for example. The DC-DC converter 47 steps down the direct current voltage at 12 V obtained from the power source voltage VS to 5 V or 3.3 V, for example. The thus stepped-down voltage is supplied to a circuit portion that operates at a low voltage in the analog circuit chip 40 and the computer chip 60 according to the present embodiment. The Hall logic circuit 48 synthesizes the waveforms for the three phases (U, V, W) amplified by using the operational amplifiers and passes the synthesized waveform over to the computer chip 60. It should be noted that the gate drive control logic circuit 44 operates in accordance with a control signal output by the computer chip 60 and controls the gate driver circuits 41, 42, and 43.
Next, generation of the gate drive signal will be described in more detail with reference to
As illustrated in
The high-side transistor HTU and the low-side transistor LTU of the U-phase output portion 31 in the inverter output circuit 300 are typically power transistors having the same gate threshold voltage. However, while the source of the low-side transistor LTU is grounded, the source of the high-side transistor HTU is connected to the node NU indicating the motor drive voltage. As described above, the motor drive voltage rises and drops between the power source voltage VS of the inverter output circuit 300 and the earth voltage. Accordingly, to turn on the high-side transistor HTU and maintain its conductive state, a potential of the gate drive signal needs to exceed a gate threshold value while the potential of the node NU is set as a reference. Thus, the high-side gate power source 45A has a circuit configuration in which a potential sufficiently higher than the potential of the node NU is generated while the potential of the node NU is set as the reference.
According to an embodiment, the low-side gate power source 45B can supply the potential at, for example, 12 V to the gate driver LGU and the high-side gate power source 45A can supply the potential higher by 12 V than the potential of the node NU to the gate driver HGU. That is, when the potential of the node NU is 50 V, for example, the high-side gate power source 45A can supply the potential (62 V) higher by 12 V than the potential of the node NU to the gate driver HGU. As a result, the gate drive signal output from the gate driver HGU in this example shifts between 50 V (when turned off) and 62 V (when turned on).
The gate drivers HGV and LGV for the V phase and the gate drivers HGW and LGW for the W phase also have similar configurations. With regard to the high-side gate power source 45A and the low-side gate power source 45B, a single circuit may be shared by all the U, V, and W phases, or separate circuits may be prepared for the individual phases. The motor drive voltages for the respective U, V, and W phases, that is, the potentials of the nodes NU, NV, and NW may fluctuate at mutually different times. The different high-side gate power sources 45A are respectively connected to the gate driver circuits 41, 42, and 43 according to the present embodiment, and the potentials of the nodes NU, NV, and NW are fed back to the corresponding high-side gate power sources 45A.
It should be noted that the high breakdown voltage diode 51 may be an external element to be connected to a terminal of the SiP 100 from the outside similarly to the capacitance 50. The high breakdown voltage diode 51 according to the present embodiment is formed inside the analog circuit chip 40.
Next, a reference will be made to
In the example illustrated in
In this manner, the high-side gate power source 45C functions as a first power source connected to the high-side gate driver in a mode (first mode) in which a signal having the voltage without depending on potential changes of the connection nodes NU, NV, and NW is output. On the other hand, the high-side gate power source 45A illustrated in
In the motor drive circuit device 400 in
The SiP 100 according to the embodiment of the present disclosure operates in respectively different modes in accordance with a connection to either one of the power module 300A and the power module 300B. That is, the SiP 100 has the structure in which the first mode and the second mode can be switched. The above-mentioned mode switching is not changed depending on a manner of the connection of the external capacitance or the like, for example, but can also be realized when a switch circuit that switches between the first mode and the second mode is provided inside the SiP 100 (for example, the analog circuit chip 40). The first mode is a mode in which a potential variation range of the gate drive signal for controlling the switching operation of the high-side transistor is, irrespective of the potential of the connection node of the inverter output circuit 300, set to be the same as a potential variation range of the gate drive signal for controlling the switching operation of the low-side transistor. The second mode is a mode in which the potential variation range of the gate drive signal for controlling the switching operation of the high-side transistor is changed in accordance with the potential of the connection node of the inverter output circuit 300. According to this, the power transistor of the inverter output circuit 300 can also be driven by using the gate driver circuit included in the analog circuit chip, and in addition, it becomes possible to adopt another gate driver circuit of a higher breakdown voltage in accordance with the motor output without being restricted to the gate driver circuit included in the analog circuit chip.
In general, in a case where the motor output is large, a breakdown voltage may be insufficient with the gate driver circuit in the SiP 100. According to the embodiment of the present disclosure, since another gate driver circuit having a high breakdown voltage can be used, high versatility can be realized.
It should be noted that, even in a case where the power module 300A that does not have the gate driver circuit incorporated therein is used, the power module 300B may be driven by using the gate driver circuit other than the gate driver circuit in the SiP 100.
According to the embodiment of the present disclosure, a single SiP 100 can be used in a mode illustrated in
In this manner, the SiP 100 according to the embodiment of the present disclosure has the structure in which the operations can be switched between the first mode and second mode which are different from each other. More specifically, as illustrated in
The high-side gate power source 45 is not limited to one having the configurations illustrated in
In this manner, the SiP according to the embodiment of the present disclosure can switch between the first mode in which the potential variation range of the gate drive signal for controlling the switching operation of the high-side transistor in the inverter output circuit 300 is set as the same range as the potential variation range of the gate drive signal for controlling the switching operation of the low-side transistor and the second mode in which the potential variation range of the gate drive signal for controlling the switching operation of the high-side transistor changes in accordance with the potentials of the connection nodes NU, NV, and NW of the inverter output circuit 300.
In the first mode, the high-side gate driver and the low-side gate driver may operate by being connected to the same power source (first power source). However, in the second mode, a circuit such as the bootstrap circuit or the charge pump circuit functions as the power source and supplies the necessary voltage to the high-side gate driver. As a result, the high-side gate driver in the second mode can receive the potential obtained by adding the voltage necessary for the switching to the potentials of the connection nodes NU, NV, and NW and operate.
The above-mentioned mode switching can be realized without changing the circuit configuration in the SiP 100. In the example described above, the mode can be switched on the basis of whether or not the bootstrap circuit is realized by the connection of the external capacitance. In a case where at least part of the charge pump circuit (for example, the oscillating circuit and the switching circuit) is integrated in the analog circuit chip, it is sufficient when a terminal for controlling whether or not the oscillating circuit is enabled (effective) is provided, for example.
As described above, according to the embodiment of the present disclosure, in a case where the motor for a special use (high breakdown voltage and high output) is used, even when an external IPM becomes necessary, the connection to the IPM can be performed by adjusting the output of the gate driver circuit in the SiP 100.
When the SiP according to the embodiment of the present disclosure is used, it becomes possible to reduce the size of the mounting substrate, realize simplification of the circuit configuration, and improve design efficiency. With regard to differences in motor control techniques based on various requests, it becomes possible to cope with such differences by changing program, for example. Thus, improvement in performance and cost reduction are anticipated. In addition, the respective electronic parts need to be connected by copper foil wires of a substrate pattern in the configuration according to the related art, but according to the present embodiment, such wires become unnecessary. That is, since it is possible to reduce the wires to the necessary minimum, a wiring length is shortened. As a result, improvement in noise resistance performance is also anticipated. Furthermore, reliability may be improved by functions of detecting temperature, voltage, and current intrinsically included in a high performance microcomputer which may be used as a computer chip.
Since reduction in manufacturing costs are realized according to the SiP in the present disclosure, it also becomes possible to achieve improvement in quietness by applying the vector control also to the electric equipment that could not execute the advanced vector control from the viewpoint of costs. For example, a motor for small-sized equipment such as a dryer is caused to smoothly rotate, and thereby it becomes possible to reduce the sound at the time of the operation.
The embodiment of the present disclosure may be widely used for various types of equipment including various motors such as a vacuum cleaner, a dryer, a ceiling fan, a washing machine, and a refrigerator.
While preferred embodiments of the present invention have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without departing from the scope and spirit of the present invention. The scope of the present invention, therefore, is to be determined solely by the following claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2015-224653 | Nov 2015 | JP | national |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2016/080032 | 10/7/2016 | WO | 00 |
