Claims
- 1. A system resource router, comprising:at least two channel sockets that provides for protocol-based connections to external data-transfer initiators; at least two internal M-channel buses; one or more M-channel controllers, wherein each said M-channel controllers connects one of a plurality of external M-channel busses to a corresponding one of the internal M-channel buses; and one or more transfer switches, wherein each said transfer switch provides alternative connections of at least one of the channel sockets to at least two of the internal M-channel buses; wherein, a plurality of processors and other initiators respectively connected to the channel sockets can be routed with the transfer switch to operate in parallel with a plurality of peripherals and memory respectively populating said external M-channel buses; and wherein the variety of numbers of interconnected ones of said channel sockets, said internal M-channel buses, said M-channel controllers, and said transfer switches are determined using a computer-aided design (CAD) program means.
- 2. The system resource router of claim 1, further including:a graphical user interface (GUI) included in the computer-aided design program means that collects basic information about a design application and then automatically chooses how many channel sockets, internal M-channel buses, M-channel controllers, and transfer switches to include in a final design.
- 3. The system resource router of claim 1, further including:an intellectual property (IP) hardware description language (HDL) file that is output by the computer-aided design program and implements the channel sockets, the internal M-channel buses, the M-channel controllers, and the transfer switches as high-level synthesis (HLS) computer files for later simulation, placement, and routing in a single-chip system-on-chip implementation.
- 4. The system resource router of claim 3 wherein the IP-HDL file is such that any such implementation of the channel sockets allows after-the-fact changes in said interface protocols.
CROSS REFERENCE TO RELATED APPLICATIONS
This application claims the benefits of the earlier filed U.S. Provisional Application Serial No. 60/182,406, filed Feb. 14, 2000 (01.20.2000), which is incorporated by reference for all purposes into this specification.
US Referenced Citations (15)
Provisional Applications (1)
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Number |
Date |
Country |
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60/182406 |
Feb 2000 |
US |