The present application is directed generally towards communication systems, and more specifically towards creating a downlink precode filter for communication systems with per-antenna power constraints.
In a Multiple Input Multiple Output (MIMO) communication system, optimal capacity is typically achieved using the well known ‘Water-filling’ solution. This practice achieves optimal channel capacity by distributing total available transmit power to transmit antennas according to the Water-filling solution. Usually, this results in unequal power distribution among different transmit antennas and doesn't guarantee that allocated power is within the linear range of the power amplifier associated with the transmit antenna.
A typical MIMO communication system involves multiple antennas, say N, at the transmitter and multiple antennas, say M, at the receiver. Such a system can be used to transmit a maximum of L independent streams where L is a positive integer such that 1≦L≦min(M,N). Each transmitted stream is referred to as a ‘Layer’ and corresponds to a symbol element in input symbol vector x. The input vector x is processed using a precoder filter W and the output is matched to different transmit antennas for RF transmission as shown in
Input symbol,
Precoder matrix,
where wk=[wk1 . . . wkL].
Transmit vector,
Transmit symbol at kth antenna,
yk=wkX (4)
A conventional water-filling based precoder is designed in the following manner:
The transmit power allocated to the kth antenna is represented by the kth diagonal entry of the matrix WWH. Usually, such a construction of W results in unequal power allocations to different transmission antennas as shown in
In the recent past, there has been some work related to more practical precoder design where each antenna has power constraint P as shown in
Given the foregoing background, there is a need for new methods and systems that substantially obviate the aforementioned problems associated with known conventional techniques for communication systems. Specifically, there is a need to ensure equal power distribution among different transmit antennas and guarantee that allocated power is within the linear range of the power amplifier associated with the transmit antenna.
The inventive methodology is directed to methods and systems that substantially obviate one or more of the above and other problems associated with the known conventional techniques for communication systems.
Aspects of the present invention include a method which may involve applying a precode filter to at least one antenna in a transmitter, wherein the precode filter is represented by the equation
In the equation, P represents power allocation; L represents a number of transmission layers; VL-phase represents a matrix where the (i,j)th element of VL-phase is equivalent to the phase of (i,j)th complex element in VL, wherein VL is based on a right singular matrix derived from channel matrix H. Channel matrix H is a matrix representing channel gain between at least one antenna at the transmitter and at least one antenna at a receiver.
Aspects of the present invention further include a transmitter which may include at least one antenna and a precode filter applied to the least one antenna, wherein the precode filter is represented by the equation
Aspects of the present invention further include a receiver, which may include at least one antenna transmitting information to a transmitter for constructing a precode filter, wherein the precode filter is represented by the equation
Additional aspects related to the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Aspects of the invention may be realized and attained by means of the elements and combinations of various elements and aspects particularly pointed out in the following detailed description and the appended claims.
It is to be understood that both the foregoing and the following descriptions are exemplary and explanatory only and are not intended to limit the claimed invention or application thereof in any manner whatsoever.
The present invention improves on the Water-Filling Solution by providing close to optimal capacity (similar to the water-filling solution) while requiring power amplifiers associated with transmit antennas to operate at a fixed power level.
The accompanying drawings, which are incorporated in and constitute a part of this specification exemplify the embodiments of the present invention and, together with the description, serve to explain and illustrate principles of the inventive technique. Specifically:
In the following detailed description of exemplary embodiments, reference will be made to the accompanying drawings, in which identical functional elements are designated with like numerals. The aforementioned accompanying drawings show by way of illustration, and not by way of limitation, specific embodiments and implementations consistent with principles of the present invention. These implementations are described in sufficient detail to enable those skilled in the art to practice the invention and it is to be understood that other implementations may be utilized and that structural changes and/or substitutions of various elements may be made without departing from the scope and spirit of present invention. The following detailed description is, therefore, not to be construed in a limited sense. Additionally, the various embodiments of the invention as described may be implemented in the form of a software running on a general purpose computer, in the form of a specialized hardware, or combination of software and hardware.
Embodiments of the invention are based on SVD decomposition of the channel matrix. The right singular matrix that results from SVD decomposition is used as a precoder filter and power is allocated based on the strength of singular modes (i.e. singular values of the channel matrix).
Embodiments of the invention provide an alternative design for the conventional MIMO precoder, which allocates equal power to all the transmit antennas. Such embodiments result in insignificant loss in capacity while meeting the practical requirements related to the linearity of power amplifiers.
In contrast to conventional schemes which utilize the right singular matrix (V) and ‘Water-filling’ to design the downlink precoder (W), some embodiments of the invention utilize the phases of the entries in the right singular matrix (V) to design W, as described below and as shown in the several steps of the flowchart illustrated in
Step 501: Estimate the downlink channel matrix H.
Step 502: Perform the SVD decomposition of the channel matrix H to obtain right singular matrix V.
Step 503: For L layer transmission, choose L column vectors of V that correspond to largest singular values of channel matrix H. Let this matrix be denoted by VL=[v1 v2 . . . vL], where vk denotes the kth column vector of matrix V.
Step 504: Construct a matrix VL-phase of the same size as VL where (i,j)th element of VL-phase denotes the phase of the (i,j)th complex element in VL.
Step 505: Construct precoder filter as W=sqrt(P/L)*VL-phase, where sqrt(.) denotes the square root of its argument and P is the maximum power allowed at each transmit antenna. If the MIMO transmitter has a total available power PT, then P=PT/N.
In the following description, the term “Layer” refers to number of independent data steams transmitted by the MIMO transmitter or by the transmitter in a communication system.
System Configuration
In this section, key ideas involved in embodiments of the invention and the system utilized by embodiments of the invention are described herein. Two algorithms are proposed that outline the steps required to design a MIMO Downlink Precoder which meets the power constraint for each antenna (Per-Antenna power constraint).
Initialization Procedure—An initialization procedure can be utilized for constructing the representative channel gain matrix to be used for the construction of the precode filter.
Channel Estimation at Receiver: The channel gain matrix H has N columns and M rows. The (i,j)th element of H represents the complex channel gain between the jth transmitter antenna and ith receiver antenna. These complex gains can be computed at the receiver by means of Pilots. To estimate the channel between the kth transmit antenna and all receive antennas, the kth transmit antenna sends out a Pilot symbol which is pre-known at all receive antennas. This enables the receiver to compute the complex channel gain between the kth transmit antenna. This procedure is repeated for all transmit antennas in a sequential manner (i.e. 1 transmission per time slot).
Channel Feedback to Transmitter: There are several ways in which a transmitter can obtain the channel gain matrix for constructing the precode filter.
The receiver sends the full channel matrix H to the transmitter using a feedback path. Subsequently, the receiver does some processing on the channel matrix H and sends the resultant matrix Heff to the transmitter using the feedback path. Then, the receiver does some processing on the channel matrix H and sends channel specific information in few bits utilizing codebooks.
In a Time-Division (TD) system, the transmitter can determine the channel gain matrix by using channel reciprocity.
Two methods for constructing the precode filter are presented. The two methods have varying complexity. The first method is based on SVD decomposition of the channel matrix H and gives the best performance. The second method does not require SVD decomposition and as a result experiences some performance loss.
The following steps list the key idea of the SVD-based method to design the Downlink precoder W:
where |.| denotes the absolute value of its argument.
where P is the maximum power allowed at each transmit antenna. If the MIMO transmitter has a total available power PT, then P=PT/N.
The steps (a)-(d) can be executed partially or fully at either the transmitter or the receiver.
Step 601: Receiver estimates downlink channel matrix H.
Step 602: Receiver performs the SVD decomposition of the channel matrix H as: H=USVH
Step 603: Receiver sends right singular matrix V to the Transmitter either explicitly or via codebook methods. It may either send full matrix V or a subset VL consisting of L column vectors corresponding to largest singular values of H. Let this matrix be denoted by VL=[v1 v2 . . . vL], where vk denotes the kth column vector of matrix V.
Alternatively, for an L layer transmission, Transmitter may also choose L column vectors of V that correspond to largest singular values of channel matrix H.
Step 604: Transmitter constructs a matrix VL-phase of the same size as VL where (i,j)th element of VL-phase denotes the phase of the (i,j)th complex element in VL. That is, set (i,j)th entry of VL-phase as:
where |.| denotes the absolute value of its argument.
Step 605: Transmitter constructs downlink precoder filter as
The receiver may employ techniques other than SVD decomposition to compute right singular matrix V.
Step 701: Receiver estimates downlink channel matrix H.
Step 702: Receiver performs the SVD decomposition of the channel matrix H as: H=USVH
Step 703: Receiver obtains processed channel matrix
Step 704: For L layer transmission, Receiver chooses L rows of
where
Step 705: Receiver construct a matrix VL-phase whose (i,j)th element denotes the negative phase of the (j,i)th complex element in
Step 706: Receiver sends matrix VL-phase to the Transmitter either explicitly or via codebook method represented by few bits.
Step 707: Transmitter constructs downlink precoder as
Step 801: Estimate downlink channel matrix H.
Step 802: For L layer transmission, chooses L rows of
where h1 has the largest row-norm followed by h2 and so on.
Step 803: Construct a matrix VL-phase whose (i,j)th element represents the negative phase of the (j,i)th complex element in HL defined as
Step 804: Construct downlink precoder as
Steps 801-804 can be executed in partial or full at the transmitter or the receiver.
Step 901: Receiver estimates downlink channel matrix H.
Step 902: For an L layer transmission, Receiver chooses L rows of
where h1 has the largest row-norm followed by h2 and so on.
Step 903: Receiver constructs a matrix VL-phase whose (i,j)th element represents the negative phase of the (j,i)th complex element in HL defined as
Step 904: Receiver sends matrix VL-phase to the Transmitter either explicitly or via codebook method represented by few bits.
Step 905: Transmitter constructs a downlink precoder as
Step 1001: Receiver sends the full channel matrix H to the Transmitter via feedback channel.
Step 1002: For L layer transmission, Transmitter chooses L rows of
where h1 has the largest row-norm followed by h2 and so on.
Step 1003: Transmitter constructs a matrix VL-phase whose (i,j)th element represents the negative phase of the (j,i)th complex element in HL defined as
Step 1004: Transmitter constructs a downlink precoder as
and as described with respect to
Furthermore, some portions of the detailed description are presented in terms of algorithms and symbolic representations of operations within a computer. These algorithmic descriptions and symbolic representations are the means used by those skilled in the data processing arts to most effectively convey the essence of their innovations to others skilled in the art. An algorithm is a series of defined steps leading to a desired end state or result. In the present invention, the steps carried out require physical manipulations of tangible quantities for achieving a tangible result.
Usually, though not necessarily, these quantities take the form of electrical or magnetic signals or instructions capable of being stored, transferred, combined, compared, and otherwise manipulated. It has proven convenient at times, principally for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, instructions, or the like. It should be borne in mind, however, that all of these and similar terms are to be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities.
Unless specifically stated otherwise, as apparent from the discussion, it is appreciated that throughout the description, discussions utilizing terms such as “processing,” “computing,” “calculating,” “determining,” “displaying,” or the like, can include the actions and processes of a computer system or other information processing device that manipulates and transforms data represented as physical (electronic) quantities within the computer system's registers and memories into other data similarly represented as physical quantities within the computer system's memories or registers or other information storage, transmission or display devices.
The present invention also relates to an apparatus for performing the operations herein. This apparatus may be specially constructed for the required purposes, or it may include one or more general-purpose computers selectively activated or reconfigured by one or more computer programs. Such computer programs may be stored in a computer-readable storage medium, such as, but not limited to optical disks, magnetic disks, read-only memories, random access memories, solid state devices and drives, or any other types of media suitable for storing electronic information. The algorithms and displays presented herein are not inherently related to any particular computer or other apparatus.
Various general-purpose systems may be used with programs and modules in accordance with the teachings herein, or it may prove convenient to construct a more specialized apparatus to perform desired method steps. In addition, the present invention is not described with reference to any particular programming language. It will be appreciated that a variety of programming languages may be used to implement the teachings of the invention as described herein. The instructions of the programming language(s) may be executed by one or more processing devices, e.g., central processing units (CPUs), processors, or controllers.
As is known in the art, the operations described above can be performed by hardware, software, or some combination of software and hardware. Various aspects of embodiments of the invention may be implemented using circuits and logic devices (hardware), while other aspects may be implemented using instructions stored on a machine-readable medium (software), which if executed by a processor, would cause the processor to perform a method to carry out embodiments of the invention. Furthermore, some embodiments of the invention may be performed solely in hardware, whereas other embodiments may be performed solely in software. Moreover, the various functions described can be performed in a single unit, or can be spread across a number of components in any number of ways. When performed by software, the methods may be executed by a processor, such as a general purpose computer, based on instructions stored on a computer-readable medium. If desired, the instructions can be stored on the medium in a compressed and/or encrypted format.
Moreover, other implementations of the invention will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. Various aspects and/or components of the described embodiments may be used singly or in any combination in a communication system. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims.
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