The technology described in this patent document relates generally to data processing and more particularly to priority control in data processing.
A memory system often includes semiconductor memory devices, such as dynamic random access memory (DRAM), synchronous DRAM (SDRAM), double data rate (DDR, DDR2, DDR3, etc.) SDRAM, etc. Various source devices, such as processors, peripheral devices (e.g., input/output devices), audio and video devices, may generate memory operation commands, including read memory operations to transfer data from memory devices to the source devices and write memory operations to transfer data from the source devices to the memory devices. Usually, a memory controller is implemented to receive the memory operation commands from the source devices and to control the memory devices to perform memory operations in response to the commands. The memory controller often includes command queues to capture the memory operation commands.
Priority parameters (e.g., Quality of Service (QoS) parameters) of the memory operation commands may be transmitted as parts of the commands to the memory controller. The memory controller may arbitrate among memory operation commands from different command queues and schedule execution of such commands based on their respective priority parameters.
In accordance with the teachings described herein, systems and methods are provided for dynamically managing a first-in/first-out (FIFO) command queue of a system controller. One or more commands are received into the command queue, a command being associated with a priority parameter. A current command first in line to be executed in the command queue is determined, the current command being associated with a first priority parameter. A second command associated with a second priority parameter is determined, the second priority parameter being largest among priority parameters associated with the one or more commands. A final priority parameter for the current command is computed based at least in part on the second priority parameter.
In another embodiment, an integrated circuit for dynamically managing a first-in/first-out (FIFO) command queue of a system controller includes, an interface circuit configured to receive one or more commands into the command queue, a command being associated with a priority parameter, a monitoring circuit configured to determine a current command first in line to be executed in the command queue, the current command being associated with a first priority parameter, and determine a second command associated with a second priority parameter, the second priority parameter being largest among priority parameters associated with the one or more commands, and a selection circuit configured to compute a final priority parameter for the current command based at least in part on the second priority parameter and output the final priority parameter in order for the current command to be selected for execution when the final priority parameter satisfies a predetermined condition.
In yet another embodiment, a system for dynamically managing a first-in/first-out (FIFO) command queue of a system controller includes one or more data processors, and a computer-readable memory encoded with programming instructions for commanding the one or more data processors to perform steps. The steps include, receiving one or more commands into the command queue, a command being associated with a priority parameter, determining a current command first in line to be executed in the command queue, the current command being associated with a first priority parameter, and determining a second command associated with a second priority parameter, the second priority parameter being largest among priority parameters associated with the one or more commands. The steps further include computing a final priority parameter for the current command based at least in part on the second priority parameter, and outputting the final priority parameter in order for the current command to be selected for execution when the final priority parameter satisfies a predetermined condition.
Referring back to
As an example, a Liquid Crystal Display (LCD) controller sends commands to read data from a memory. At first, a LCD buffer has enough data to be displayed, and the LCD controller sends read commands with low priority parameters (e.g., QoS) to a command queue associated with the LCD. The memory controller does not service these read commands in time because commands from other command queues may have higher priority parameters. Later when the buffer does not have enough data to be displayed, the LCD controller sends read commands with high priority parameters to the same command queue associated with the LCD. The previous read commands with low priority parameters are still in the command queue waiting for execution, and block the subsequent read commands with high priority parameters. Then, error may occur when the buffer has no data to be displayed.
A virtual channel approach or a multi-channel approach which often uses multiple physical command queues for a particular system interface port may ameliorate the problem, since commands with different priority parameters may be input into different command queues and the commands with high priority parameters may not be blocked by the commands with low priority parameters. However, the implementation of the virtual channel approach or the multi-channel approach is very expensive. In addition, such virtual channel approach or multi-channel approach will typically encounter a different problem.
Often, a source device needs to access a number of consecutive locations of the memory. For each location, the source device usually sends out a command. These commands from the source device share a same identification number. Usually, it is preferred to execute these commands in the order that they are sent out, so that the target locations of the memory can be accessed consecutively. A single FIFO command queue for a particular system interface port can often achieve this without any problem because the commands received first will be serviced first. However, under the virtual channel approach or the multi-channel approach, commands with the same identification number are often sent to different physical command queues. Additional mechanisms are usually needed to execute commands with the same identification number in order, which will increase the complexity and cost of the system.
The present disclosure presents an approach allowing commands in a command queue to be serviced in time according to the status of the command queue.
Specifically, an algorithm may be implemented to dynamically determine a highest priority parameter in the command queue 306. How long the command with the highest priority parameter has stayed in the command queue 306 may be taken into account to determine the dynamic priority parameter 304. As an example, a command 318 is determined to have a highest priority parameter 316 (“QoS_Max”) in the command queue 306. If the command 318 has stayed in the command queue 306 longer than a wait-time threshold, the dynamic priority parameter 304 is determined to be equal to the highest priority parameter 316 (“QoS_Max”). On the other hand, if the command 318 has stayed in the command queue 306 no longer than the wait-time threshold, the dynamic priority parameter 304 is determined to be equal to half of a sum of the highest priority parameter 316 (“QoS_Max”) and a current priority parameter 314 of a current command 308. Alternatively, in some circumstances, the dynamic priority parameter 304 is determined to be equal to the highest priority parameter 316 (“QoS_Max”) regardless of how long the command 318 has stayed in the command queue 306.
For example, the modified priority parameter 620 may be determined based on how long a command 618 with the highest priority parameter 616 has stayed in the command queue 606. If the command 618 has stayed in the command queue 606 longer than a first wait-time threshold, the modified priority parameter 620 is determined to be equal to the maximum priority parameter 616. On the other hand, if the command 618 has stayed in the command queue 606 no longer than the first wait-time threshold, the modified priority parameter 620 is determined to be equal to half of a sum of the maximum priority parameter 616 and the current priority parameter 614.
Further, how long the current command 608 has stayed in the command queue 606 may also be taken into account to determine the modified priority parameter 620. As an example, if the command 618 has stayed in the command queue 606 longer than the first wait-time threshold and the current command 608 has stayed in the command queue 606 longer than a second wait-time threshold, the modified priority parameter 620 is determined to be equal to a first value. If the command 618 has stayed in the command queue 606 no longer than the first wait-time threshold and the current command 608 has stayed in the command queue 606 longer than a second wait-time threshold, the modified priority parameter 620 is determined to be equal to a second value. If the command 618 has stayed in the command queue 606 longer than the first wait-time threshold and the current command 608 has stayed in the command queue 606 no longer than a second wait-time threshold, the modified priority parameter 620 is determined to be equal to a third value. In addition, if the command 618 has stayed in the command queue 606 no longer than the first wait-time threshold and the current command 608 has stayed in the command queue 606 no longer than a second wait-time threshold, the modified priority parameter 620 is determined to be equal to a fourth value. For example, the first value and the third value are equal to the maximum priority parameter 616, and the second value and the fourth value are equal to half of the sum of the maximum priority parameter 616 and the current priority parameter 614.
A two-dimensional array, QoS Info[Q_Size-1:0][Entry_Size-1:0], may be defined to store information of the above-noted data fields for generating dynamic priority parameters, where Q_Size indicates how many commands can be stored in the command queue 400, and Entry_Size represents a sum of sizes of a validity factor, a wait-time factor and an original priority parameter.
A maximum priority parameter of valid commands in the command queue 400 can be determined as follows:
A wait-time factor of a command having the maximum priority parameter is determined as follows:
WT_Max_QoS=QoS_Info[max_loc].WT
A wait-time factor of the current command is determined as follows:
WT_Cur=QoS_Info[rd_ptr].WT
For the first mode as discussed in
QoS′=QoS_Info[rd_ptr].QoS_org
For the second mode, the dynamic priority parameter is determined as follows:
QoS′=QoS_max
In addition, for the third mode, the dynamic priority parameter is determined based on the first wait-time threshold (“THR1”) and the second wait-time threshold (“THR2”) as follows:
This written description uses examples to disclose the invention, include the best mode, and also to enable a person skilled in the art to make and use the invention. The patentable scope of the invention may include other examples that occur to those skilled in the art. For example, the systems and methods described herein may be implemented for priority control in any system controller with a single-command-queue structure. As an example, the systems and methods described herein may be implemented for priority control in modules or components of a system-on-a-chip (SOC), such as SOC fabrics (bus interconnects), PCIe modules, and USB modules in the SOC.
For example, the systems and methods described herein may be implemented on many different types of processing devices by program code comprising program instructions that are executable by the device processing subsystem. Other implementations may also be used, however, such as firmware or appropriately designed hardware configured to carry out the methods and systems described herein. In another example, the systems and methods described herein may be implemented in an independent processing engine, as a co-processor, or as a hardware accelerator. In yet another example, the systems and methods described herein may be provided on many different types of computer-readable media including computer storage mechanisms (e.g., CD-ROM, diskette, RAM, flash memory, computer's hard drive, etc.) that contain instructions (e.g., software) for use in execution by a processor to perform the methods' operations and implement the systems described herein.
This is a continuation of U.S. application Ser. No. 14/861,168, filed Sep. 22, 2015, which is a continuation of U.S. application Ser. No. 13/750,053 (now U.S. Pat. No. 9,146,690), filed Jan. 25, 2013, which claims priority from US Provisional Application No. 61/591705, filed Jan. 27, 2012. The above applications are hereby incorporated herein by reference.
Number | Date | Country | |
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61591705 | Jan 2012 | US |
Number | Date | Country | |
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Parent | 14861168 | Sep 2015 | US |
Child | 15203108 | US | |
Parent | 13750053 | Jan 2013 | US |
Child | 14861168 | US |