The present invention relates to imaging devices and, more particularly, to high-dynamic-range imaging systems.
Image sensors are commonly used in electronic devices such as cellular telephones, cameras, and computers to capture images. In a typical arrangement, an electronic device is provided with an image sensor having an array of image pixels and a corresponding lens. Some electronic devices use arrays of image sensors and arrays of corresponding lenses.
In certain applications, it may be desirable to capture high-dynamic range images. While highlight and shadow detail may be lost using a conventional image sensor, highlight and shadow detail may be retained using image sensors with high-dynamic-range imaging capabilities.
Common high-dynamic-range (HDR) imaging systems use an interleaved exposure image capture method. In the interleaved exposure method, interleaved images are captured having rows of long-exposure image pixel values are interleaved with rows of short-exposure image pixel values. The short-exposure and long-exposure image pixel values are typically interpolated using edge-based interpolation in which pixel values are interpolated along a direction of maximum pixel correlation.
When generating HDR images using conventional edge-based interpolation methods, conventional imaging systems can misidentify edges in a captured image, which can result in undesirable artifacts in the final HDR image.
It would therefore be desirable to provide improved systems and methods for interleaved high-dynamic-range imaging.
Imaging systems are widely used in electronic devices such as digital cameras, computers, cellular telephones, and other electronic devices. These electronic devices may include image sensors that gather incoming light from a scene to capture an image. The image sensors may include at least one image pixel array. The pixels in the image pixel array may include photosensitive elements such as photodiodes that convert the incoming light into digital data. Image sensors may have any number of pixels (e.g., hundreds or thousands or more). A typical image sensor may, for example, have hundreds of thousands or millions of pixels (e.g., megapixels).
Processing circuitry 18 may include one or more integrated circuits (e.g., image processing circuits, microprocessors, storage devices such as random-access memory and non-volatile memory, etc.) and may be implemented using components that are separate from image sensor 16 and/or that form part of image sensor 16 (e.g., circuits that form part of an integrated circuit that controls or reads pixel signals from image pixels in an image pixel array on image sensor 16 or an integrated circuit within image sensor 16). Image data that has been captured by image sensor 16 may be processed and stored using processing circuitry 18. Processed image data may, if desired, be provided to external equipment (e.g., a computer or other device) using wired and/or wireless communications paths coupled to processing circuitry 18.
The dynamic range of an image may be defined as the luminance ratio of the brightest element in a given scene to the darkest element in the given scene. Typically, cameras and other imaging devices capture images having a dynamic range that is smaller than that of real-world scenes. High-dynamic-range (HDR) imaging systems are therefore often used to capture representative images of scenes that have regions with high contrast, such as scenes that have portions in bright sunlight and portions in dark shadows.
An image may be considered an HDR image if it has been generated using imaging processes or software processing designed to increase dynamic range. As an example, HDR images may be captured by a digital camera using an interleaved integration (or interleaved exposure (IE)) process. In an interleaved exposure process, interleaved images may be captured by an image sensor. The interleaved images may have rows of long-exposure image pixel values that are interleaved (or interspersed) with rows of short-exposure image pixel values.
Processing circuitry 18 may separate interleaved image 20 into a separated short-exposure image 22 and a separated long-exposure image 24. Separated short-exposure image 22 may, for example, include the rows of interleaved image 20 that were captured using short-exposure time T2 and rows 23 of empty pixel values (e.g., pixel values corresponding to rows for which long-exposure time T1 was used). Separated long-exposure image 24 may include the rows of interleaved image 20 that were captured using long-exposure time T1 and rows 25 of empty pixel values (e.g., pixel values corresponding to rows for which short-exposure time T2 was used).
Processing circuitry 18 may subsequently interpolate (deinterlace) and filter separated short-exposure image 22 to form interpolated short-exposure image 26 and may interpolate and filter separated long-exposure image 24 to form interpolated long-exposure image 28. Interpolated short-exposure image 26 may, for example, include interpolated values for pixels located in rows for which long-exposure pixel values were captured by image sensor 16 (e.g., interpolated values for pixels in rows 23 of separated short-exposure image 22 may be generated). Interpolated long-exposure image 28 may include interpolated values for pixels located in rows for which short-exposure pixel values were captured by image sensor 16 (e.g., interpolated values for pixels in rows 25 of separated long-exposure image 24 may be generated). Processing circuitry 18 may then combine interpolated images 26 and 28 to form high-dynamic-range image 30.
Each pair of pixel value rows captured with a particular one of exposure times T1 and T2 in interleaved image 20 may include a number of pixel values 34 arranged in repeating two pixel by two pixel unit cells 32. Image sensor pixels in image sensor 16 may be provided with a color filter array which allows a single image sensor to sample different colors of light and to generate pixel values corresponding to each sampled color of light. Each pixel value 34 in interleaved image 20 may, for example, correspond to a particular color of light. Each unit cell 32 in interleaved image 20 may include four pixel values each corresponding to a particular color of light (e.g., so that pixel values 34 are captured for the same colors in each unit cell 32 across interleaved image 20).
As an example, image sensor pixels in image sensor 16 may be provided with a color filter array that allows a single image sensor to sample red, green, and blue (RGB) light using corresponding red, green, and blue image sensor pixels arranged in a Bayer mosaic pattern. The Bayer mosaic pattern consists of a repeating unit cell 32 of two-by-two image pixels, with two green image pixels diagonally opposite one another and adjacent to a red image pixel diagonally opposite to a blue image pixel. In this way, image sensor pixels that are captured using the Bayer mosaic pattern may generate blue image signals in response to blue light, red image signals in response to red light, and green image signals in response to green light. Interleaved image 20 may be captured using a Bayer mosaic pattern so that blue, red, and green image pixel values are captured for each unit cell 32 of image pixels values 34 in interleaved image 20.
The example of
For example, mini-block 46 may include interpolated green pixel values G24 and G35, interpolated red pixel value R25, and interpolated blue pixel value B34 (e.g., mini-block 46 may be an interpolated unit cell 32 of pixel values 34). Interpolated pixel values G24, G35, R25, and B34 may, for example, be generated based on the captured pixel values from rows 48 and rows 52 of pixel values 34 in unit cells 32. Processing circuitry 18 may generate interpolated pixel values for multiple mini-blocks in mini-block row 50 for the associated separated image. For example, processing circuitry 18 may generate interpolated pixel values for mini-blocks in each row 23 of separated short-exposure image 22 and in each of row 25 of separated long-exposure image 24 (
At step 60, processing circuitry 18 may select a mini-block for interpolation. For example, processing circuitry 18 may select mini-block 46 of
At step 62, processing circuitry 18 may perform texture detection operations on selected mini-block 46 to determine whether the selected mini-block is within a texture area of the captured image (e.g., an area of the captured image having a relatively large number of edges of objects from the imaged scene). Processing circuitry 18 may determine whether mini-block 46 is within a texture area by applying a high-pass filter horizontally on green pixel values from the row of pixel values above mini-block 46 (e.g., by applying a high pass filter to green values G11, G13, G15, G17, and G19 from the unit cells 32 in pixel value rows 48 of
Processing circuitry 18 may determine the number of high-pass filtered green pixel values that exceed a predetermined threshold. If the number of high-pass filtered green pixel values that exceed the predetermined threshold is greater than a count threshold (e.g., a count threshold of three high-pass filtered green pixel values, etc.), processing circuitry 18 may identify mini-block 46 as being within a texture area. Processing may subsequently proceed to step 68 via path 66 of
At step 68, processing circuitry 18 may perform vertical interpolation operations for mini-block 46 (e.g., interpolation for mini-block 46 in a vertical direction as illustrated by arrow 42 of
G
24=(G04+G44)/2 (1)
R
25=(R05+R45)/2 (2)
B
34=(B14+B54)/2 (3)
G
35=(G15+G55)/2. (4)
Processing may subsequently proceed to step 80 to perform directional chroma filtering on mini-block 46.
If the number of high-pass filtered green pixel values that exceed the predetermined threshold is less than or equal to the count threshold, processing circuitry 18 may identify mini-block 46 as not being within a texture area. Processing may subsequently proceed to step 70 via path 64.
At step 70, processing circuitry 18 may perform directional pixel correlation operations on selected mini-block 46 to determine whether mini-block 46 is on a dominant edge (e.g., the edge of an imaged object in a scene) in the captured image. Directional pixel correlations for mini-block 46 may be determined based on the change in captured pixel values along different directions relative to mini-block 46.
As examples, processing circuitry 18 may determine directional pixel correlations for mini-block 46 along a vertical direction as illustrated by arrow 42 of
C
90=4*|G04−G44|+|G15−G55|+|G13−G53|+|R03−R43|+|R05−R45| (5)
C
45−2*|G15−G42★+2*|G13−G40|+2*|G17−G44|+|R07−R43|+|R05−R41| (6)
C
135=2*|G13−G46|+2*|G15−G48|+2*|G11−G44|+|R03−R47|+|R01−R45|. (7)
Processing circuitry 18 may compare the directional pixel correlation values and may label the directional pixel correlation value having the smallest magnitude as CMIN and may label the directional pixel correlation value having the second smallest magnitude as CSECOND
Processing circuitry 18 may compare the magnitude of CMIN
If mini-block 46 is within a dominant edge of the captured image, processing may proceed to step 68 via path 74 of
If mini-block 46 is not within a dominant edge of the captured image, processing may proceed to step 76 via path 72. At step 76, circuitry 18 may perform interpolation operations for mini-block 46 along multiple directions. For example, circuitry 18 may perform bi-directional interpolation for mini-block 46 (e.g., interpolation along two different directions relative to mini-block 46). For example, circuitry 18 may perform interpolation operations for mini-block 46 along the direction having the second smallest directional pixel correlation value and along the direction having the smallest directional pixel correlation value (e.g., circuitry 18 may compute interpolated pixel values for mini-block 46 by calculating a linear combination of captured pixel values along the directions associated with CMIN and CSECOND
where G24MIN, G35MIN, R25MIN, and B34MIN are pixel values for mini-block 46 interpolated along the direction of CMIN. For example, values G24MIN, G35MIN, R25MIN, and B34MIN may be calculated using equations 8-11, respectively (e.g., where G24MIN is substituted for G24 in equation 8, G35MIN is substituted for G35 in equation 9, etc.).
In some cases, interpolated pixel values G24, G35, R25, and B34 may include color artifacts that do not accurately reflect the imaged scene. If desired, processing circuitry 18 may perform filtering operations such as directional chroma filtering on interpolated pixel values G24, G35, R25, and B34 to reduce color artifacts (e.g., by applying a chroma filter to interpolated pixel values G24, G35, R25, and B34 in a particular direction).
At step 80, processing circuitry 18 may perform chroma filtering on the interpolated pixel values in mini-block 46 to reduce color artifacts in the interpolated pixel values. For example, processing circuitry 18 may perform directional chroma filtering for mini-block 46. Processing circuitry 18 may perform directional chroma filtering by applying a low-pass filter to the B-G and G-R pixel value domains around mini-block 46 to generate low-pass filter values (e.g., by applying a low-pass filter to difference values computed between blue and green pixel values and between green and red pixel values). Circuitry 18 may modify the interpolated pixel values using the low-pass filter values to generate chroma filtered interpolated pixel values for mini-block 46.
If the pixel values in mini-block 46 were interpolated along the vertical direction (e.g., if mini-block 46 was determined to be within a texture area while processing step 62 or if single-directional interpolation was performed along vertical direction 42 of
BG
LOW
PASS=(2*(B34−G24)+(B14−G04)+(B54−G44))/4. (16)
In equation 16, (B34−G24), (B14−G04), and (B54−G44) are difference values for blue and green pixels in the left column of
GR
LOW
PASS=(2*(G35−R25)+(G15−R05)+(G55−R45))/4. (17)
In equation 17, (G35−R25), (G15−R05), and (G55−R45) are difference values for red and green pixels in the right column of
Processing circuitry 18 may subsequently compare the difference between vertical filter value BGLOW
Processing circuitry 18 may compare the sum of vertical filter value BGLOW
Processing circuitry 18 may compare the difference between vertical filter value GRLOW
Processing circuitry 18 may compare the sum of vertical filter value GRLOW
If the interpolated pixel values of mini-block 46 were interpolated along a non-vertical direction (e.g., if bi-directional interpolation was performed or if single-directional interpolation was performed along direction 40 or direction 45 of
BG
LOW
PASS′−(2*(B34−G35)+(B14−G15)+(B54−G55))/4. (22)
Horizontal filter value GRLOW
GR
LOW
PASS′−(2*(G24−R25)+(G04−R05)+(G44−R45))/4. (23)
Processing circuitry 18 may subsequently compare the sum of horizontal filter value GRLOW
Processing circuitry 18 may compare the difference between horizontal filter value GRLOW
Processing circuitry 18 may compare the sum of horizontal filter value BGLOW
Processing circuitry 18 may compare the difference between horizontal filter value BGLOW
Processing circuitry 18 may use chroma-filtered interpolated pixel values G35′, B34′, R25′, and G24′ to generate interpolated and filtered images 26 and 28 of
Processing may subsequently loop back to step 60 to select an additional mini-block for interpolation and chroma-filtering (e.g., additional mini-blocks in row 50 of
The examples of
Processor system 300, which may be a digital still or video camera system, may include a lens such as lens 396 for focusing an image onto a pixel array such as pixel array 201 when shutter release button 397 is pressed. Processor system 300 may include a central processing unit such as central processing unit (CPU) 395. CPU 395 may be a microprocessor that controls camera functions and one or more image flow functions and communicates with one or more input/output (I/O) devices 391 over a bus such as bus 393. Imaging device 200 may also communicate with CPU 395 over bus 393. System 300 may include random access memory (RAM) 392 and removable memory 394. Removable memory 394 may include flash memory that communicates with CPU 395 over bus 393. Imaging device 200 may be combined with CPU 395, with or without memory storage, on a single integrated circuit or on a different chip. Although bus 393 is illustrated as a single bus, it may be one or more buses or bridges or other communication paths used to interconnect the system components.
Various embodiments have been described illustrating systems and methods for interpolating and filtering pixel values for generating HDR images of a scene using a camera module having an image sensor and processing circuitry.
The processing circuitry may interpolate color image data for an image captured by the image sensor. The captured image may include a first set of image pixels having captured pixel values and a second set of image pixels having empty (e.g., missing) pixel values. For example, the image sensor may capture an interleaved image having rows of long-exposure pixel values that are interleaved with rows of short-exposure pixel values. The processing circuitry may separate the interleaved image into a first image having rows of captured long-exposure pixel values and rows of empty pixel values and into a second image having rows of captured short-exposure pixel values and rows of empty pixel values.
The processing circuitry may determine whether the second set of image pixels (e.g., the empty image pixels in the first or second separated image) is within a texture area and on a dominant edge of the captured image. The processing circuitry may generate interpolated pixel values for the second set of image pixels and may apply a chroma filter to the interpolated pixel values to generate chroma-filtered interpolated pixel values.
In response to determining that the second set of image pixels is within the texture area of the captured image, the processing circuitry may apply the chroma filter to the interpolated pixel values in a vertical direction (e.g., by calculating difference values between image pixels above and below the second set of image pixels) and may perform vertical interpolation operations for the second set of image pixels (e.g., by computing a linear combination of captured pixel values from image pixels above and below the second set of image pixels).
The processing circuitry may generate directional pixel correlation values for the second set of image pixels in response to determining that the second set of image pixels is outside of the texture area (e.g., directional pixel correlation values that are a measure of the pixel value correlation in the captured image along a particular direction). The processing circuitry may perform interpolation operations for the second set of image pixels along multiple directions in response to determining that the second set of image pixels is not on the dominant edge and may perform interpolation operations along a single direction in response to determining that the second set of image pixels is on the dominant edge in the captured image.
The processing circuitry may generate a high-dynamic-range image using the interpolated pixel values and the captured pixel values. For example, the processing circuitry may generate an interpolated long-exposure image having interpolated long-exposure pixel values (e.g., for the first separated image) and an interpolated short-exposure image having interpolated short-exposure pixel values (e.g., for the second separated image). The processing circuitry may combine the interpolated long-exposure image and the interpolated short-exposure image to generate the high-dynamic-range image.
The image sensor and processing circuitry for interpolating pixel values for high-dynamic-range imaging may be implemented in a system that also includes a central processing unit, memory, input-output circuitry, and an imaging device that further includes a pixel array, a lens for focusing light onto the pixel array, and a data converting circuit.
The foregoing is merely illustrative of the principles of this invention and various modifications can be made by those skilled in the art without departing from the scope and spirit of the invention. The foregoing embodiments may be implemented individually or in any combination.
This application claims the benefit of provisional patent application No. 61/608,493, filed Mar. 8, 2012 which is hereby incorporated by reference herein in its entirety.
Number | Date | Country | |
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61608493 | Mar 2012 | US |