Claims
- 1. A method for locating a pointer in a memory comprising:searching for one of a plurality of memory locations having a value indicating an area of memory in which is located an available pointer; searching for one of a plurality of memory locations having a value indicating a row in the area of memory in which is located an available pointer; searching for one of a plurality of memory locations having a value indicating a memory location in the row of the area of memory in which is located the available pointer; accessing the available pointer; and setting the value of the memory location corresponding to the available pointer to a value indicating that the pointer is not available.
- 2. An article of manufacture, comprising:a machine accessible medium providing instructions that, when executed by a machine, cause the machine to: search for one of a plurality of memory locations having a value indicating an area of the memory in which is located an available pointer; search for one of a plurality of memory locations having a value indicating a row in the area of memory in which is located an available pointer; search for one of a plurality of memory locations having a value indicating a memory location in the row of the area of memory in which is located the available pointer; access the available pointer; and set the value of the memory location corresponding to the available pointer to a value indicating that the pointer is not available.
- 3. A method comprising:searching a first block of memory for an entry indicating an area of memory in which is located an available memory pointer; locating the entry in the first block of memory; searching a second block of memory, as determined by the entry located in the first block of memory, for an entry indicating a row in the area of memory in which is located an available memory pointer; locating the entry in the second block of memory; searching a third block of memory, as determined by the entry located in the second block of memory, for an entry indicating a location in the row in the area of memory in which is located an available memory pointer; locating the entry in the third block of memory; accessing the available memory pointer indicated in the entry in the third block; and setting the value of the entry in the third block to indicate that the memory pointer is unavailable.
- 4. A method comprising:allocating a memory location, corresponding to a pointer in a memory, in which to store a value indicating whether the pointer is available, for each pointer in the memory; allocating a memory location, corresponding to a row of memory comprising at least one of the memory locations corresponding to a pointer in a memory, in which to store a value indicating whether a pointer is available, for each such row; and allocating a memory location, corresponding to an area of a memory comprising at least one of the rows of memory locations, in which to store a value indicating whether a pointer is available, for each such area.
- 5. An article of manufacture, comprising:a machine accessible medium providing instructions, that when executed by a machine, cause the machine to: allocate a memory location, corresponding to a pointer in a memory, in which to store a value indicating whether the pointer is available, for each pointer in the memory; allocate a memory location, corresponding to a row of memory comprising at least one of the memory locations corresponding to a pointer in a memory, in which to store a value indicating whether a pointer is available, for each such row; and allocate a memory location, corresponding to an area of a memory comprising at least one of the rows of memory locations, in which to store a value indicating whether a pointer is available, for each such area.
CROSS-REFERENCES TO RELATED APPLICATIONS
This application claims priority from U.S. Provisional Patent Application Ser. No. 60/090,939, entitled “NETWORK ACCELERATOR SUBSYSTEM BASED ON SINGLE-CHIP NETWORK PROCESSOR AND INTERFACE PROTOCOL,” filed Jun. 27, 1998. This application is related to U.S. patent application Ser. No. 09/271,061, entitled “TWO-DIMENSIONAL QUEUING/DE-QUEUING METHODS AND SYSTEMS FOR IMPLEMENTING THE SAME,” filed Mar. 16, 1999.
US Referenced Citations (6)
Provisional Applications (1)
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Number |
Date |
Country |
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60/090939 |
Jun 1998 |
US |