1. Field of the Invention
The present disclosure relates to network testing and network troubleshooting, and more particularly, to improved systems and methods for improved network testing.
2. Description of the Related Art
In order for handheld network testing devices to properly satisfy network testing needs for faster and increasingly complex communication networks, additional processing power have become commonplace. For example, conventional network testing devices can include high speed electronics for testing at increasing network bandwidths (e.g., Gigabit/sec (Gbps)). However, such network testing devices have also become more complex and expensive.
Although such network devices have generally been considered satisfactory for their intended purpose, there is still a need in the art for less expensive network testing devices that still maintain adequate network testing functionality. The present invention provides a solution for these problems.
The purpose and advantages of the present invention will be set forth in and become apparent from this disclosure. Additional advantages of the invention will be realized and attained by the methods and systems particularly pointed out in the written description and claims hereof, as well as from the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied herein, the invention includes systems, methods and apparatuses for network testing. In particular, the subject invention includes an apparatus or network test device for network testing that receives data from a test network and validates, via a Media Access Controller (MAC), a link to the test network based on the received data. The network test device further throttles a rate of the received data from the test network to a lower rate in response to a first condition (e.g., the validated link), and processes the received data at the lower rate via a media access controller (MAC). In some embodiments, the network device receives the data at the lower rate and performs network testing at the lower rate. Such network testing can include, but is not limited to data packet testing such as Ping connectivity tests, Dynamic Host Configuration Protocol (DHCP) tests, and the like. In certain embodiments, the network test device can initially receive data from the test network from four twisted pair media connections (e.g., at a high data rate) in operable communication with the test network and, once a link is validated, the network test device can throttle the rate of the received data to the lower rate by receiving data from the test network via two of the four twisted pair media connections.
These and other features of the systems and methods of the subject invention will become more readily apparent to those skilled in the art from the following detailed description of the preferred embodiments taken in conjunction with the drawings.
So that those skilled in the art to which the subject invention appertains will readily understand how to make and use the devices and methods of the subject invention without undue experimentation, preferred embodiments thereof will be described in detail herein below with reference to certain figures, wherein:
The systems, techniques and processes described herein, provide for improved network test devices that throttle data rates for particular types of network testing so as to require less complex (and less expensive) electronic components. Such systems, techniques and processes achieve these and other needs by providing a network test device that validates a physical media and link partner at one data rate and, once validated, throttles the data rate to a lower data rate for subsequent network testing.
Reference will now be made to the drawings wherein like reference numerals identify similar structural features or aspects of the subject invention. For purposes of explanation and illustration, and not limitation, an exemplary embodiment of the network testing device in accordance with the invention is shown in
Referring to
Network 135 is to be understood to include a communication network that can include various network devices 140 (e.g., such as personal computers and workstations, or other devices, such as sensors, etc.) interconnected by communication links and segments for transporting data therebetween. Many types of networks are available, ranging from local area networks (LANs) to wide area networks (WANs). LANs typically connect the network devices over dedicated private communications links located in the same general physical location, such as a building or campus. WANs, on the other hand, typically connect geographically dispersed network devices over long-distance communications links, such as common carrier telephone lines, optical light paths, synchronous optical networks (SONET), synchronous digital hierarchy (SDH) links, or Powerline Communications (PLC) such as IEEE 61334, IEEE P1901.2, and others.
Still referring to
With reference now to
Further, processor module 405 includes an independent power supply 460. Note, independent power supply 260 of
The network interface(s) 215 contain the mechanical, electrical, and signaling circuitry for controlling operation of network test device 105, as well as communicating data to/from wireless local area network 135. As discussed above, such circuitry can include, for example, MAC 216 and PHY 217, and may be configured to transmit and/or receive data using a variety of different communication protocols.
Memory 440 comprises a plurality of storage locations that are addressable by the processor 420 and the network interfaces 215 for storing software programs and data structures associated with the embodiments described herein. Note that certain embodiments of processor module 405 may have limited memory or no memory (e.g., no memory for storage other than for programs/processes operating on the device and associated caches). The processor 420 may comprise hardware elements or hardware logic adapted to execute the software programs and manipulate the data structures 445. An operating system 442, portions of which are typically resident in memory 440 and executed by the processor, functionally organizes the device by, inter alia, invoking operations in support of software processes and/or services executing on the device. These software processes and/or services may comprise an illustrative network test process/services 444, as described herein. Note that while the process/services are shown in centralized memory 440, alternative embodiments provide for specific operation within the network interfaces 215.
It will be apparent to those skilled in the art that other processor and memory types, including various computer-readable media, may be used to store and execute program instructions pertaining to the techniques described herein. Also, while the description illustrates various processes, it is expressly contemplated that various processes may be embodied as modules configured to operate in accordance with the techniques herein (e.g., according to the functionality of a similar process). Further, while the processes have been shown separately, those skilled in the art will appreciate that processes may be routines or modules within other processes.
Network test process (services) 444 contains computer executable instructions executed by the processor 420 to perform network test functions provided by one or more communication and/or routing protocols, as will be understood by those skilled in the art, and as modified according to the techniques described herein. These functions may, for example, be capable of general packet detection/routing/forwarding, etc., according to the associated protocols and the techniques described herein, and using various routing/forwarding tables, lists, mappings, etc. (e.g., data structures 445).
In particular, network test process 444 can cause processor 420 (e.g., via network interfaces 210) to receive data communicated from test network 135 to network test device 105 (e.g., via network port 115). Network test process 444 can also cause processor 420 to validate, via PHY 217, a link to the test network based on the received data. Further, network test process 444 can cause processor 420 to throttle a rate of the received data from the test network to a lower rate in response to a first condition (e.g., the validated link), and process, via MAC 216 subsequently received data at the lower rate. Such processing can include, for example, performing data packet testing (e.g., Ping connectivity testing, Dynamic Host Configuration Protocol (DHCP) testing, etc.).
In some embodiments, processor 420 initially receives data and tests link connectivity at an approximate one (1) Gigabit/second (Gbps) rate via four twisted pair. As used herein, the approximate rate of 1 Gbps is defined according to known industry standards (e.g., IEEE 802.3-2008 standards). Once the link is validated, throttles or limits the rate of data to two of the four twisted pair for subsequent network testing. In this fashion, network test device 105 links, temporarily, at a higher rate to validate a link partner as well as to validate that the connection cable media can operate at the higher rate. Once validated, network test device 105 throttles back to a lower data rate (e.g., 100 Mb for network connectivity testing. In this fashion, network test device 105 can incorporate simpler and less costly circuitry (e.g., a 10/100 MAC). Further, by throttling data, network test device 105 operates at a lower, more efficient processing speed thereby reducing power consumption.
Although steps or elements of network test process 444 are discussed in relation to each other, such ordering is for purposes of explanation and not limitation. That is, such elements of network test process 344 can be performed in any order and independent of each other.
Once the network test device links and validates the link capability in step 520, the network test device throttles the rate of received data to a lower rate in step 525 (e.g., 100 megabits/second (Mbs)). In step 530, the network test device tests additional network conditions (e.g., via MAC 216) such as network connectivity (e.g., Ping, Dynamic Host Configuration Protocol (DHCP), etc.) at the lower rate (e.g., 100 Mbs). The procedure 500 subsequently may end in step 545, or, may restart at step 505.
It should be noted that certain steps within procedures 500 may be optional and further, the steps shown are merely examples for illustration, and certain other steps may be included or excluded as desired. Further, while a particular order of the steps is shown, this ordering is merely illustrative, and any suitable arrangement of the steps may be utilized without departing from the scope of the embodiments herein.
The systems, techniques and processes described herein, provide for improved network test devices that are less expensive to manufacture and include lower cost network interface circuitry than conventional network testing devices. Such systems, techniques and processes achieve these and other needs by providing a network test device that validates a gigabit link via a physical layer controller (PHY) and throttling data rates for subsequent network testing once link connectivity is achieved thereby supporting a less complex media access controller (MAC).
While there have been shown and described illustrative embodiments that provide for an improved network testing device, it is to be understood that various other adaptations and modifications may be made within the spirit and scope of the embodiments herein. For example, the embodiments have been shown and described herein with relation to specific Ethernet protocols. However, the embodiments in their broader sense are not as limited, and may, in fact, be used with various other types of wireless protocols (e.g., Bluetooth, NFC technologies, and the like).
The foregoing description has been directed to specific embodiments. It will be apparent; however, that other variations and modifications may be made to the described embodiments, with the attainment of some or all of their advantages. For instance, it is expressly contemplated that the components and/or elements described herein can be implemented as software being stored on a tangible (non-transitory) computer-readable medium (e.g., disks/CDs/etc.) having program instructions executing on a computer, hardware, firmware, or a combination thereof. Accordingly this description is to be taken only by way of example and not to otherwise limit the scope of the embodiments herein. Therefore, it is the object of the appended claims to cover all such variations and modifications as come within the true spirit and scope of the embodiments herein.