Various embodiments of the present invention provide systems and methods for detecting media flaws, and more particularly to systems and methods for envelope-based defect detection with pattern qualification.
In a typical magnetic storage system, digital data is stored in a series of concentric circular tracks along a storage medium. Data is written to the medium by positioning a read/write head assembly over the medium at a selected location as the storage medium is rotated, and subsequently passing a modulated electric current through the head assembly such that a corresponding magnetic flux pattern is induced in the storage medium. To retrieve the stored data, the head assembly is positioned anew over the track as the storage medium is rotated. In this position, the previously stored magnetic flux pattern induces a current in the head assembly that can be converted to the previously recorded digital data. Defective regions may exist in the storage medium. Writing data to a defective region can result in the loss of such data. To avoid this, various approaches have been developed for identifying defective regions. However, some of these approaches can yield false positives in some environments, incorrectly identifying a region of the storage medium as defective.
Embodiments of the present invention provide systems and methods for detecting defects on storage media with pattern qualification using a digital data detector in a data processing system.
In some embodiments, an apparatus for detecting media flaws includes an envelope based media defect detector operable to identify a media defect based on an envelope of an input signal, a periodic pattern detector operable to determine whether the input signal comprises a data pattern, and a media flaw signal generation circuit operable to indicate a media defect when the envelope based media defect detector identifies the media defect and the periodic pattern detector determines that the input signal does not comprise the data pattern.
This summary provides only a general outline of some embodiments according to the present invention. Many other embodiments of the present invention will become more fully apparent from the following detailed description, the appended claims and the accompanying drawings.
A further understanding of the various embodiments of the present invention may be realized by reference to the figures which are described in remaining portions of the specification. In the figures, like reference numerals are used throughout several figures to refer to similar components. In some instances, a sub-label consisting of a lower case letter is associated with a reference numeral to denote one of multiple similar components. When reference is made to a reference numeral without specification to an existing sub-label, it is intended to refer to all such multiple similar components.
a-7b graphically depict an exemplary operation of the envelope detector of
As data is retrieved from a storage medium such as a magnetic hard disk platter, it is processed by a variety of processing circuits such as analog filters and amplifiers, analog to digital converters, etc. Such processing circuits are controlled by control loops based on feedback in the processing circuits, such as, but not limited to, controlling the sampling phase of an analog to digital converter. In some embodiments, a coasting control loop applies media defect detection to detect media flaws and to place the control loops in a coasting mode when processing data retrieved from a defective media region, to prevent misadaptation of processing circuits based on flawed data. Envelope-based defect detection can be a low-latency alternative to more robust error-based & reliability-based defect detection methods, used in some embodiments to place control loops in coasting mode. However, envelope-based detectors can be tricked by envelope loss associated with narrow-spectrum signals, referred to herein as 2T-periodic patterns, such as but not limited to a repeating “1100” data pattern.
A media defect detector with pattern qualification uses a pattern detector to qualify the results from the envelope-based defect detector to avoid undesired control loop coasting. Thus, the media defect detector with pattern qualification places the control loops in coasting mode when processing data from defective media regions detected by envelope-based detection, but not when processing 2T-periodic patterns which produce the same or similar signal envelopes as data from a defective media region.
The media defect detector with pattern qualification disclosed herein is applicable to processing data stored in or transmitted over virtually any channel or storage of information on virtually any media. Transmission applications include, but are not limited to, optical fiber, radio frequency channels, wired or wireless local area networks, digital subscriber line technologies, wireless cellular, Ethernet over any medium such as copper or optical fiber, cable channels such as cable television, and Earth-satellite communications. Storage applications include, but are not limited to, hard disk drives, compact disks, digital video disks, magnetic tapes and memory devices such as DRAM, NAND flash, NOR flash, other non-volatile memories and solid state drives. For example, the data processing system may be, but is not limited to, a read channel in a magnetic hard disk drive, detecting and decoding data sectors from the drive.
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In a typical read operation, read/write head assembly 120 is accurately positioned by motor controller 112 over a desired data track on disk platter 116. Motor controller 112 both positions read/write head assembly 120 in relation to disk platter 116 and drives spindle motor 114 by moving read/write head assembly 120 to the proper data track on disk platter 116 under the direction of hard disk controller 110. Spindle motor 114 spins disk platter 116 at a determined spin rate (RPMs). Once read/write head assembly 120 is positioned adjacent the proper data track, magnetic signals representing data on disk platter 116 are sensed by read/write head assembly 120 as disk platter 116 is rotated by spindle motor 114. The sensed magnetic signals are provided as a continuous, minute analog signal representative of the magnetic data on disk platter 116. This minute analog signal is transferred from read/write head assembly 120 to read channel circuit 102 via preamplifier 104. Preamplifier 104 is operable to amplify the minute analog signals accessed from disk platter 116. In turn, read channel circuit 102 decodes and digitizes the received analog signal to recreate the information originally written to disk platter 116. This data is provided as read data 122 to a receiving circuit. As part of processing the received information, read channel circuit 102 performs media defect detection with pattern qualification. In some embodiments, this is performed to correctly place control loops in coasting mode. Such a media defect detector with pattern qualification can be implemented consistent with that disclosed below in relation to
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The servo wedges 212, 214 may extend from an inner diameter 222 to an outer diameter 224, may have any suitable shape and arrangement, and any number of servo wedges may be provided on storage medium 200. It should be noted that while two tracks 216, 220 and two servo wedges 212, 214 are shown, hundreds of wedges and tens of thousands of tracks may be included on a given storage medium.
In operation, storage medium 200 is rotated in relation to a sensor that senses information from the storage medium. In a read operation, the sensor would sense servo data from wedge 112 followed by user data from a user data region between wedge 212 and wedge 214 and then servo data from wedge 214. In a write operation, the sensor would sense servo data from wedge 212 then write data to the user data region between wedge 212 and wedge 214, with location information in the user data region provided by a user sync mark 244 and a user preamble 246. The signal from the sensor is processed by a data processing circuit including a media defect detector with pattern qualification, which can be used to correctly place control loops in coasting mode when reading user data and/or when reading data from some servo data regions.
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Digital samples 506 are provided to an envelope detector 514 which measures the amplitude of the envelope of the digital samples 506 and which yields an envelope amplitude signal 516. The envelope amplitude signal 516 is an averaged signal in some embodiments, giving the envelope amplitude within a time window. The envelope amplitude signal 516 is compared with a threshold 520 in a comparator 522, yielding a media defect error signal 524 when the envelope of the digital samples 506 indicates the presence of a media defect. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of envelope-based media defect detection circuits that may be used in relation to different embodiments of the present invention. In some embodiments, the envelope detector 514 and comparator 522 are combined in a media defect detection circuit.
The digital samples 506 are also provided to a 2T-periodic pattern detector 510 which determines whether the digital samples 506 correspond with a 2T-periodic pattern such as, but not limited to, “1100”. The 2T-periodic pattern detector 510 yields a periodic pattern signal 512 that is asserted when the digital samples 506 correspond with a 2T-periodic pattern. A 2T-periodic pattern may be detected in any suitable manner, such as, but not limited to, based on the signal energy of the digital samples 506. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of 2T-periodic pattern detector circuits that may be used in relation to different embodiments of the present invention.
The media defect error signal 524 and the periodic pattern signal 512 are combined in a combining circuit 526 such as an AND gate with an inverting input, yielding a coast signal 530 that is asserted when the envelope detector 514 detects a media defect and the 2T-periodic pattern detector 510 confirms that the diminished envelope of the digital samples 506 is not due to a 2T-periodic pattern.
The coast signal 530 is provided to adaptive control loops 532, which generate an error signal 534 provided to the analog to digital converter 504 and/or analog front end (not shown), facilitating correction of phase and frequency sampling errors, gain, etc. In some embodiments, control loops 532 include three adaptive feedback loops. The first loop includes a digital phase lock loop circuit and is operable to adaptively adjust the sampling period used by analog to digital converter 504 to sample analog input 502 (i.e., adjusting the phase and/or frequency of a clock signal). The second loop includes an offset circuit (not shown) that is used to adaptively adjust any DC offset from the received analog input. The third loop includes a gain calculation circuit (not shown) that is used to adaptively adjust the gain used in pre-processing the received analog input signal. When analog input 502 includes a media defect region such as that depicted in
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The resulting moving average from moving average filter circuit 610 is subtracted from the current value of digital samples 605 using a summation element. This subtraction yields a substantially DC free sample value at the output of summation element 620. An output 622 from summation element 620 is provided in parallel to four separate envelope detector circuits: a fast positive envelope detector circuit 630, a fast negative envelope detector circuit 635, a slow positive envelope detector circuit 640, and a slow negative envelope detector circuit 645. Fast positive envelope detector circuit 630 applies the following algorithm to output 622:
e
+
fast(k+1)=max{xk,e+fast(k)−Δ+fast},
where xk indicates a prior value of output 622, e+fast(k) indicates a prior value of an output 632 of fast positive envelope detector 630, e+fast(k+1) indicates the next value of output 632, and Δ+fast indicates a fast decay rate. Fast negative envelope detector circuit 635 applies the following algorithm to output 622:
e
−
fast(k+1)=min{xk,e−fast(k)+Δfast},
where e−fast(k) indicates a prior value of an output 634 of fast negative envelope detector 635, e−fast(k+1) indicates the next value of output 634, and Δ−fast indicates the same fast decay rate of Δ+fast. Slow positive envelope detector circuit 640 applies the following algorithm to output 622:
e
+
slow(k+1)=max{xk,e−slow(k)−Δ+slow},
where e+slow(k) indicates a prior value of an output 636 of slow positive envelope detector 640, e+slow (k+1) indicates the next value of output 636, and Δ+slow indicates a slow decay rate that is less than fast decay rate, Δ+fast. Slow negative envelope detector circuit 645 applies the following algorithm to output 622:
e
−
slow(k+1)=min{xk,e−slow(k)+Δ−slow},
where e−slow (k) indicates a prior value of an output 638 of slow negative envelope detector 645, e−slow(k+1) indicates the next value of output 638, and Δ−slow indicates the same slow decay rate Δ+slow. It should be noted, however, that the decay rates for the negative and positive envelope calculations do not need to be the same.
Outputs 632, 634 are each provided to a fast envelope calculation circuit 650, and outputs 636, 638 are each provided to a slow envelope calculation circuit 655. Fast envelope calculation circuit 650 provides an output 652 described by the following equation:
e
fast(k+1)=e+fast(k+1)−e−fast(k+1).
Similarly, slow envelope calculation circuit 655 provides an output 654 described by the following equation:
e
slow(k+1)=e+slow(k+1)−e−slow(k+1).
Outputs 652, 654 are each provided to a media defect determination circuit 660 that combines the values of the outputs for comparison against a threshold to determine whether a media defect is detected. Media defect determination circuit 660 provides an output 662 defined by the following equation:
Where the defect ratio is greater than a defined threshold, output 662 is asserted. Output 662 is provided to a media defect signal generation circuit 670 that is operable to control the immediacy of an assertion of a defect output 675 and the duration of the assertion. In some embodiments of the present invention, media defect signal generation circuit 670 includes a re-settable/re-loadable counter that counts the number of periods after the media defect region is cleared. In such cases, defect output 675 may remain asserted until the counter reaches a defined count value.
a graphically depicts an exemplary operation of media defect detector 600 during data retrieval from a non-defective media region. A timing diagram 701 shows output 622 as a cyclical signal with a reasonably consistent amplitude as would be expected when data is being retrieved from a non-defective region of a medium. As shown, the value of e+fast (output 632) changes by an amount (Δ+fast) that is slower than the rate at which output 622 decreases. Output 632 assumes the value of output 622 or of the value degraded by Δ+fast depending upon whichever is greater in accordance with the following equation:
e
+
fast(k+1)=max{xk,e+fast(k)−Δ+fast}.
The value of e−fast (output 634) changes by an amount (Δ−fast) that is slower than the rate at which output 622 increases. Output 634 assumes the value of output 622 or of the value degraded by Δ−fast depending upon whichever is less in accordance with the following equation:
e
−
fast(k+1)=min{xk,e−fast(k)+Δ−fast}.
The value of e+slow (output 636) changes by an amount (Δ+slow) that is slower than the rate at which output 622 decreases. Output 636 assumes the value of output 622 or of the value degraded by Δ+slow depending upon whichever is greater in accordance with the following equation:
e
+
slow(k+1)=max{xk,e+slow(k)−Δ+slow}.
The value of e−slow (output 638) changes by an amount (Δ−slow) that is slower than the rate at which output 622 increases. Output 638 assumes the value of output 622 or of the value degraded by Δ−slow depending upon whichever is less in accordance with the following equation:
e
−
slow(k+1)=min{xk,e−slow(k)+Δ−slow}.
A timing diagram 702 depicts the values of efast (output 652 shown as solid lines) and eslow (output 654 shown as dashed lines) at different calculation periods (t, t+1, t+2, . . . ). As discussed above, outputs 652, 654 respectively correspond to the following equations:
e
fast(k+1)=e+fast(k+1)−e−fast(k+1), and
e
slow(k+1)=e+slow(k+1)−e−slow(k+1).
Of note, the values of outputs 652, 654 are reasonably constant over the calculation periods, and at all times exceed a defect threshold value 703. Further, the ratio of output 652 to output 654 remains reasonably constant over the depicted period. As the ratio at all times exceeds a defect threshold value 703, a defect is not indicated, and thus defect output 675 remains deasserted. This situation is expected where the received data is not derived from a defective region of the media.
b graphically depicts an exemplary operation of media defect detector 600 during data retrieval during a transition from a non-defective media region to a defective media region. A timing diagram 751 shows output 622 as a cyclical signal with a degrading amplitude representing the transition to a defective region of the media from which the data is derived. As shown, the value of e+fast (output 632) changes by an amount Δ+fast) that is slower than the rate at which output 622 decreases. Output 632 assumes the value of output 622 or of the value degraded by Δ+fast depending upon whichever is greater. The value of e−fast (output 634) changes by an amount (Δ−fast) that is slower than the rate at which output 622 increases. Output 634 assumes the value of output 622 or of the value degraded by Δ−fast depending upon whichever is greater. The value of e+slow (output 636) changes by an amount (Δ+slow) that is slower than the rate at which output 622 decreases. Output 636 assumes the value of output 622 or of the value degraded by Δ+slow depending upon whichever is greater. The value of e−slow (output 638) changes by an amount (Δ−slow) that is slower than the rate at which output 622 increases. Output 638 assumes the value of output 622 or of the value degraded by Δ−slow depending upon whichever is greater.
A timing diagram 752 depicts the values of efast (output 652 shown as solid lines) and eslow (output 654 shown as dashed lines) at different calculation periods (t, t+1, t+2, . . . ). Of note, the values of outputs 652, 654 continue to decrease as the transition from the non-defective media region to the defective media region occurs. Further, the ratio of output 652 to output 654 declines dramatically between calculation period t+2 and calculation period t+3. Once this ratio falls below a defect threshold value 753, a defect is indicated. At this point, defect output 675 is asserted. It should be noted that in some embodiments of the present invention the threshold must be exceeded for a certain number of consecutive calculation periods before defect output 675 is asserted. Such an approach operates to filter out any spurious noise that is not necessarily indicative of a defective medium. Based on the disclosure provided herein, one of ordinary skill in the art will recognize a variety of filters and/or filtering techniques that may be used in relation to different embodiments of the present invention to assure a more accurate designation of the media defect output.
It should be noted that transition from a defective media region to a non-defective media region is substantially the reverse of that shown in
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Data samples 802 are provided to a window selection circuit 804 which yield data samples 806 within a window of time. The length of within which the window selection circuit 804 selects samples may be adapted to any desired duration, such as, but not limited to, 12 or 16 bits. The selected data samples 806 are provided to an energy calculation circuit 810, which calculates the sum of the square of the values of the selected data samples 806 (Σx2, where x are the values of the data samples 806), yielding the total energy in the signal 812. The total energy in the signal 812 is compared with a threshold 814 in a comparator 816, yielding a minimum signal energy signal 820 that is asserted when the total energy in the signal 812 is greater than the threshold 814. This prevents the periodic pattern detector 800 from finding a 2T-periodic pattern when the overall signal energy is too low or nonexistent.
The selected data samples 806 are also provided to a bandpass filter 822 that operates at the 2T frequency, yielding filtered samples 824 at the 2T frequency. The bandpass filter 822 effectively correlates the selected data samples 806 against a 2T pattern to determine the amount of 2T energy in the selected data samples 806. In some embodiments, the bandpass filter 822 performs a Discrete Fourier Transform. The filtered samples 824 are provided to an energy calculation circuit 826 which performs the same function as the energy calculation circuit 810, yielding the total amount of 2T energy in the signal 830. The energy calculation circuit 826 calculates the sum of the square of the values of the filtered samples 824 (Σx2T2, where x2T are the values of the filtered samples 824).
The total amount of 2T energy in the signal 830 is compared with a scaled version 836 of the total energy in the signal 812 in comparator 840, yielding an intermediate 2T pattern indicator 842 that is asserted when a 2T-periodic pattern is detected. The total energy in the signal 812 is scaled by a scaling factor α 832 in multiplier 834, yielding scaled total energy in the signal 836. The scaling factor α 832 establishes the threshold that determines how much of the total energy in the signal must be at the 2T frequency to identify a 2T-periodic pattern. The bandpass filter 822, energy calculation circuits 810, scaling factor α 832 and comparator 840 implement the following equation, where a 2T-periodic pattern is identified when the comparison holds true:
Σx2T2>αΣx2
where Σx2T2 is the total amount of 2T energy in the signal 830, and a Σx2 is the scaled total energy in the signal 836.
The intermediate 2T pattern indicator 842 is combined with the minimum signal energy signal 820 in AND gate 844, yielding a 2T pattern indicator 842 that is asserted when a 2T-periodic pattern is identified in the selected data samples 806 and when the total energy in the signal 812 is greater than threshold 814.
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It should be noted that the various blocks discussed in the above application may be implemented in integrated circuits along with other functionality. Such integrated circuits may include all of the functions of a given block, system or circuit, or a portion of the functions of the block, system or circuit. Further, elements of the blocks, systems or circuits may be implemented across multiple integrated circuits. Such integrated circuits may be any type of integrated circuit known in the art including, but are not limited to, a monolithic integrated circuit, a flip chip integrated circuit, a multichip module integrated circuit, and/or a mixed signal integrated circuit. It should also be noted that various functions of the blocks, systems or circuits discussed herein may be implemented in either software or firmware. In some such cases, the entire system, block or circuit may be implemented using its software or firmware equivalent. In other cases, the one part of a given system, block or circuit may be implemented in software or firmware, while other parts are implemented in hardware.
In conclusion, embodiments of the present invention provide novel systems, devices, methods and arrangements for media defect detection with pattern qualification. While detailed descriptions of one or more embodiments of the invention have been given above, various alternatives, modifications, and equivalents will be apparent to those skilled in the art without varying from the spirit of the invention. Therefore, the above description should not be taken as limiting the scope of embodiments of the invention which are encompassed by the appended claims.
The present application claims priority to (is a non-provisional of) U.S. Pat. App. No. 61/832,136, entitled “Systems and Methods for Media Defect Detection With Pattern Qualification”, and filed Jun. 6, 2013 by Singleton et al, the entirety of which is incorporated herein by reference for all purposes.
Number | Date | Country | |
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61832136 | Jun 2013 | US |