U.S. Pat. No. 6,421,214 (Packard), which is incorporated by reference herein in its entirety, allegedly recites a “self-testing arc fault or ground fault detector includes arc fault detecting circuitry and components. The detector includes a testing circuit which tests at least part of the circuitry and components and generates a recurring signal when the test completes successfully. If the test does not complete successfully, the signal is lost. This loss of signal is signaled by an indicator connected to the testing circuit. In one version, the loss of signal activates a circuit interrupter which disconnects the load side of the detector from the line side.” See Abstract.
U.S. Pat. No. 6,477,021 (Haun), which is incorporated by reference herein in its entirety, allegedly recites a “system for determining whether arcing is present in an electrical circuit includes a sensor for monitoring a current waveform in the electrical circuit, and an arc fault detection circuit which determines whether an arc fault is present in response to the sensor. The arc fault detection circuit includes a controller which produces a trip signal in response to a determination that an arcing fault is present in the electrical circuit, and an inhibit/blocking function for preventing the production of the trip signal under one or more predetermined conditions.” See Abstract.
U.S. Pat. No. 6,532,139 (Kim), which is incorporated by reference herein in its entirety, allegedly recites a “circuit breaker for shutting off an AC electrical source from a phase wire and a neutral wire has the ability to detect an arc fault, ground fault and overload. The circuit breaker includes an arc fault circuit interrupter (AFCI), a ground fault circuit interrupter (GFCI), an overload circuit interrupter (OLCI), and trip circuitry. The AFCI, the GFCI and the OLCI are crossed between the phase wire and the neutral wire of the AC power line and detect the arc fault, ground fault and overload respectively. The trip circuitry is used for shutting off the AC source from the circuit breaker when at least one of the arc fault, ground fault and overload occurs. The circuit breaker is shut when the level of at least one of an arc fault trip signal, ground fault trip signal and overload trip signal is larger than a specified reference trip level.” See Abstract.
Certain exemplary embodiments comprise a fault detection system, which can comprise a microprocessor. The microprocessor can be configured to automatically generate an output signal to an output pin responsive to an input signal indicative of an arc fault. The output signal can be configured to trip a circuit breaker.
A wide variety of potential practical and useful embodiments will be more readily understood through the following detailed description of certain exemplary embodiments, with reference to the accompanying exemplary drawings in which:
When the following terms are used substantively herein, the accompanying definitions apply:
Certain exemplary embodiments provide a fault detection system, which can comprise a microprocessor. The microprocessor can be configured to automatically generate an output signal to an output pin responsive to an input signal indicative of an arc fault. The output signal can be configured to trip a circuit breaker.
Certain exemplary embodiments provide a method to detect arc faults and ground faults in low voltage Alternating Current (AC) power distribution systems. The method can utilize a hardware, firmware, and/or software. The method can be based on a system that comprises a microprocessor and/or a Digital Signal Processor (DSP). In certain exemplary embodiments, hardware can be simplified for relatively low cost applications and can be characterized by a relatively compact size. The method can comprise arc fault and/or ground fault detection, calibration, simulated arc and/or ground fault signal generation for circuit tests, and/or temperature compensation, etc.
A current sensor 1600 used on a neutral conductor 1300 can be configured to provide a signal for use in arc fault monitoring. A signal from current sensor 1600 can be conditioned via a neutral current conditioning circuit 1650. A differential current sensor 1500, used to measure a differential current between neutral conductor 1300 and a line conductor 1200, can provide a signal for use in ground fault monitoring. In certain exemplary embodiments, differential current sensor 1500 and/or current sensor 1600 can be resistive current sensors. A signal from differential current sensor 1500 can be conditioned via a differential current conditioning circuit 1550. Signals from neutral current conditioning circuit 1650 and/or differential current conditioning circuit 1550 can be provided to single-chip microprocessor 1100. Single-chip microprocessor 1100 can be configured to receive an input signal indicative of an arc fault from current sensor 1600. Single-chip microprocessor 1100 can be configured to receive an input signal indicative of a ground fault from differential current sensor 1500.
Single-chip microprocessor 1100 can be configured to condition and/or amplify an input signal, detect an arc fault, detect a ground fault, regulate a voltage, test one or more components in system 1000 responsive to a simulated arc fault signal 1700, reset a fault detection counter during power up, compensate for a temperature variation of current sensor 1600 and/or differential current sensor 1500, and/or control circuit breaker trip functions, provide fault and/or error notifications and/or alerts, etc. In certain exemplary embodiments, single-chip microprocessor 1100 can comprise a multi channel on-chip Analog to Digital (A/D) converter. The multi channel on-chip A/D converter can be configured to accept an analog input from current sensor 1600 and/or differential current sensor 1500 and can provide a digital output to other circuits comprised in single-chip microprocessor 1100. Single-chip microprocessor 1100 can be configured to generate simulated arc fault signal 1700, which can be provided to an input pin of single-chip microprocessor 1100 for system testing purposes. In certain exemplary embodiments, system 1000 can comprise a mechanical button configured, when depressed, to initiate a system test, which can comprise generating simulated arc fault signal 1700. In certain exemplary embodiments, system 1000 can comprise a non-volatile memory, which can be comprised in a memory device associated with single-chip microprocessor 1100.
Digital inputs to single-chip microprocessor 1100, such as from a network-connected information device and/or from a user interface, can be used to activate or select one or more system functions. For example, a switching signal (ON or OFF) can be utilized to enable or disable simulated arc fault signal 1700. As another example, a calibration procedure can be activated. In certain exemplary embodiments, single-chip microprocessor 1100 can be configured to automatically calibrate current sensor 1600 and/or differential current sensor 1500. In certain exemplary embodiments, single-chip microprocessor 1100 can be configured to receive a user request to calibrate current sensor 1600 and/or differential current sensor 1500. In such embodiments, single-chip microprocessor 1100 can calibrate current sensor 1600 and/or differential current sensor 1500 responsive to the user request. In certain exemplary embodiments, single-chip microprocessor 1100 can be configured to automatically calibrate a gain of an analog to digital converter electrically coupled to current sensor 1600.
In certain exemplary embodiments, a temperature sensor 1940 can be comprised in and/or electrically coupled to single-chip microprocessor 1100. Temperature sensor 1940 can be configured to provide a temperature value for correcting a measured value of current sensor 1600 and/or differential current sensor 1500. Temperature sensor 1940 can be comprised in and/or electrically coupled to single-chip microprocessor 1100. In certain exemplary embodiments, single-chip microprocessor 1100 can be configured to automatically correct a value obtained from current sensor 1500 and/or differential current sensor 1500. In certain exemplary embodiments, single-chip microprocessor 1100 can be configured to detect corruption in code comprised in single-chip microprocessor 1100. The code can be associated with, and/or configured to generate, an output signal from single-chip microprocessor 1100 that provides instructions to open a switch to stop a flow of an electrical current in a circuit monitored by single-chip microprocessor 1100.
System 1000 can comprise a DC power supply 1800 with a signal voltage output and a current capacitance. DC power supply 1800 can be configured to provide electrical energy to single-chip microprocessor 1100. In certain exemplary embodiments, power consumption in system 1000 can be relatively low.
In certain exemplary embodiments, single-chip microprocessor 1100 can be configured to automatically generate an output signal to an output pin responsive to an input signal indicative of a fault. In certain exemplary embodiments, the output signal can be configured to trip a single circuit breaker. Single-chip microprocessor 1100 can be configured to generate a tripping control signal if an arc fault or ground fault is detected, which can drive a device such as a solenoid 1900, which can be adapted to trip an electrical circuit associated with system 1000. For example, solenoid 1900 can be configured to actuate a mechanical tripping mechanism 1950 to disconnect the power to the load via, for example, SCR and/or solenoid 1900, causing a switch 1400 to open.
A Light Emitting Diode (LED) 1850 indicator can be electrically coupled to a digital output of single-chip microprocessor 1100. LED 1850 can be used to indicate a run status of single-chip microprocessor 1100. Any predetermined change, or set of changes, in LED 1850 can be related to any predetermined status of system 1000. Examples that follow are intended to be illustrative and not restrictive in their description of possible indications of status. In certain exemplary embodiments, if LED 1850 is OFF, an inference can be made that system power has been lost. In certain exemplary embodiments, if LED 1850 is ON, an inference can be made that system power is on, but single-chip microprocessor 1100 is not running. In certain exemplary embodiments, if LED 1850 is blinking at a constant visible rate, an inference can be made that single-chip microprocessor 1100 is running normally. In certain exemplary embodiments, if LED 1850 is blinking at an inconsistent rate, an inference can be made that single-chip microprocessor 1100 has detected a fault.
Single-chip microprocessor 1100 can be communicatively coupled to a network 1960. In certain exemplary embodiments, single-chip microprocessor 1100 can comprise a wireless transceiver, which can wirelessly transmit signals via network 1960. Via network 1960, single-chip microprocessor 1100 can be communicatively coupled to an information device 1970. Information device 1970 can comprise a user interface 1980 and/or a user program 1990. Information device 1970 can be configured to receive, process, and/or render information obtained from single-chip microprocessor 1100 related to fault detection and/or diagnostic testing related to system 1000. User program 1990 can be configured to analyze fault and/or diagnostic information. User interface 1980 can be configured to render information regarding system 1000 for a user.
Arc fault signal conditioning circuit 2000 can comprise a signal voltage amplifier 2700. Signal voltage amplifier 2700 can be configured to amplify an analog signal from current sensor 2350. Amplifier 2700 can be electrically coupled to the microprocessor.
Arc fault signal conditioning circuit 2000 can comprise a plurality of resistors such as resistor 2400, resistor 2450, resistor 2550, resistor 2600, resistor 2650, resistor 2750, resistor 2900, and/or resistor 2950, each of which can be selected and sized to set a gain of amplifier 2700, to match impedance from both positive and negative inputs of amplifier 2700, and/or to set an offset voltage of a signal output into a center of a predetermined DC voltage range. The output, such as an exemplary output signal as illustrated in
Arc fault signal conditioning circuit 2000 can comprise a plurality of capacitors such as capacitor 2500 and/or capacitor 2800, which can be selected and/or sized to set a frequency response of arc fault signal conditioning circuit 2000 to control a gain of a high frequency signal. The gain in the high frequency signal can be interpreted as noise in an arc fault detection scheme. A capacitor 2850 can be selected and/or sized to provide a relatively low signal offset error. A digital square wave output from the microprocessor and/or DSP can be used to simulate an arc input to test the function of a system comprising arc fault signal conditioning circuit 2000 from amplifier 2700 to a mechanical tripping mechanism associated with arc fault signal conditioning circuit 2000.
An output signal 4980 from electrical circuit 4000 can be characterized by an output waveform, such as an exemplary output signal as illustrated in
Electrical circuit 4000 can comprise a plurality of resistors such as resistor 4500, resistor 4550, resistor 4600, resistor 4700, resistor 4750, resistor 4850, resistor 4940, and/or resistor 4960, each of which can be selected and sized to set a gain of amplifier 4800, to match impedance from both positive and negative inputs of amplifier 4800, and/or to set an offset voltage of output signal 4980 into a center of the predetermined DC voltage range.
Electrical circuit 4000 can comprise a plurality of capacitors such as capacitor 4650 and/or capacitor 4900, which can be selected and/or sized to set a frequency response of electrical circuit 4000 to control a gain of a high frequency signal. The gain in the high frequency signal can be interpreted as noise by a ground fault detection algorithm. A capacitor 4920 can be selected and/or sized to provide a relatively low signal offset error. A digital square wave output from the microprocessor and/or DSP can be used to simulate a ground fault to test the function of a system comprising electrical circuit 4000 from amplifier 4800 to a mechanical tripping mechanism associated with electrical circuit 4000.
At activity 6100, a microprocessor can be designed and/or produced. The microprocessor can be a single-chip microprocessor and/or a single-chip digital signal processor (DSP). The microprocessor can be configured to determine, based upon one or more received signals, a presence of a ground fault and/or an arc fault. The microprocessor can be configured to automatically generate an output signal to an output pin responsive to an input signal indicative of an arc fault. The output signal can be configured to trip a circuit breaker, such as a single circuit breaker. The microprocessor can be configured to detect corruption in code comprised in the microprocessor. The code can be associated with the output signal. Certain exemplary microprocessors can comprise an on-chip resistive device configured to measure a temperature. The temperature can be utilized by the microprocessor to perform temperature compensation for one or more sensor readings associated with ground fault and/or arc fault determination.
The microprocessor can comprise and/or be electrically coupled to a Light Emitting Diode (LED). The LED can be configured to indicate a status of the microprocessor and/or a system comprising the microprocessor.
Variations in circuits comprised in the microprocessor, such as arc fault and/or ground fault signal input circuits can cause unanticipated results. A gain calibration can be used to at least partially compensate and/or correct such variations. The gain calibration can be conducted during production utilizing a test fixture. During gain calibration, relatively well defined signal sources can be provided to the arc fault and/or the ground fault input circuits. Probes from the test fixture can be used to send digital signals to input ports of the microprocessor for the gain calibration procedure. The gain calibration can be based in hardware, firmware, and/or software. Input values from Analog to Digital (A/D) converters can be compared with theoretical values. Arc fault and/or ground input circuits can process signals such that output values vary approximately linearly with input values. A ratio value can be obtained during calibration for each input circuit and saved in a nonvolatile memory device. Each ratio value can be used to correct values acquired through A/D inputs. In embodiments where gain calibration is not performed, default values based on one or more theoretical calculations can be used.
In certain exemplary embodiments, a temperature calibration can be performed to compensate temperature caused variations of sensors utilized as inputs for arc fault and/or ground fault detection. The temperature calibration can be configured to test input circuits comprised in the microprocessor. In certain exemplary embodiments, a temperature sensor can be utilized. A calibration can be performed for temperature compensation under a preset temperature, for example approximately 25 degrees Celsius. Temperature caused variation of sensed signals can be experimentally predetermined and/or predicted. After the temperature sensor is calibrated, the microprocessor can determine and/or estimate an approximate actual environmental temperature. Once a mathematical formula is established and/or predetermined values related to temperature compensation are stored, the microprocessor can be configured to provide temperature compensation for electrical measurements from one or more sensors.
At activity 6200, the microprocessor can be installed in a system configured to determine the presence of a ground fault and/or an arc fault. The system can comprise one or more current and/or differential current sensors configured to provide signals to the microprocessor. The system can comprise one or more conditioning circuits configured to condition signals from the one or more sensors prior to a transmission of the signals to the microprocessor.
At activity 6300, the system can be initialized. For example, the one or more sensors can be calibrated. In certain exemplary embodiments, the microprocessor can be configured to perform a self-test. The microprocessor can avoid providing a signal to open a switch to stop an electrical flow in an electrical circuit during a predetermined time period during which the self-test is being performed. In certain exemplary embodiments, a determination can be made regarding a status of the switch. One or more signals indicative of a status of the switch can be provided as an input to the microprocessor or DSP.
At activity 6400, software code can be tested to detect code corruption. The software code can be stored in a memory device. Verifying an absence of code corruption can relatively enhance system software stability. The software code can be tested potentially at any time, such as aperiodically and/or periodically at a predetermined frequency.
At activity 6500, system performance can be tested via one or more simulated signals. For example, the one or more simulated signals can comprise a signal indicative of an arc fault and/or a signal indicative of a ground fault. The system test can comprise checking a switch status and sending out a signal characterized by a simulated arc waveform to test the arc fault circuit. The test can be configured to determine if an arc signal input opens the switch via an electrically and/or mechanically coupled trip mechanism. The test can be performed potentially at any time, such as aperiodically and/or periodically at a predetermined frequency. When the test is performed the system can be configured not to process and/or respond to variations in one or more circuit signals.
The simulated arc waveform can comprise a series of approximately rectangle pulses. In certain exemplary embodiments, the pulses can comprise between approximately 4 and 8 pulses within a time period of approximately 500 milliseconds. In certain exemplary embodiments, the pulses can be characterized by a frequency of approximately 60 Hertz and a duty cycle of approximately 70%. An exemplary embodiment of a simulated arc fault waveform is illustrated in
At activity 6600, an arc fault or ground fault signals can be obtained from sensors configured to measure an electric current and/or a differential current. A conditioning circuit can process each obtained signal prior to transmission to the microprocessor. The signals can be processed via an A/D converter circuit, which can be comprised in the microprocessor.
At activity 6700, signals can be filtered. Signals output from an A/D converter can be processed with a digital filtering algorithm for relatively good noise immunization. In embodiments where calibrations have been performed, signals can be corrected and/or compensated based on results of calibrations. In embodiments where calibrations were not performed, default values can be used in signal processing.
At activity 6800, a filtered and/or calibrated waveform can be processed by an algorithm for arc and ground detection comprised in the microprocessor.
At activity 6900, if an arc or ground fault is detected, a SCR triggering signal can be transmitted via a digital output port. The signal can be configured to disconnect system power to an electrical circuit via a solenoid controlled mechanical mechanism. If no fault is detected, method 6000 can be recursively executed to attempt to detect a fault.
At activity 6950, results can be reported. For example, if code corruption is detected, information regarding the corruption can be transmitted and/or reported to one or more users via one or more I/O devices and/or information devices associated and/or communicatively coupled to the microprocessor. If a fault is detected and/or a circuit breaker associated with the microprocessor is tripped, information regarding the fault can be transmitted and/or reported to one or more users via the one or more I/O devices and/or information devices.
In certain exemplary embodiments, a timer based interrupt rate can be relatively fast, such as less than approximately 120 microseconds. This rate is too high to make the rate apparent if an LED associated with the microprocessor were switched each time when an interrupt routine is executed. In certain exemplary embodiments, a software counter can be used to reduce a blinking rate of the LED to a visible rate, such as between approximately 10 and approximately 25 times/second.
At activity 7200, a memory device associated with the microprocessor can be checked. For example, the memory device can be checked to determine if software code has been corrupted. For example, a flash memory can be tested to determine if a location in the flash memory and/or data comprised in the location in the flash memory is an expected value. An unexpected value or result from the location in the flash memory can be indicative that software code has been corrupted.
At activity 7300, default values can be restored if a determination is made that the software code has been corrupted and/or the memory device has failed. In certain exemplary embodiments, the default values can be rendered for viewing by a user.
At activity 7400, a determination can be made of whether one or more parameters have changed. The determination that one or more parameters have changed can be made via a Cyclic Redundancy Check (CRC). If the cyclic redundancy check fails, certain exemplary embodiments can provide instructions to launch the watchdog timer without resetting the watchdog counter.
At activity 7500, a determination is made whether a parameter is within a predetermined range.
At activity 7600, a parameter can be changed responsive to a determination that the parameter is outside the predetermined range. In certain exemplary embodiments, if a parameter has changed and is outside of a predetermined range, the change of the parameter can be ignored and the parameter restored to a prior value. If the parameter is within the predetermined range, one or more input signals can be tested to determine whether each input is within a predetermined range. If an input is out of range, the input can be set to a minimum value.
In certain exemplary embodiments, via one or more user interfaces 8600, such as a graphical user interface, a user can view a rendering of information related to arc fault and/or ground fault detection in an electrical circuit.
Still other practical and useful embodiments will become readily apparent to those skilled in this art from reading the above-recited detailed description and drawings of certain exemplary embodiments. It should be understood that numerous variations, modifications, and additional embodiments are possible, and accordingly, all such variations, modifications, and embodiments are to be regarded as being within the spirit and scope of this application.
Thus, regardless of the content of any portion (e.g., title, field, background, summary, abstract, drawing figure, etc.) of this application, unless clearly specified to the contrary, such as via an explicit definition, assertion, or argument, with respect to any claim, whether of this application and/or any claim of any application claiming priority hereto, and whether originally presented or otherwise:
Accordingly, the descriptions and drawings are to be regarded as illustrative in nature, and not as restrictive. Moreover, when any number or range is described herein, unless clearly stated otherwise, that number or range is approximate. When any range is described herein, unless clearly stated otherwise, that range includes all values therein and all subranges therein. Any information in any material (e.g., a United States patent, United States patent application, book, article, etc.) that has been incorporated by reference herein, is only incorporated by reference to the extent that no conflict exists between such information and the other statements and drawings set forth herein. In the event of such conflict, including a conflict that would render invalid any claim herein or seeking priority hereto, then any such conflicting information in such incorporated by reference material is specifically not incorporated by reference herein.