Techniques for low density parity check for forward error correction in high-data rate transmission

Information

  • Patent Application
  • 20070180344
  • Publication Number
    20070180344
  • Date Filed
    January 31, 2006
    18 years ago
  • Date Published
    August 02, 2007
    16 years ago
Abstract
A system, apparatus, and method includes a decoder to decode information including a low density parity check (LDPC) codeword received at a node using entries defined in a parity check base matrix. Other embodiments are described and claimed. The system further includes an antenna.
Description

BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 illustrates one embodiment of a system.



FIG. 2 illustrates one embodiment of a component.



FIG. 3 illustrates one embodiment of a parity check matrix.



FIG. 4 illustrates one embodiment of a bipartite graph associated with the parity check matrix shown in FIG. 3.



FIG. 5 illustrates one embodiment of a parity check base matrix H1.



FIG. 6 illustrates one embodiment of a parity check base matrix H2.



FIG. 7 illustrates one embodiment of a parity check base matrix H3.



FIG. 8 illustrates one embodiment of a logic flow.


Claims
  • 1. A method, comprising: decoding information comprising a low density parity check (LDPC) codeword received at a node using entries defined in a parity check base matrix.
  • 2. The method of claim 1, comprising: cyclically shifting an identity sub-matrix corresponding to said entry in said parity check base matrix by a value defined by said corresponding entry in said parity check base matrix.
  • 3. The method of claim 2, comprising: right shifting said identity sub-matrix laterally to the right.
  • 4. The method of claim 1, wherein said parity check base matrix is defined based on a rate of 5/6.
  • 5. The method of claim 4, wherein said parity check base matrix comprises 24 columns and 4 rows.
  • 6. The method of claim 5, wherein said codeword has a length of 1944.
  • 7. The method of claim 6, wherein said entries in said parity check base matrix are defined in accordance with parity check base matrix HA.
  • 8. The method of claim 5, wherein said codeword has a length of 1296.
  • 9. The method of claim 8, wherein said entries in said parity check base matrix are defined in accordance with parity check base matrix HB.
  • 10. The method of claim 5, wherein said codeword has a length of 648.
  • 11. The method of claim 10, wherein said entries in said parity check base matrix are defined in accordance with parity check base matrix HC.
  • 12. An apparatus, comprising: a decoder to decode information comprising a low density parity check (LDPC) codeword received at a node using entries defined in a parity check base matrix.
  • 13. The apparatus of claim 12, wherein said decoder is to cyclically shift an identity sub-matrix corresponding to said entry in said parity check base matrix by a value defined by said corresponding entry in said parity check base matrix.
  • 14. The apparatus of claim 13, wherein said decoder is to shift said identity sub-matrix in accordance with said entries defined in accordance with parity check base matrix HA.
  • 15. The apparatus of claim 13, wherein said decoder is to shift said identity sub-matrix in accordance with said entries defined in accordance with parity check base matrix HB.
  • 16. The apparatus of claim 13, wherein said decoder is to shift said identity sub-matrix in accordance with said entries defined in accordance with parity check base matrix HC.
  • 17. A system, comprising: an antenna; anda decoder coupled to said antenna to decode information comprising a low density parity check (LDPC) codeword received at a node using entries defined in a parity check base matrix.
  • 18. The system of claim 17, wherein said decoder is to cyclically shift an identity sub-matrix corresponding to said entry in said parity check base matrix by a value defined by said corresponding entry in said parity check base matrix.
  • 19. The system of claim 18, wherein said decoder is to shift said identity sub-matrix in accordance with said entries defined in accordance with parity check base matrix HA.
  • 20. The system of claim 18, wherein said decoder is to shift said identity sub-matrix in accordance with said entries defined in accordance with parity check base matrix HB.
  • 21. The system of claim 18, wherein said decoder is to shift said identity sub-matrix in accordance with said entries defined in accordance with parity check base matrix HC.
  • 22. An article comprising a machine-readable storage medium containing instructions that if executed enable a system to decode information comprising a low density parity check (LDPC) codeword received at a node using entries defined in a parity check base matrix.
  • 23. The article of claim 22, comprising instructions that if executed enable the system to cyclically shift an identity sub-matrix corresponding to said entry in said parity check base matrix by a value defined by said corresponding entry in said parity check base matrix.
  • 24. The article of claim 22, comprising instructions that if executed enable the system to define said entries in said parity check base matrix in accordance with parity check base matrix HA.
  • 25. The article of claim 22, comprising instructions that if executed enable the system to define said entries in said parity check base matrix in accordance with parity check base matrix HB.
  • 26. The article of claim 22, comprising instructions that if executed enable the system to define said entries in said parity check base matrix in accordance with parity check base matrix HC.