Voltage and current references are widely used in integrated circuits. Such references exhibit little dependence on supply and temperature. The objective of reference is to establish dc voltage or current that is independent of the power supply and process and has a well-defined behavior with temperature. Since 1980s bandgap reference was invented, it has been widely used in various analog circuits. However, even if the process works in small variations, traditional bandgap reference also has its limitations, which are mainly due to non-linear relationship between output voltage and temperature. This non-linear relationship of the traditional bandgap reference can be explained in
V
PTAT
=VV
BE
=V
BE2
−V
BE1
This voltage is directly proportional to absolute temperature:
(T is absolute temperature, K is the Boltzmann factor, q is electric charge of carrier)
The output voltage VREF can be given as:
V
REF
=V
BE
+KVV
BE (1)
Where K is a factor which is used to compensation the first order temperature coefficient of VBE. K is determined by the resistor network.
The bandgap voltage references mentioned above are almost the prototype of all the bandgap references. Although it has been designed perfectly match, the output voltage will also have a 35 ppm deviations in −20° C.˜100° C. which are caused by the curvature of the temperature characteristic curve for VREF. As shown in
The temperature deviations of traditional bandgap reference are large and the high order compensation is difficult to implement. This invention's objective is to provide bandgap reference which uses the lower order (first order) compensated bandgap voltage reference to generate reference voltage with much lower temperature coefficient.
The invention is bandgap reference circuit with linearly compensated segments. The bandgap voltage reference includes output module, adjustment module and resistor network. The resistor network is connected with output module. The two branches of the resistor network are connected to ground through the first and the second bipolar transistor, respectively. The adjustment module samples the voltage of the two branches to adjust the output voltage of the output module. The adjustment module includes sample and hold circuit, voltage comparator and control module. The input of the sample and hold (S/H) circuit is connected with the output voltage of the output module. The output of S/H is connected with the input of the voltage comparator. The output of the voltage comparator is connected with control module. The output of the control module is connected with the resistor network. According to the output of the voltage comparator the resistance of the resistor network is changed, and then the output voltage of the output module changes. The maximum voltage will be the output module's output voltage, after finding the resistance of the resistor network when the output voltage gets the maximum value.
Especially, the resistor of resistor network performances low temperature coefficient.
The resistor network includes four resistors: the fourth resistor, the third resistor, the second resistor and the first resistor. One end of the fourth resistor is connected with the output module as output of the module. The other end of it is connected with the third resistor and the second resistor. The other end of the third resistor is connected with one of the input of the adjustment module and is then connected to ground by the first bipolar transistor. The other end of the second resistor is connected with another input of the adjustment module and then connected to ground by the second bipolar transistor.
Especially, the control module changes the resistor network by changes the first resistor and the fourth resistor.
Especially, the adjustment module is an operational amplifier. The output module is NMOS field-effect transistor. The output of the operational amplifier is connected with the gate of the NMOS field-effect transistor. The two inputs of the operational amplifier are the inputs of the adjustment module. The source of the NMOS field-effect transistor is the output of the output module, and the drain of the NMOS field-effect transistor is connected to the power supply.
Furthermore, there is low-pass filter connected to the output of the output module.
Specially, the low-pass filter is composed of resistor and capacitor. One end of the resistor is connected to ground and the other end is the output of the low-pass filter which is connected to ground through the capacitor.
The benefit of this invention is the bandgap voltage reference optimization on system level with high process compatibility. This invention can find the segment with smallest temperature coefficient adaptively. The output voltage is combination of segments with local low temperature coefficient. The invention meets the requirement of fabrication process of nowadays, and the implementation is simple and area efficient.
This invention provide a detail technical solution of bandgap reference. The invention uses segmental compensation circuit to realize adaptive segmental compensation of bandgap reference with low temperature coefficient. The technical solution includes a basic bandgap voltage reference circuit and an adaptive feedback compensation circuit.
The sample and hold circuit includes N sample and hold unit (S/H1, S/H2, . . . S/Hn). They can sample and hold N different output voltages. These sample and hold units receive the output voltage of the output module and send to the voltage comparator 2, as shown in
Assuming the control module 3 generates three pulse signals. Each pulse signal lasts one period cycle. At specific time T, the counter in the control module generates the first pulse series Z1. The resistance of the first resistor 6 and the fourth resistor 5 are dominated by Z1. Thus the resistance of the resistor network is controlled by Z1. It means the K factor is controlled by Z1. We name the output voltage VREF as V1. S/H19 samples and holds V1. During the next period cycle, the control module 3 generates the second pulse signal Z2, Z2 controls the equivalent resistance of the resistor network 4. The output at this time is defined as V2. V2 is sampled and held by SH/210. These two sampled voltages are compared and then the result returns to the control module. Similarly, the third output voltage V3 is obtained at the third cycle. These three voltages will be compared and find the maximum one. The maximum voltage will be the output voltage VREF. The combined curve with the maximum voltage has the best temperature coefficient at given temperature. So the control module 3 will select the pulse signal which makes the resistance of the resistor network 4 corresponding to the maximum output voltage according to the result of the comparator 2 at current temperature and this pulse signal is kept until the counter in the control module 3 is triggered during the next detect cycle.
Number | Date | Country | Kind |
---|---|---|---|
201110040925.5 | Feb 2011 | CN | national |
Filing Document | Filing Date | Country | Kind | 371c Date |
---|---|---|---|---|
PCT/CN2011/071383 | 2/28/2011 | WO | 00 | 9/25/2012 |