Patent Application
20230197155
The invention relates to a ternary content addressable memory and an operation method thereof.
Traditional operation method for NAND-type ternary content addressable memory (TCAM) is to use word lines as search lines. In this way, is the allowable length of data is limited by the quantity of the word lines. In the present processing technique of TCAM, the quantity of the word lines generally much less than the bit lines. This may cause the conventional operation method for TCAM difficult to deal with the increasing of data length. These data could be image with high resolution and floating point value with high precision.
An embodiment of the present invention discloses a ternary content addressable memory (TCAM) device. The TCAM device comprises a first driving circuit, a second driving circuit, a sensing circuit and an in-memory searching (IMS) array. The IMS array comprises a plurality of memory units. The plurality of memory units are arranged as a plurality of rows and a plurality of columns. A plurality of control terminal of each row of the memory units are coupled to the first driving circuit via a first signal line. Each column of the memory units are serially connected to form a memory unit string. Each of the memory unit string is coupled to the second driving circuit via a second signal line, and is coupled to the sensing circuit via a third signal line. For each row of the memory units, every two adjacent memory units are configured as a memory cell, to store one of a first value, a second value and don′ care.
Another embodiment of the present invention discloses an operation method of ternary content addressable (TCAM) device, comprising: by a first driving circuit of a TCAM device, applying a select voltage on one of a plurality of first signal lines, and applying an pass voltage on the rest of the first signal lines, wherein the TCAM device comprises an in-memory searching (IMS) array, the IMS array comprises a plurality of memory units, the plurality of memory units are arranged as a plurality of rows and a plurality of columns, a plurality of control terminal of each row of the memory units are coupled to the first driving circuit via a first signal line, each column of the memory units are serially connected to form a memory unit string, each of the memory unit string is coupled to the second driving circuit via a second signal line; and by the second driving circuit, applying a plurality of searching voltage corresponding to a target data to the second signal lines.
The above and other aspects of the invention will become better understood with regard to the following detailed description of the preferred but non-limiting embodiment(s). The following description is made with reference to the accompanying drawings.
Referring to
In an embodiment, the first signal lines are word lines, the second signal lines are bit lines, and the third signal lines are source lines.
Referring to
In Table 1 and
Table 2 and
In Table 2 and
After understanding the operation of respective memory cell, the searching operation of the TCAM device 10 would be illustrated with referring to
At step S601, the first driving circuit 102 applies the select voltage Vsel on one of the first signal line WL1˜WLm, and applies the pass voltage Vpas on the rest of the first signal lines. For example, when the first signal line WL1 is to be searched, the first driving circuit 102 applies the select voltage Vsel on the first signal line WL1, and applies the pass voltage Vpas on the rest of the first signal lines WL2˜WLm.
At step S602, the second driving circuit 104 applies a number of searching voltage corresponding to a target data on the second signal lines BL1˜BLn. The searching voltages corresponding to the target data refer to the bias applied on the second signal lines that are determined based on the relationship between the searched value and the bias on the signal lines shown in Table 2 and according to the target data to be searched. For example, it is assumed that the target data to be searched is 01X1. The bias applied on the second signal lines BL1˜BL8 are respectively VH, VL, VL, VH, VL, VL, VL, VH.
At step S603, the sensing circuit 106 determined a matching result according to the current flowing out from the third signal lines SL1˜SLn.
As shown in
As shown in
Referring to
Refer to
In the sensing circuit 40, the matching degree is represented by the total current. Smaller total current represents higher matching degree, and greater total current represents lower matching degree. In the sensing circuit 50a˜50d, the matching degree is represented by the quantity of “1” (i.e., the total value). Smaller total value represents higher matching degree, and greater total value represents lower matching degree. Since the matching results provided by the sensing circuits 40 and 50a-50d could represent the matching degree between the data stored in the memory cells on the selected first signal line and the target data, the present invention could be applied to approximate search. For example, in the embodiment of the sensing circuit 40, a current threshold could be configured. The total current being smaller than the current threshold is defined as matched, and the total current not being smaller than the current threshold is defined as mismatched. In the embodiment of the sensing circuit 50a, a threshold value could be configured. The total value being smaller than the threshold value is defined as matched, and the total value not being smaller than the threshold value is defined as mismatched. In this way, data that meets the condition could be filtered out from the IMS array.
The characteristic that the matching degree is related to the number of 1s/the sum of currents detected by the sensing circuit allows the present invention to be applied to high-resolution image search.
In an embodiment, as shown in
In another embodiment, as shown in
The current amplifier and the gain unit belong to a weight means. The weighting means refers to a means for giving respective weight/gain to the current flowing out from at least one of the third signal lines or digital/analog signal derived from the same. That is, the sensing circuit could include a weighting means for giving respective weight/gain to the current flowing out from at least one of the third signal lines or digital/analog signal derived from the same.
In yet another embodiment, in the embodiment applying the sensing unit 40, the second driving circuit adjusts the first searching voltage VH applied on the second signal lines according to the importance of the bits, to cause the first searching voltage VH applied on different second signal lines to be different of partly the same. For example, the first searching voltage VH applied on the second signal lines corresponding to more importance bit may be greater, and the first searching voltage VH applied on the second signal lines corresponding to less importance bit may be smaller. In an example shown in
The present invention could further implement searching and storing numerical range. Searching numerical range could be implemented by using wildcard in searching. For example, while 110*** (*represents a bit of wildcard) is searched, 110000˜110111 could be matched, That is, the decimal range of 48˜55 could be searched, Storing numerical range could be implemented by using don't care in storing. For example, while 110XXX (X represents a bit of don't care) is stored, it could be matched while 110000˜110111 are searched. That is, the decimal range of 48˜55 is stored.
The amount of the second signal lines would be a great number, the number of data bits that could be stored on each of the first signal lines may achieve page size, for example, 32 kbits, 64 kbits or 128 kbits. In an application, a piece of data could be stored on one first signal line with a number of copies thereof. For example, it is assumed that the memory cells on a first signal line could store 32 kbits data. While a 8 kbits data is to be stored, the 8 kbits data could be stored in the memory cells on a first signal line with three copies of the 8 kbits data so that the first signal line would store four identical data. For example, the 1st˜8000th memory cells store the 8 kbits data, the 8001th˜16000th memory cells store the first copy of the 8 kbit data, the 16001th˜24000th memory cells store the second copy of the 8 kbit data, and the 24001th˜32000th memory cells store the third copy of the 8 kbit data. In this way, the impact of damaged memory cells on the reliability of stored data could be reduced.
The TCAM device and the operation method of the present invention could allow data with longer length by applying searching voltage on the bit lines. Therefore, the present invention could apply to searching of image with high resolution and float point value with high precision. Moreover, weighting the current flowing out from the source lines according to the importance of the corresponding bit could achieve the effect of representing the importance of the bit on the matching result.
While the invention has been described by way of example and in terms of the preferred embodiment (s), it is to be understood that the invention is not limited thereto. On the contrary, it is intended to cover various modifications and similar arrangements and procedures, and the scope of the appended claims therefore should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements and procedures.
