Patent Application
20240212891
The present application claims priority to Korean Patent Application No. 10-2022-0185889 filed Dec. 27, 2022, the entire contents of which are incorporated herein for all purposes by this reference.
The present disclosure generally relates to a thermal resistance device and a method of manufacturing the same. Description of Related Technology
A thermal resistance device is used in a thermal image sensor, a gas sensor, and a temperature sensor such as a bolometer.
The thermal resistance device uses a resistor that converts a temperature change into an electrical signal. The resistor is required to have a large change in resistance with a small change in temperature. Also, the resistor is required to be made of a low-resistance material to reduce noise, that is, Johnson noise.
One aspect is a thermal resistance device having a vanadium oxide layer and including a stress control pattern capable of improving temperature coefficient of resistance (TCR) characteristics, and to a method of manufacturing the thermal resistance device.
Another aspect is a thermal resistance device that includes a support based on silicon and having an opening formed in a center thereof; a silicon oxynitride layer formed on the support to cover the opening; a stress control pattern formed of a patterned metal material on the silicon oxynitride layer over the opening; and a vanadium oxide layer formed to cover the stress control pattern and receiving tensile stress from the stress control pattern.
The vanadium oxide layer may be formed of VOx (1.94≤x≤1.97).
The metal material of the stress control pattern may include at least one of Ti and V.
An area occupied by the stress control pattern in a region where the stress control pattern is formed may be 40 to 60%.
The stress control pattern may be patterned to be long in length and small in width and thickness under the vanadium oxide layer.
The stress control pattern may have a Peano curve structure.
The thermal resistance device may have a temperature coefficient of resistance (TCR) of 2.7% or more.
The thermal resistance device may further include a first protective layer formed to protect the vanadium oxide layer; an electrode layer formed on the first protective layer and electrically connected to the vanadium oxide layer while passing through the first protective layer; a second protective layer formed to protect the electrode layer; an infrared absorption layer formed on the second protective layer over the vanadium oxide layer; and a bonding wire electrically connecting a portion of the electrode layer exposed outside the second protective layer to an external connection terminal.
A material of the silicon oxynitride layer may include SiONO.
A material of the first and second protective layers may include silicon nitride.
A material of the electrode layer may include aluminum.
Another aspect is a method of manufacturing a thermal resistance device that includes preparing a support substrate in which a silicon oxynitride layer is formed on a support based on silicon; forming a stress control pattern by depositing and patterning a metal layer on the silicon oxynitride layer; and forming a vanadium oxide layer to cover the stress control pattern.
According to the present disclosure, in the thermal resistance device, the stress control pattern formed under the vanadium oxide layer provides tensile stress to the vanadium oxide layer, thereby improving the temperature coefficient of resistance (TCR) characteristics of the thermal resistance device.
As the resistor, vanadium oxide, which has a relatively large temperature coefficient of resistance (TCR) and enables a low temperature process, is mainly used. Vanadium oxide exhibits a large change in resistivity because it has metal-to-insulator transition (MIT) characteristics at a specific temperature.
However, vanadium oxide shows a decrease in TCR characteristics when compressive stress is applied to a lower layer. To solve this problem, a low-stress silicon oxynitride (SiONO) substrate is used. The silicon oxynitride (SiONO) layer, which is the lower layer of the vanadium oxide layer, has low stress characteristics, but since the stress is locally different, compressive stress applied to the vanadium oxide layer reduces the TCR characteristics.
Now, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.
However, in the following description and the accompanying drawings, well known techniques may not be described or illustrated in detail to avoid obscuring the subject matter of the present disclosure. Through the drawings, the same or similar reference numerals denote corresponding features consistently.
The terms and words used in the following description, drawings and claims are not limited to the bibliographical meanings thereof and are merely used by the inventor to enable a clear and consistent understanding of the disclosure. Thus, it will be apparent to those skilled in the art that the following description about various embodiments of the present disclosure is provided for illustration purpose only and not for the purpose of limiting the disclosure as defined by the appended claims and their equivalents.
Referring to
The thermal resistance device 100 according to the embodiment includes a support 11, a silicon oxynitride layer 13, the stress control pattern 20, and the vanadium oxide layer 30. The support 11 is based on silicon and has an opening 17 formed in the center thereof. The silicon oxynitride layer 13 is formed on the top of the support 11 to cover the opening 17. The stress control pattern 20 is formed on the silicon oxynitride layer 13 over the opening 17 by patterning a metal material. The vanadium oxide layer 30 is formed to cover the stress control pattern 20 and receives tensile stress from the stress control pattern 20.
According to the embodiment, by forming the stress control pattern 20 that provides tensile stress at the bottom of the vanadium oxide layer 30, it is possible to improve the temperature coefficient of resistance (TCR) of the thermal resistance device 100.
In addition, the thermal resistance device 100 according to the embodiment may further include a first protective layer 40, an electrode layer 50, a second protective layer 60, an infrared absorption layer 70, and a bonding wire 80.
Hereinafter, the thermal resistance device 100 according to the embodiment will be described in detail.
The support 11 and the silicon oxynitride layer 13 may be provided as a support substrate 10. The support substrate 10 may have a structure in which silicon oxynitride layers 13 and 15 are formed on both sides of the support 11.
The silicon oxynitride layers 13 and 15 formed on both sides of the support 11 include the first silicon oxynitride layer 13 formed on the upper surface of the support 11, and the second silicon oxynitride layer 15 formed on the lower surface of the support 11. The vanadium oxide layer 30 is formed on the first silicon oxynitride layer 13.
The opening 17 is formed in the central portion of the support substrate 10. The opening 17 may be formed by etching a corresponding portion of the support 11 under the first silicon oxynitride layer 13 through the lower surface of the support substrate 10, that is, through the second silicon oxynitride layer 15. The lower surface of the first silicon oxynitride layer 13 is exposed through the opening 17.
The support 11 may be a wafer made of silicon. The thickness of the support 11 may be 100 to 500 μm.
The first and second silicon oxynitride layers 13 and 15 are based on SixOyNz material and may be formed of, for example, a low-stress SiONO material. The thickness of the first and second silicon oxynitride layers 13 and 15 may be 6,000 to 10,000 Å.
The stress control pattern 20 and the vanadium oxide layer 30 are formed on the first silicon oxynitride layer 13 exposed to the opening 17. That is, the stress control pattern 20 is formed on the first silicon oxynitride layer 13, and the vanadium oxide layer 30 is formed on the first silicon oxynitride layer 13 to cover the stress control pattern 20.
The stress control pattern 20 may be formed by depositing a metal layer on the first silicon oxynitride layer 13 and then patterning the metal layer. At least one of Ti and V may be used as a material of the metal layer. The metal layer may be formed through physical or chemical vapor deposition. The area occupied by the stress control pattern 20 in a region where the stress control pattern 20 is formed may be 40 to 60%.
The stress control pattern 20 provides tensile stress to the vanadium oxide layer 30 through its material and pattern structure, thereby allowing the temperature coefficient of resistance (TCR) characteristics of the thermal resistance device 100 to be improved. According to the embodiment, the thermal resistance device 100 including the stress control pattern 20 has a temperature coefficient of resistance (TCR) of 2.7% or more. For example, the stress control pattern 20 may have a Peano curve structure. When the stress control pattern 20 was formed in a Peano curve structure using Ti, the temperature coefficient of resistance (TCR) was measured to be 2.8%.
In each of Comparative Example 1, Comparative Example 2, and Experimental Example, the vanadium oxide layer 30 was formed on the first silicon oxynitride layer 13 with an area of 250×250 Å. The vanadium oxide layer 30 was commonly formed to have a thickness of 1,000 Å on the first silicon oxynitride layer 13 with a thickness of 8,000 Å.
In Comparative Example 1, the vanadium oxide layer 30 was formed directly on the first silicon oxynitride layer 13.
In Comparative Example 2, after a metal layer made of Ti was formed on the first silicon oxynitride layer 13, the vanadium oxide layer 30 was formed directly on the metal layer without patterning.
In Experimental Example, as in the embodiment, a metal layer made of Ti was formed on the first silicon oxynitride layer 13 and patterned as a Peano curve structure to form the stress control pattern 20, and then the vanadium oxide layer 30 was formed to cover the stress control pattern 20.
The tensile stress of the thermal resistance device according to Comparative Example 1 was measured as 370 MPa.
The tensile stress of the thermal resistance device according to Comparative Example 2 was measured as 372 MPa. That is, it can be seen that there is almost no difference in stress between Comparative Examples 1 and 2.
On the other hand, the tensile stress of the thermal resistance device according to Experimental Example was measured as 460 MPa. That is, it is determined that the stress control pattern 20 formed by patterning the metal layer into a Peano curve structure provides tensile stress to the vanadium oxide layer 30.
The thermal resistance devices according to Comparative Examples 1 and 2 were measured to have a temperature coefficient of resistance (TCR) of 2.6%. On the other hand, the temperature coefficient of resistance (TCR) of the thermal resistance device according to Experimental Example was measured to be 2.76%.
The vanadium oxide layer 30 is formed to cover the stress control pattern 20. The vanadium oxide layer 30 is formed of VOx (1.94≤x≤1.97). The vanadium oxide layer 30 may have a thickness of 800 to 1,200 Å.
Because the stress control pattern 20 is formed within the vanadium oxide layer 30, its thickness is smaller than that of the vanadium oxide layer 30. The stress control pattern 20 may be patterned to be long in length and small in width and thickness to effectively provide tensile stress to the vanadium oxide layer 30.
The first protective layer 40 is formed on the entire upper surface of the support substrate 10 to protect the vanadium oxide layer 30 from the external environment.
That is, the first protective layer 40 is formed to cover the first silicon oxynitride layer 13 and the vanadium oxide layer 30. The first protective layer 40 has a first connection hole 41 through which the electrode layer 50 can be connected to the vanadium oxide layer 30. A portion of the vanadium oxide layer 30 is exposed to the outside of the first protective layer 40 through the first connection hole 41. Silicon nitride (SiNx) may be used as a material of the first protective layer 40. The thickness of the first protective layer 40 may be 8,000 to 12,000 Å.
The first connection hole 41 may be formed near the edge of the vanadium oxide layer 30 in order to minimize the influence on the vanadium oxide layer 30 by the electrode layer 50 formed on the first protective layer 40.
The electrode layer 50 is formed on the first protective layer 40 and is electrically connected to the vanadium oxide layer 30 through the first connection hole 41. The electrode layer 50 may be formed of aluminum material. The thickness of the electrode layer 50 may be 2,000 to 4,000 Å.
The second protective layer 60 is formed on the entire upper surface of the support substrate 10 to protect the electrode layer 50 from the external environment. That is, the second protective layer 60 is formed to cover the first protective layer 40 and the metal layer. The second protective layer 60 has a second connection hole 61 through which the bonding wire 80 can be connected to the electrode layer 50. An electrode pad 51, which is a portion of the electrode layer 50, is exposed to the outside of the second protective layer 60 through the second connection hole 61. Silicon nitride (SiNx) may be used as a material of the second protective layer 60. The thickness of the second protective layer 60 may be 2,000 to 4,000 Å.
The infrared absorption layer 70 is formed on the second protective layer 60 over the vanadium oxide layer 30 so that the vanadium oxide layer 30 can respond sensitively to external temperature changes.
The bonding wire 80 electrically connects the electrode pad 51 of the electrode layer 50 exposed to the second connection hole 61 to an external connection terminal (not shown). The bonding wire 80 may use, as a material thereof, gold (Au), aluminum (Al), copper (Cu), or the like.
As described above, according to the embodiment, the stress control pattern 20 is formed under the vanadium oxide layer 30 to provide tensile stress to the vanadium oxide layer 30, thereby improving the temperature coefficient of resistance (TCR) characteristics of the thermal resistance device 100 including the vanadium oxide layer 30.
Hereinafter, a method of manufacturing the thermal resistance device 100 according to the embodiment will be described with reference to
The thermal resistance device 100 can be manufactured using a MEMS (micro-electro mechanical systems) process used in a semiconductor manufacturing process. Layers on the support substrate 10 can be formed using a physical or chemical vapor deposition process. For patterning of such layers, a photoetching process via a photoresist film can be used.
First, as shown in
Next, as shown in
Next, as shown in
Next, as shown in
Next, as shown in
Then, patterning of the first protective layer 40 forms a first connection hole 41 through which an electrode layer 50 can be connected to the vanadium oxide layer 30. The first connection hole 41 is formed near the edge of the vanadium oxide layer 30, and a portion of the vanadium oxide layer 30 is exposed to the outside of the first protective layer 40 through the first connection hole 41.
Next, as shown in
Next, as shown in
Here, the electrode pad 51 of the electrode layer 50 may be formed near the edge of the upper surface of the second protective layer 60. The reason will be explained later in the wire bonding process.
Next, as shown in
Next, as shown in
Thereafter, as shown in
Meanwhile, the electrode pad 51 of the electrode layer 50 is formed on a portion of the first silicon oxynitride layer 13 outside the opening 17 so that it can be stably supported by the support 11. Normally, the process of bonding the bonding wire 80 to the electrode pad 51 causes a load. So, if the electrode pad 51 is formed on a portion of the first silicon oxynitride layer 13 within a region of the opening 17, the vanadium oxide layer 30 located thereunder may be damaged during the wire bonding process. For this reason, the electrode pad 51 of the electrode layer 50 is formed to be located outside the opening 17. As a result, the electrode pad 51 is supported by the support 11 and the first and second silicon oxynitride layers 13 and 15 that constitute the support substrate 10.
While the present disclosure has been particularly shown and described with reference to an exemplary embodiment thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the scope of the present disclosure as defined by the appended claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10-2022-0185889 | Dec 2022 | KR | national |
