1. Field of the Invention
The present invention relates to a thin film resistor element and a manufacturing method thereof, more particularly, to a thin film resistor element and a manufacturing method thereof using the wafer level chip size package technology.
This is a counterpart of Japanese patent application Serial Number 117576/2008, filed on Apr. 28, 2008, the subject matter of which is incorporated herein by reference.
2. Description of the Related Art
Regarding mobile communication equipments, more requests for higher functions and downsizing have been made progressively, and furthermore, development of lower-power-consumption electric components for the mobile communication equipments has become an important problem, in a prediction that stable operations thereof using longer-life batteries and the energy regeneration technology will become necessary.
According to the Japanese Patent Application Laid-Open Publication No. 2006-186038 and No. 2005-136360, the technology for improving packaging density by forming and integrating resistors, inductors, or capacitors in higher density in insulating films, corresponding to the above-mentioned requests.
In addition, to the above-mentioned requests for lower power consumption, LSIs using the CMOS process technology have become remarkable as higher-frequency analog ICs of radio wave communications. In higher-frequency analog LSIs, voltage-controlled oscillators (VCOs) used for local oscillators are blocks consuming extra-large currents, and lower current consumption VCOs are considered to be effective to reduce the power consumption of the whole chip.
However, since the conventional VCOs uses polysilicon formed at the same time as the gate electrodes formed as resistors, the above resistors lie in between in the vicinity of the substrate. That is, parasitic capacitances between the substrate and the resistors are large, and then quality factor (Q-value) of the passive elements of the VCOs decreases.
In a typical VCO, passive elements such as inductors, varactors, or resistors are formed on-chip. Since the VCO oscillates theoretically by resonance caused by LC, the higher O-value have the inductors and the varactors, the smaller loss has the resonance circuit, and then it becomes possible that an oscillation using smaller current realizes lower power consumption.
As one of the above passive elements, the varactor varies the capacitance by an applied DC bias voltage, and a resistor of around 3000Ω is usually inserted to a control terminal for applying the DC bias voltage in order to prevent high-frequency signal leakage to the above control terminal. In the case where the above resistor has ideal resistor characteristics, the above-mentioned higher Q-value can be obtained.
Generally, polysilicon used for forming gates of transistors is used as the on-chip resistors inserted between the varactors. Since the polysilicon is formed on a lower layer of wafer process, the distance to the substrate is short. Consequently, a parasitic capacitance is equivalently loaded between the grounds points by capacitive connections between the resistors and the substrate. Subsequently, the impedance decreases in higher frequency region, and an apparent Q-value of the varactor decreases.
The present invention has been made in consideration of the above-mentioned problem, and the object is to provide a thin-film resistor element and a manicuring method thereof that can restrain reduction of the Q-value by reducing a parasitic capacitance between the resistor and the substrate.
Through scrutinizing, it has been found that using thin-film resistors and a manufacturing method thereof as described below can solve the above-mentioned problem, and the above objective has been achieved.
According to the present invention, the above-mentioned thin-film resistor is characterized by comprising a semiconductor substrate including an integrated circuit having a plurality of stacked interconnection layers, a plurality of electrode pads placed in a distance from each other in the most upper part of a plurality of stacked interconnection layers, and a passivation film formed between the plurality of electrode pads, a secondly interconnections electrically connected to the above electrode pads, an insulating film formed in a place in between the secondly interconnections on the passivation film, and a resistor formed in a predetermined place in between the secondly interconnections on the insulating film plane.
The above-mentioned thin-film resistor manufacturing method is characterized by comprising a first step of forming an integrated circuit having a plurality of stacked interconnection layers, a plurality of electrode pads placed in a distance from each other in the most upper part of a plurality of stacked interconnection layers, and a passivation film formed between the plurality of electrode pads, and of patterning so as to expose the surface of the electrode pads after forming the insulating film on the electrode pads and on the passivation film, a second step of stacking a resistor layer on the exposed electrode pads and the insulating film, a third step of forming the secondly interconnections after forming a first resist through the intermediary of the resistor layer on the insulating film, and a forth step of forming a second resist through the intermediary of the resistor layer in a predetermined place for the resistor of the insulating film after removing the first resist, and a fifth step of removing the second resist after removing the exposed resistor layer not coated with the second resist.
The present invention can provide a thin-film resistor and a manufacturing method thereof having a capability of reducing parasitic capacitances between the resistors and the substrate without increasing the Q-value of the varactors.
The above and other objects and new features of the present invention will become readily apparent from the following detailed description with reference to the accompanying drawings, wherein:
Embodiments of the present invention will be explained in details with reference to the accompanying drawings, as below. The drawings generally show shapes, dimensions, and arrangements of the elements at least to the extent of understanding the present invention, and the present invention is not limited to the drawings.
In other words, the thin-film resitor of the present invention is characterized by a configuration that the distance between the resistor 26 and the semiconductor substrate 10 is made as large as possible. Since the above-motioned configuration can restrain increasing of a parasitic capacitance caused by capacitive connection between the semiconductor substrate 10 and the resistor 26, decreasing of the Q-value of the varactors can be restrained.
It is preferable that the thin-film resistor of the present invention is used mainly for a voltage-controlled oscillator (hereinafter referred as “VCO” accordingly”. The VCO is a circuit block being used for a local oscillator of a high-frequency analog LSI and consuming a large current.
Subsequently,
The relationship between the parasitic capacitance arising between the resistor 26 and the semiconductor substrate 10 and the Q-value of the varactor 30 will be explained in details as follows.
A circuit of
Since a distance between the semiconductor substrate and the resistor is small, as shown in
As a configuration easy to make the above effect, it is preferable to form the resistor 26 and the semiconductor substrate 10 in a distance of more than 10 μm.
The above-mentioned distance between the resistor 26 and the semiconductor substrate 10 is a distance x between a contact point 40 between a perpendicular of the semiconductor substrate 10 and a plane on the integrated circuit 12 side of the semiconductor substrate 10 and a contact point 50 between the above perpendicular and a plane on the insulating film 20 side of the resistor 26, as shown in
The resistor and the insulating film used in the thin-film resistor element according to the present invention will be explained in details as follows.
A resistor used for a thin-film resistor of the invention can be formed separately on the insulating film 20, or can have a configuration where two layers of the barrier metal layer 22 and a seed layer 24 are sequentially stacked, as shown in
The barrier metal layer 22 is a layer for increasing adhesiveness between the electrode pad 14 and the secondary interconnection 18. A material of the above barrier metal layer 22 can be selected accordingly to the material of the electrode pad 14 or the secondary interconnection 18, and Ti, TiN, Ni, etc. can be taken as an example. The seed layer 24 is a layer used as an electrode for forming the secondary interconnection 18 by a plating method. Therefore, it is preferable to use a low-resistance material; it is more preferable to use the same material as the material of the secondary interconnection 18, and Cu, Al can betaken as an example. A thickness of the seed layer 24 does not need to have a specific value as long as the thickness allows the secondary interconnection 18 to be formed by a plating method.
As explained before, a configuration consisting of the barrier metal layer 22 and the seed layer 24 can be taken as an example for forming the resistor 26. Also, a resistance of the resistor 26 can be adjusted accordingly by the thickness of the above layers.
Regarding the thin-film resistor element of the invention, in order to form the above-mentioned resistor 26 in a long distance as possible from the semiconductor substrate 10, an insulating film is further formed on the integrated circuit and the resistor 26 is formed on the insulating film. In other words, the thicker the thickness of the insulating film has, the longer the distance between the resistor 26 and the semiconductor substrate 10 becomes, and then it becomes possible to reduce the parasitic capacitance arising between the resistor 26 and the semiconductor substrate 10.
The thickness of the above insulating film having a value more than 5 μm is preferable. Also, as the upper limit of the thickness, no specific thickness value is necessary, as long as the thickness can respond to a request for a thinner device.
Furthermore, as a material of the insulating film, conventionally-used polymide resin, epoxi resin, etc. can be used.
An examination result of the control-voltage dependence of the Q-values of two MOS varactors is shown in
As shown in
A thin film resistor element of the second embodiment has a configuration where the seed layer 24, which composes the resistor 26 of thin-film resistor element of the first embodiment, is not formed, and the resistor 26 is composed only with the barrier metal layer 22.
As explained before, since it is preferable that the seed layer is formed by the same material as the secondary interconnections, the resistance of the resistor is small. Therefore, the resistance decreases in the case of including the seed layer, and then a resistor having a further higher resistance becomes necessary accordingly to the VCO specification. In the above case, there is some possibility that a required resistance cannot be obtained due to the seed layer even when the resistance of the resistor increases by increasing the thickness of the barrier metal layer. In order to obtain the higher resistance, only the barrier metal layer 22 can compose a resistor 26 without the seed layer 24 having a lower resistance. A further higher resistance can be obtained by increasing the thickness of the barrier metal layer 22.
In addition, the thin-film resistor element of the second embodiment can restrain the reduction of the Q-value of the varactor because the semiconductor substrate and the resistor are formed in a distance as in the first embodiment, and then it is obvious that the same result can be obtained as in
A manufacturing method of the thin-film resistor element according to the first embodiment is characterized by using a layer used for forming the secondary interconnections as a resistor. In other words, in the conventional case where a polysilicon is used for the resistor, the polysilicon needs to be separately formed in order to obtain an enough distance between the semiconductor substrate and the resistor. Meanwhile, according to the present invention, a step of forming the resistor can be omitted by using a layer conventionally used for forming the secondary interconnections as the resistor.
A manufacturing method of a thin-film according to the present invention will be explained in details with reference to the process cross section of
The first step of the present invention is a step of patterning the electrode pad 14 so as to expose the surface thereof after forming the integrated circuit 12 having the plurality of electrode pads 14 placed in a distance from each other in the most upper part of the plurality of stacked interconnections and the passivation film 16 formed between the plurality of electrode pads 14, and forming the insulating film 20 on the electrode pads 14 and the passivation film 16. First, through a final wafer process, the integrated circuit 12 is formed by placing a plurality of electrode pads in a distance from each other and forming the passivation film 16 on the semiconductor substrate 10. Since the above passivation film 16 is formed using photolithography and dry etching so as to make an aperture in a part of the surface of the electrode pad 14 after the passivation film 16 is stacked on the electrode pads 14 and the integrated circuit 12, an edge of the passivation film 16 is formed so as to cover an edge of the electrode pad 14, as shown in
Subsequently, the insulating film 20 is formed on the electrode pads 14 and the passivation film 16, an aperture is made the surface of the electrode 14 by photolithography and dry etching. In the above process, the insulating film 20 is formed so as to cover the passivation film 16 so that the secondary interconnections (not shown in
The second step of the present invention is a step of stacking a resistor layer on the exposed electrode pad 14 and the insulating film 20.
As shown in
In addition, since the above layers composes the resistor described below, a step of forming the resistor separately in the conventional manufacturing method can be omitted. Also, since the barrier metal layer 22 and the seed layer 24 have the aforementioned functions, the layers are stacked in the order of the barrier metal layer and the seed layer 24. Thickness and materials of the above layers are the same as described before.
The third step of the present invention is a step of forming the secondary interconnections 18 after forming a first resist 27 on the insulating layer 20 through the intermediary of the resistor layer 25.
As shown in
It is preferable that the width of the first resist 27 is smaller than the width of the insulating film 20, as shown in
The forth step of the present invention is a step of forming a second resist 28 at a predetermined location for forming the resistor on the insulating film 20a through the intermediary of the resistor layer 25 by removing the first resist 27.
In the above step, the resist is coated on the resistor layer 25 and the secondary interconnection 18 after removing the first resist 27 formed in the process of
In the present invention, it is preferable that the second resist 28 is formed so as to cover the edges of the secondary interconnection 18 as shown in
The fifth step of the preset invention is a step of removing the second resist 28 after removing the exposed resistor layer 25 not coated with the second resist 28.
As shown in
In the case where the seed layer 24 of the resistor 26 is formed by the same material as the secondary interconnection 18, a problem may arise that since the thickness of the secondary interconnection 18 is reduced only by the thickness of the seed layer 24 in the case of removing the exposed seed layer 24 where the formed second resist 28 is not formed, the resistance of the resistor 18 increases. However, the thickness of the secondary interconnection 18 is thicker than the seed layer 24 and has around several microns. Consequently, even when the thickness of the secondary interconnection 18 is reduced by the thickness of the seed layer 24, the resistance increase only slightly and an influence on the whole VCO caused by the Joule heat, etc. can be neglected.
A manufacturing method of the thin-film resistor element according to the second embodiment of the present invention includes a sixth step of removing the seed layer 24 composing the resistor after the aforementioned fifth step, and other steps than the sixth step are the same as the manufacturing method of the thin-film resistor element according to the first embodiment. The seed layer can be removed by the publicly known dry etching method similarly as described before.
In addition, since it is preferable that the seed layer 24 is formed by the same material as the secondary interconnection layer, the thickness of the secondary interconnection is reduced by removing the seed layer. However, the thickness of the secondary interconnection 18 is thicker than the seed layer 24 and has around several microns. Therefore, even when the thickness of the secondary interconnection 18 is reduced by the thickness of the seed layer 24, the resistance increase only slightly and an influence on the whole VCO caused by the Joule heat, etc. can be neglected.
Consequently, the resistance of the resistor can be increased easily by removing the seed layer 24.
Number | Date | Country | Kind |
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2008-117576 | Apr 2008 | JP | national |