This application claims priority to and the benefit of Korean Patent Application No. 10-2011-0093029 filed in the Korean Intellectual Property Office on Sep. 15, 2011, the entire contents of which are incorporated herein by reference.
1. Field
The present disclosure relates to a thin film solar cell module.
2. Related Art
Recently, as it is expected that conventional energy resources such as petroleum and coal will be exhausted, interest in alternative energy replacing the conventional energy resources is gradually increasing.
Although single crystal bulk silicon using a silicon wafer is commercially used today, the problem is that manufacturing cost thereof is expensive and thus, the single crystal bulk silicon is not widely used.
In order to solve this problem, research for a thin film solar cell is actively being conducted. Particularly, a thin film solar cell using an amorphous silicon (a-Si:H) is a technology for a large area solar cell module with low cost and thus, is being spotlighted.
Accordingly, one object is to address the above-noted and other drawbacks of the related art.
Another object is to provide a solar cell module including a substrate; a plurality of first cells positioned in a central region, one or more first cells including at least one photovoltaic unit; and a plurality of second cells positioned in edge regions of the substrate, one or more second cells including at least one photovoltaic unit; wherein among the photovoltaic units positioned in the same layer the photovoltaic unit of the one or more second cells has higher band gap energy than that the photovoltaic unit of the one or more first cells. The one or more first cells and the one or more second cells may include a same number of photovoltaic units.
The voltage relative amount {(voltage of second cell)/(voltage of first cell)} and current relative amount {(current of first cell)/(current of second cell)} of the one or more first cells and the one or more second cells are 100% to 120%, preferably, voltage relative amount {(voltage of second cell)/(voltage of first cell)} and current relative amount {(current of first cell)/(current of second cell)} of the one or more first cells and the one or more second cells are 102% to 105%.
Voltage of the one or more second cells is higher than voltage of the one or more first cells and current of the one or more second cells is higher than current of the one or more first cells.
The one or more second cells may be positioned within 4 cm from an edge of the substrate.
The photovoltaic unit of the one or more first cells and the photovoltaic unit of the one or more second cells in the same layer comprise one or more intrinsic semiconductor layers containing amorphous silicon germanium (a-SiGe), and the one or more intrinsic semiconductor layers of the one or more first cells contain germanium with higher concentration than that of the one or more intrinsic semiconductor layers of the one or more second cells.
The concentration of germanium contained in the one or more intrinsic semiconductor layers of the one or more first cells is reduced as the one or more first cells are closer to the edge regions and the band gap energy of the one or more intrinsic semiconductor layers of the one or more first cells increases as the one or more first cells are closer to the edge regions.
The photovoltaic unit of the one or more first cells and the photovoltaic unit of the one or more second cells in the same layer comprise one or more intrinsic semiconductor layers containing micro crystalline silicon (μ c-Si). In this case, the one or more intrinsic semiconductor layers of the one or more first cells contain germanium with higher crystallinity than that of the one or more intrinsic semiconductor layers of the one or more second cells and crystallinity of the one or more second cells is lower than crystallinity of the one or more first cells by 7% to 10%.
The thin film solar cell module further includes one or more seed layers coming in contact with the one or more intrinsic semiconductor layers of the one or more first cells; and one or more seed layers coming in contact with the one or more intrinsic semiconductor layers of the one or more second cells and the one or more seed layers of the one or more first cells have higher crystallinity than that of the one or more seed layers of the one or more second cells.
According one aspect, since band gap energy of the photovoltaic units of the plurality of second cells that are positioned in an edge region of the substrate is higher than that the photovoltaic units of the plurality of first cells that are positioned in the central region of the substrate, the voltage of the second cells is increased relatively than that of the first cells and current of the second cells is reduced relatively than that of the first cells.
Therefore, when the band gap energy of the photovoltaic units of the first cells and the second cells is controlled such that voltage relative amount and current relative amount become 100% or more and 120% or more respectively, efficiency of the thin film solar cell increases.
The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principle of the invention. In the drawings:
Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting the scope of the invention.
The preferred embodiments of the present invention will be described in detail with reference to accompanying drawings such that those skilled in the art may fully understand the concept of the present invention. However, various changes in form and detail may be made without departing from the spirit and scope of the invention. Throughout this specification, like reference numerals may be used to refer to like elements.
Hereinafter, throughout the drawings, in order to illustrate several layers and regions clearly, thickness may be enlarged. When a layer, a film, a region, and a plate are “on” another element, it includes not only a case when the respective elements are “directly” on another element but may include a case when the respective elements are at intermediate portion thereof. On the contrary, a case when a certain element is “directly” on another element means that there is no element at the intermediate portion.
On the contrary, a case when a certain element is “directly” on another element means that there is no element at the intermediate portion. In addition, a case when a certain element is formed on another element entirely may include a case when the element is formed not only on the entire surface (or whole surface) of another element but at some of an edge.
Hereinafter, a thin film solar cell module according to an embodiment of the present invention will be described with reference to the accompanying drawings.
Referring to
The substrate 100 includes a central region A1 and an edge region A2 positioned at edge of the central region A1 and the plurality of thin film solar cells 200 are positioned in the central region A1 and the edge region A2 respectively.
Hereinafter, to simplify the disclosure, the plurality of thin film solar cells positioned in the central region A1 are referred to as first cells C1 and the plurality of thin film solar cells positioned in the edge region A2 are referred to as second cells C2.
In general, large area solar cells of 1.1*1.3 m2, 1.1*1.4 m2, 2.2*2.6 m2 are dealt in markets and thin film solar cells of 1.1*1.3 m2 and 1.1*1.4 m2 may include 100 or more cells.
The intention here is to control characteristics of the first cells C1 and the second cells C2 to improve efficiency of the large area thin film solar cell module. In this disclosure, the second cells C2 may be cells positioned in the edge region A2 within 4 cm from the edge of the substrate and the first cells C1 may be cells positioned in the central region A1 between the edge regions A2. Therefore, the first cells C1 may be the rest of the cells excluding the second cells C2.
Hereinabove, although the edge regions A2 are spaced apart from the edge of the substrate by 4 cm, the edge regions A2 may be increased as the module increases in size.
Referring to
Hereinafter, a thin film solar cell module in which the voltage relative amount and the current relative amount satisfy the above-mentioned range will be described.
In this embodiment, since the first cells and the second cells have the same structure, hereinafter only the sectional structure of the first cells will be described.
As illustrated in
The first electrode 110 may be made of transparent conductive material such as one selected from a group of consisting of silicon oxide SnO2, zinc oxide AnO, or indium tin oxide ITO. In addition, the first electrode 110 may be made of mixture in which one or more impurity is mixed with the transparent conductive material.
The photovoltaic unit PV positioned on the first electrode 110 converts light entering an incident surface of the substrate 100 into electricity and may be one of a single junction type structure, a double junction type structure, and triple junction structure. In this embodiment, the double junction type photovoltaic unit will be described.
The photovoltaic unit PV of this embodiment further includes a first photovoltaic unit PV1 positioned on the first electrode 110 and a second photovoltaic unit PV2 positioned between the first photovoltaic unit PV1 and the second electrode 120.
The first photovoltaic unit PV1 includes amorphous silicon a-Si and generally absorbs light of short wavelength band such as near ultraviolet rays, violet rays, and blue rays.
This first photovoltaic unit PV1 includes a first P-type semiconductor layer PV1-1, a first intrinsic semiconductor layer PV1-2, and a first N-type semiconductor layer PV1-3 that are sequentially formed on the first electrode 120.
The first P-type semiconductor layer PV1-1 may be made by mixing gas containing triad impurity such as boron, gallium, and indium with source gas containing silicon Si. In this embodiment, the first P-type semiconductor layer PV1-1 may be made of a-Si or a-Si:H.
The intrinsic semiconductor layer PV1-2 is to reduce recombination of carriers and to absorb light, wherein the carriers such as electrons and holes are generated therefrom. The first intrinsic semiconductor layer PV1-2 may be made of a-Si or a-Si:H and may have a thickness of about 200 nm to 300 nm.
The first N-type semiconductor layer PV1-3 may be made by mixing gas containing pentads impurity such as phosphorus P, arsenic As, and antimony Sb with source gas containing silicon.
This first photovoltaic unit PV1 may be made by chemical vapor deposition (CVD) such as plasma enhanced chemical vapor deposition (PECVD).
The semiconductor layers such as the first P-type semiconductor layer PV1-1 and the first N-type semiconductor layer PV1-3 of the first photovoltaic unit PV1 form a P-N junction interposing the first intrinsic semiconductor layer PV1-2 therebetween. Electrons and holes are generated from the first intrinsic semiconductor layer PV1-2 due to photovoltaic effect caused by the P-N junction which separates the electrons and the holes from each other by contact voltage difference and causes the electrons and the holes to migrate in different directions.
For example, the holes migrate toward the first electrode 110 through the first P-type semiconductor layer PV1-1 and the electrons migrate toward the second electrode 120 through the first N-type semiconductor layer PV1-3.
The second photovoltaic unit PV2 may include micro crystalline silicon μ c-Si and generally may absorb light of long wavelength band from red to near infrared rays.
The second photovoltaic unit PV2 may include a second P-type semiconductor layer PV2-1, a second intrinsic semiconductor layer PV2-2, and a second N-type semiconductor layer PV2-3 that are sequentially formed on the first N-type semiconductor layer PV1-3 of the first photovoltaic unit PV1. This may be made by CVD such as PECVD like the case of the first photovoltaic unit PV1.
The second P-type semiconductor layer PV2-1 may be made by mixing gas containing triad impurity such as boron, gallium, and indium with source gas containing silicon.
The second intrinsic semiconductor layer PV2-2 is to reduce recombination of carriers and to absorb light. Due to this, the second intrinsic semiconductor layer PV2-2 generally absorbs applied light of long wavelength band and generates electrons and holes.
In this embodiment, the second intrinsic semiconductor layer PV2-2 may be made of micro crystalline silicon μ c-Si or doped micro crystalline silicon μ c-Si:H and may be thicker than the first intrinsic semiconductor layer PV1-2 in order to sufficiently absorb solar light of long wavelength.
The second N-type semiconductor layer PV2-3 may be made by mixing gas containing pentads impurity such as phosphorus P, arsenic As, and antimony Sb with source gas containing silicon.
The second P-type semiconductor layer PV2-1 and the second N-type semiconductor layer PV2-3 of the second photovoltaic unit PV2 form P-N junction interposing the second intrinsic semiconductor layer PV2-2 therebetween, and electrons and holes are generated from the second intrinsic semiconductor layer PV2-2 due to photovoltaic effect caused by the P-N junction. The holes migrate toward the first electrode 110 to be collected and the electrons migrate toward the second electrode 120 through the second N-type semiconductor layer PV2-3 to be collected.
The second electrode 120 positioned on the photovoltaic unit PV may be made of one selected from a group including gold Au, silver Ag, and aluminum Al and may further include a reflecting layer for reflecting light unabsorbed by the photovoltaic unit PV toward the photovoltaic unit PV.
In the thin film solar cell module having the above-described cells, voltage relative amount {(voltage of second cell)/(voltage of first cell)} and current relative amount {(current of first cell)/(current of second cell)} of the first cell and the second cell satisfy 100% to 120% respectively, preferably, the voltage relative amount {(voltage of second cell)/(voltage of first cell)} and the current relative amount {(current of first cell)/(current of second cell)} of the first cell and the second cell satisfy 102% to 105% respectively.
In order for the voltage relative amount and the current relative amount to satisfy the above-mentioned ranges, in this embodiment, band gap energy of the second intrinsic semiconductor layer PV2-2 of the first cell C1 and the second intrinsic semiconductor layer PV2-2 of the second cell C2 have different amount.
In more detail, the band gap energy of the second intrinsic semiconductor layer PV2-2 of the second cell C2 is greater than band gap energy of the second intrinsic semiconductor layer PV2-2 of the first cell C1. Therefore, voltage of the second cell C2 is higher than voltage of the first cell C1 and current of the first cell C1 is higher than current of the second cell C2.
Here, in order to make the band gap energy of the second intrinsic semiconductor layer PV2-2 of the second cell C2 higher than the band gap energy of the second intrinsic semiconductor layer PV2-2 of the first cell C1, crystallinity of the second intrinsic semiconductor layer PV2-2 of the first cell C1 is higher than crystallinity of the second intrinsic semiconductor layer PV2-2 of the second cell C2.
The crystallinity of the second intrinsic semiconductor layer PV2-2 is measured using Raman and following Table 1 lists voltage relative amount, current relative amount, and efficiency according to crystallinity of the second intrinsic semiconductor layer PV2-2.
Referring to Table 1, efficiency is remarkably reduced when the voltage relative amount and the current relative amount are less than 100% and exceed 120% respectively. Efficiency is excellent when the voltage relative amount and the current relative amount are greater than 100% and less than 120% respectively.
Particularly, the efficiency is the best when the voltage relative amount and the current relative amount are greater than 103% and less than 105%. Referring to Table. 1, crystallinity of the second intrinsic semiconductor layer PV2-2 of the second cell C2 is lower than crystallinity of the second intrinsic semiconductor layer PV2-2 of the first cell C1 by 7% to 10% when the voltage relative amount and the current relative amount is greater than 103% and less than 105%. Therefore, it is preferred that crystallinity of the second intrinsic semiconductor layer PV2-2 of the second cell C2 is lower than crystallinity of the second intrinsic semiconductor layer PV2-2 of the first cell C1 by 7% to 10%.
In a cell having the triple junction type photovoltaic unit, the first photovoltaic unit may include amorphous silicon, the second photovoltaic unit may include amorphous silicon germanium a-SiGe or microcrystal silicon μ c-Si, and a third photovoltaic unit may include microcrystal silicon μ c-Si or microcrystal silicon germanium μ a-SiGe.
In this embodiment, a case where the first photovoltaic unit PV1 includes amorphous silicon and the second photovoltaic unit PV2 includes amorphous silicon germanium, and the third photovoltaic unit PV3 includes microcrystal silicon will be described.
Since the first to second photovoltaic units PV1, and PV2 have P-I-N structure like the embodiment illustrated in
The third photovoltaic unit PV3 may include a third P-type semiconductor layer PV3-1, a third intrinsic semiconductor layer PV3-2, and a third N-type semiconductor layer PV3-3.
Since light that is not absorbed by the first photovoltaic unit PV1 and the second photovoltaic unit PV2 enters the triple junction type photovoltaic unit PV3, a small amount of light enters the third intrinsic semiconductor layer PV3-2. Therefore, sufficient light absorption is achieved when the third intrinsic semiconductor layer PV2-3 is thicker than the second intrinsic semiconductor layer PV2-2. Therefore, in this embodiment, the third intrinsic semiconductor layer PV2-3 may be made with thickness of 2 μm to 3 μm. For reference, in the embodiment illustrated in
Although not illustrated, an intermediate reflecting layer may be disposed between the second photovoltaic unit PV2 and the third photovoltaic unit PV3.
In the cell having this structure, in order to adjust the voltage relative amount and the current relative amount by controlling voltage and current of the first cell C1 and the second cell C2, crystallinity of the third intrinsic semiconductor layer PV3-2 of the first cell C1 and the third intrinsic semiconductor layer PV3-2 of the second cell C2 is adjusted in a method similar to that in the embodiment illustrated in
Referring to Table 2, Table 2 is similar to Table 1 indicating the result of the embodiment illustrated in
That is, efficiency is remarkably reduced when voltage relative amount and current relative amount are less than 100% and exceed 120%, but excellent when voltage relative amount and current relative amount are greater than 100% and less than 120%.
In addition, efficiency is the best when voltage relative amount and current relative amount are greater than 102% and less than 105%. To this end, it is preferred that crystallinity of the second intrinsic semiconductor layer PV2-2 of the second cell C2 is lower than crystallinity of the second intrinsic semiconductor layer PV2-2 of the first cell C1 by 7% to 10%.
Hereinabove, although a case where crystallinity of the third intrinsic semiconductor layer PV3-2 of the third photovoltaic unit PV3 is different from those of the first cell C1 and the second cell C2 has been described, it is possible that band gap energy of the second intrinsic semiconductor layer PV2-2 of the first cell C1 and the second intrinsic semiconductor layer PV2-2 of the second cell C2 may be controlled by adjusting concentration of germanium Ge contained in the second intrinsic semiconductor layer PV2-2 so as to adjust the voltage relative amount and the current relative amount.
Therefore, when the second intrinsic semiconductor layer PV2-2 is deposited using PECVD, it is possible to make concentration of germanium of the second intrinsic semiconductor layer PV2-2 different according to position of a substrate as illustrated in
When concentration of germanium of the second intrinsic semiconductor layer PV2-2 is set as the graph of
Concentration of germanium contained in the second intrinsic semiconductor layer PV2-2 may be adjusted according to the position of a substrate, as illustrated in
As such, when the second intrinsic semiconductor layer PV2-2 of the first cell C1 has higher concentration of germanium than that of the second intrinsic semiconductor layer PV2-2 of the second cell C2, the second cell C2 has higher band gap energy than that of the first cell C1.
The following Table 3 lists voltage relative amount, current relative amount, and efficiency according to the band gap energy of the second intrinsic semiconductor layer PV2-2. Referring to Table 3, when the first cell C1 has lower band gap energy than the second cell C2, the voltage relative amount and the current relative amount higher than 100% may be achieved, and due to this, relatively high efficiency may be obtained.
Therefore, when concentration of germanium of the second intrinsic semiconductor layer PV2-2 is adjusted, the voltage relative amount and the current relative amount of the first cell C1 and the second cell C2 may be greater than 100% and less than 120%.
Hereinabove, although the adjustment of concentration of germanium of the second photovoltaic unit PV2 containing amorphous silicon germanium has been described, it is also possible to adjust band gap energy of the second photovoltaic unit PV2 and the third photovoltaic unit PV3 together.
In this case, crystallinity of the third photovoltaic unit PV3 containing micro crystalline silicon may be also adjusted while concentration of germanium of the second photovoltaic unit PV2 containing amorphous silicon germanium.
Difference between this embodiment and the triple junction type cell is that a seed layer PV3-4 made of micro crystals is formed between the third P-type semiconductor layer PV3-1 containing micro crystalline silicon and the third intrinsic semiconductor layer PV3-2. Other elements may be the same as those of the previous embodiments.
In following embodiment, a triple junction type cell will be illustrated, however, the seed layer PV3-4 may be formed between the second P-type semiconductor layer PV2-1 and the second intrinsic semiconductor layer PV2-2 in the double junction type cell as illustrated in
The seed layer PV3-4 has sufficient crystallinity at the early deposition and assists growth of crystals of the subsequently deposited third intrinsic semiconductor layer PV3-2.
Therefore, as illustrated in
Crystallinity of the seed layer PV3-4 is linearly proportional to crystallinity of the third intrinsic semiconductor layer PV3-2.
Using this, in this embodiment, crystallinity of the seed layer PV3-4 is adjusted according to the position of a substrate.
Table 4 lists result of adjusting crystallinity of the seed layer PV3-4 according to the position of a substrate to adjust crystallinity of the third intrinsic semiconductor layer PV3-2.
Crystallinity of the seed layer PV3-4 according to the position of a substrate may be adjusted by controlling processing factors such as gap between electrodes, pressure, gas flow rate, and gas ratio.
As such, crystallinity of the third intrinsic semiconductor layer PV3-2 is adjusted by adjusting crystallinity of the seed layer PV3-4 so that voltage relative amount and current relative amount of the first cells and the second cells may be 100% to 120% respectively.
While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined by the following claims.
Number | Date | Country | Kind |
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10-2011-0093029 | Sep 2011 | KR | national |