Any and all applications for which a foreign or domestic priority claim is identified in the Application Data Sheet as filed with the present application are hereby incorporated by reference under 37 CFR 1.57. For example, this application claims priority to and the benefit of Korean Patent Application No. 10-2013-0052587 filed in the Korean Intellectual Property Office on May 9, 2013, the entire contents of which are incorporated herein by reference.
1. Field
The present disclosure relates to a thin film transistor and an organic light emitting diode (OLED) display including the same.
2. Description of Related Technology
In general, a thin film transistor (TFT) array panel is used as a circuit board for independently driving each pixel in a liquid crystal display, an organic electroluminescence (EL) display device, or the like. The thin film transistor substrate is formed of a scan signal wire transmitting a scan signal or a gate wire, an image signal wire transmitting an image signal or a data wire, a thin film transistor electrically connected to the gate wire and the data wire, a first electrode electrically connected to the thin film transistor, a gate insulating layer insulating the gate wire by covering the same, and an interlayer insulating layer insulating the thin film transistor and the data wire by covering the same. The thin film transistor is formed of a gate electrode part of the gate wire, a semiconductor forming a channel, a source electrode and a drain electrode that are portions of the data wire, a gate insulating layer, and an interlayer insulating layer. The thin film transistor is a switching element capable of transmitting an image signal transmitted through the data wire according to the scan signal transmitted through the gate wire to a first electrode or interrupting the transmission of the image signal.
In the thin film transistor substrate, residue from particles generated in the manufacturing process may speed deterioration of the thin film transistor. When this occurs, defects may be visible in a corresponding pixel such that a repair process is required. When a defect is detected by the naked eye, the defective portion may be easily repaired. However, a short defect caused by a fine particle or static electricity is difficult to detect with the naked eye, thus complicating repair. Meanwhile, to increase a channel length of the transistor, a plurality of gate electrodes may be used. When a defect occurs in one gate electrode among the plurality of gate electrodes, one gate electrode may be randomly disconnected such that remaining gate electrodes are used to drive the transistor. However, when disconnecting the normal gate electrode, other gate electrodes are disconnected such that the transistor operates poorly and results in a defective pixel.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the disclosure, and therefore, it may contain information that does not form the prior art already known in this country to a person of ordinary skill in the art.
In one aspect, a thin film transistor and a repair method thereof are provided. In some embodiments, the repair method can easily perform a repair even when a defect is difficult to detect by the naked eye is generated.
In another aspect, a thin film transistor is provided. The thin film transistor may include, for example, a semiconductor formed on a substrate, a gate insulating layer formed on the semiconductor, a gate electrode formed on the gate insulating layer and including a plurality of branches at least partially overlapping the semiconductor, an interlayer insulating layer at least partially overlapping the gate electrode, and a repair pattern formed on the interlayer insulating layer.
In some embodiments, the repair pattern is formed overlapping the branches. In some embodiments, the repair pattern is formed in a closed loop. In some embodiments, the branches may include a repair part and an electrode part, the electrode part may overlap the semiconductor, and the repair pattern may overlap the repair part. In some embodiments, one of the branches may be short-circuited by the repair pattern. In some embodiments, one of the branches is electrically disconnected. In some embodiments, the semiconductor may include a source region, a drain region, and a channel region, and a source electrode and a drain electrode positioned on the interlayer insulating layer and electrically connected to the source region and the drain region may be further included.
In another aspect, an organic light emitting diode (OLED) display is provided. The OLED may include, for example, a substrate, a thin film transistor formed on the substrate, a first electrode electrically connected to the thin film transistor, an organic emission layer formed on the first electrode, and a second electrode formed on the organic emission layer.
In some embodiments, the thin film transistor includes, for example, a semiconductor formed on the substrate, a gate insulating layer formed on the semiconductor, a gate electrode formed on the gate insulating layer and including a plurality of branches overlapping the semiconductor, an interlayer insulating layer overlapping the gate electrode, and a repair pattern formed on the interlayer insulating layer, overlapping the branches, and forming a closed loop. In some embodiments, the branches may include a repair part and an electrode part. In some embodiments, the electrode part may overlap the semiconductor. In some embodiments, the repair pattern may overlap the repair part. In some embodiments, one of the branches is short-circuited by the repair pattern. In some embodiments, one of the branches may be electrically disconnected.
In another aspect, although the thin film transistor may be damaged by particles, a repair pattern is provided herein to more easily repair the thin film transistor than other methods known in the art.
Features of the present disclosure will become more fully apparent from the following description and appended claims, taken in conjunction with the accompanying drawings. It will be understood these drawings depict only certain embodiments in accordance with the disclosure and, therefore, are not to be considered limiting of its scope; the disclosure will be described with additional specificity and detail through use of the accompanying drawings. An apparatus, system or method according to some of the described embodiments can have several aspects, no single one of which necessarily is solely responsible for the desirable attributes of the apparatus, system or method. After considering this discussion, and particularly after reading the section entitled “Detailed Description of Certain Inventive Embodiments” one will understand how illustrated features serve to explain certain principles of the present disclosure.
The present invention will be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments are shown. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention. In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like reference numerals designate like elements throughout the specification. It will be understood that when an element such as a layer, film, region, or substrate is referred to as being “on” another element, it can be directly on the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present. Now, a thin film transistor and a thin film transistor display panel including the same according to exemplary embodiments will be described with reference to accompanying drawings.
The semiconductor 135 may be made of polysilicon, microcrystalline silicon, or amorphous silicon. The semiconductor 135 made of polysilicon includes a channel region in which conductive impurities are not doped, and a source region and a drain region doped with conductive impurities at a high concentration. The impurity doped in the source region and the drain region may be one of a p-type impurity and an n-type impurity.
The gate insulating layer 140 may be a single layer or a plurality of layers including at least one of tetraethoxysilane (tetraethyl orthosilicate, TEOS), silicon nitride, and silicon oxide. The gate electrode 155 includes first branches 22 and second branches 24, and the first branches 22 and the second branches 24 respectively include repair parts 22a and 24a and electrode parts 22b and 24b. The repair parts 22a and 24a overlap the repair pattern 800, and the electrode parts 22b and 24b overlap the semiconductor 135. Like the gate insulating layer 140, the interlayer insulating layer 170 may be made of tetraethoxysilane (tetraethyl orthosilicate, TEOS), silicon nitride, or silicon oxide.
The repair pattern 800 includes a pair of transverse lines 84 respectively overlapping the repair parts 22a and 24a, and the transverse lines 84 are disposed in a direction intersecting a direction that a gate signal passes. A pair of transverse lines 84 is separated, and when disconnecting a defective gate electrode, the gate electrode positioned between the transverse lines 84 is disconnected by using a laser. A pair of transverse lines may be positioned separated by a predetermined distance for the transverse line 84 to not be damaged by the laser. The transverse lines 84 are electrically connected by a pair of longitudinal lines 86 thereby forming a closed loop. Each longitudinal line 86 connects one end of the transverse line 84 and does not overlap the first branches 22 and the second branches 24.
Next, a method of repairing the thin film transistor of
Referring to
In this way, if the second branches 24 are disconnected and shorted by using the repair pattern 800, as shown in
Next, an organic light emitting diode (OLED) display including the above transistor will be described in detail.
The signal lines include a scan signal line 121 transferring a gate signal (or a scan signal), a data line 171 transferring a data signal, a driving voltage line 172 transferring a driving voltage, and the like. The scan signal lines 121 extend in an approximate row direction and are parallel to each other, and the data lines 171 extend in an approximate column direction and are almost parallel to each other. The driving voltage line 172 extending in an approximate column direction is shown, but the driving voltage line 172 may extend in a row direction or a column direction or may have a mesh form.
Each pixel PX includes a switching transistor Qs, a driving transistor Qd, a storage capacitor Cst, and an organic light emitting element LD. The switching transistor Qs includes a control terminal, an input terminal, and an output terminal, and the control terminal is connected to a scan signal 121, the input terminal is connected to a data line 171, and the output terminal is connected to a driving transistor Qd. The switching transistor Qs transmits a data signal received from the data line 171 to the driving transistor Qd in response to a scan signal received from the scanning signal line 121. The driving transistor Qd also includes a control terminal, an input terminal, and an output terminal, and the control terminal is connected to the switching transistor Qs, the input terminal is connected to a driving voltage line 172, and the output terminal is connected to an organic light emitting element LD. The driving transistor Qd generates an output current ILD. The intensity of the output current ILD varies depending on the voltage between the control terminal and the output terminal thereof.
The capacitor Cst is connected between the control terminal and the input terminal of the driving transistor Qd. The capacitor Cst charges a data signal applied to the control terminal of the driving transistor Qd and maintains the charged data signal even after the switching transistor Qs is turned off. As an organic light emitting diode (OLED), the organic light emitting element LD, for example, includes an anode connected to the output terminal of the driving transistor Qd and a cathode connected to a common voltage Vss. The organic light emitting element LD displays an image by changing intensity thereof depending on the output current ILD of the driving transistor Qd. The organic light emitting element LD may include an organic emission layer which uniquely emits any one or one or more light of primary colors such as three primary colors of red, green, and blue, and displays a desired image in a spatial combination of the colors. The switching transistor Qs and the driving transistor Qd are n-channel field effect transistors (FETs), however at least one may be a p-channel FET. In some embodiments, the electrical connections among the transistors Qs and Qd, the capacitor Cst, and the organic light emitting diode LD may be modified.
As shown in
In some embodiments, the first semiconductor 135a has two channel regions 1355, and a high concentration doping region 1358 that becomes the source region and the drain region is positioned between two channel regions. The first capacitor electrode 138 is doped with the same conductive impurity as the source region 1356 and the drain region 1357. The impurity doped in the source region 1356 and the drain region 1357, the high concentration doping region 1358, and the first capacitor electrode 138 may be one of the p-type impurity and the n-type impurity.
The gate insulating layer 140 is formed on the first semiconductor 135a, the second semiconductor 135b, and the first capacitor electrode 138. The gate insulating layer 140 may be a single layer or a plurality of layers including at least one of tetraethoxysilane (tetraethyl orthosilicate, TEOS), silicon nitride, and silicon oxide.
A gate line 121, a second gate electrode 155b, and a second capacitor electrode 158 are formed on the gate insulating layer 140. The gate line 121 extends in a transverse direction, transmits the gate signal, and includes a first gate electrode 155a protruding from the first semiconductor 135a. As shown in
The first gate electrode 155a and the second gate electrode 155b respectively overlap the channel region 1355. The first gate electrode 155a, the second gate electrode 155b, and the second capacitor electrode 158 may be formed of a single layer of a multiple layer of tungsten, molybdenum, aluminum, or an alloy thereof. The second capacitor electrode 158 is connected to the second gate electrode 155b and overlaps the first capacitor electrode 138. The first capacitor electrode 138 and the second capacitor electrode 158 form a capacitor 80 having the gate insulating layer 140 as a dielectric material.
A first interlayer insulating layer 160 is formed on the gate line 121, the second gate electrode 155b, and a repairing conductor 202. The first interlayer insulating layer 160 may be formed of tetraethoxysilane (tetraethyl orthosilicate, TEOS), silicon nitride, or silicon oxide like the gate insulating layer 140. The first interlayer insulating layer 160 and the gate insulating layer 140 have a source contact hole 166 and a drain contact hole 167 respectively exposing the source region 1356 and the drain region 1357, and a contact hole 81 exposing the second gate electrode 155b.
A data line 171 having a first source electrode 176a, a driving voltage line 172 having a second source electrode 176b, a first drain electrode 177a, and a second drain electrode 177b are formed on the first interlayer insulating layer 160. The repair pattern 800 overlapping the first gate electrode 155a is formed on the first interlayer insulating layer 160. The data line 171 transmits the data signal and extends in a direction intersecting the gate line 121. The driving voltage line 172 transmits a predetermined voltage, is separated from the data line 171, and extends in the same direction as the data line 171. The first source electrode 176a is protruded from the data line 171 toward the first semiconductor 135a, and the second source electrode 176b is protruded from the driving voltage line 172 toward the second semiconductor 135b. The first source electrode 176a and the second source electrode 176b are respectively connected to the source region 1356 through the source contact hole 166. The first drain electrode 177a faces the first source electrode 176a, the second drain electrode 177b faces the second source electrode 176b, and the first drain electrode 177a and the second drain electrode 177b are respectively connected to the drain region 1357 through the drain contact hole 167. The first drain electrode 177a extends according to the gate line, and is electrically connected to the second gate electrode 155b through the contact hole 81.
A capacitor electrode (not shown) may be further formed on the first interlayer insulating layer 160. The additional capacitor electrode may overlap the first capacitor electrode 138 or the second capacitor electrode 158 to be connected in parallel thereby increasing charging capacitance.
A second interlayer insulating layer 180 is formed on the data line 171 having the first source electrode 176a, the driving voltage line 172 having the second source electrode 176b, the first drain electrode 177a, the second drain electrode 177b, and the repair pattern 800. The second interlayer insulating layer 180 may be formed of the same material as the first interlayer insulating layer 160 and has a contact hole 82 exposing the second drain electrode 177b.
A first electrode 710 is formed on the second interlayer insulating layer 180. The first electrode 710 may be the anode of
A pixel definition layer 190 having an opening 195 exposing the first electrode 710 is formed on the first electrode 710. The pixel defining layer 190 may be formed by including a resin such as a polyacrylate or a polyimide, or a silica-based inorganic material.
An organic emission layer 720 is formed in the opening 195 of the pixel defining layer 190. The organic emission layer 720 includes an emission layer, and may include at least one of a hole transport layer (HTL), a hole-injection layer (HIL), an electron transport layer (ETL), and an electron injection layer (EIL). In the case where the organic emission layer 720 includes all of them, the hole injection layer (HIL) may be disposed on the first electrode 710 that is the anode, and the hole transport layer (HTL), the emission layer, the electron transport layer (ETL), and the electron injection layer (EIL) may be sequentially laminated thereon.
A second electrode 730 may be formed on the pixel definition layer 190 and the organic emission layer 720. The second electrode 730 becomes a cathode of the organic light emitting element. Accordingly, the first electrode 710, the organic emission layer 720, and the second electrode 730 may form an organic light emitting element 70. The second electrode 730 may be formed of a reflective layer, a transparent layer, and/or a semi-transparent layer.
The reflective layer and semi-transparent layer may be formed of at least one of magnesium (Mg), silver (Ag), gold (Au), calcium (Ca), lithium (Li), chromium (Cr), and aluminum (Al), or alloys thereof. The reflective layer and the semi-transparent layer may be selected based on thickness. In some embodiments, the semi-transparent layer may have a thickness of less than or equal to 200 nm. Light transmittance is increased as the thickness is decreased, but resistance is increased when the thickness decreases. The transparent layer may be formed of a material such as indium tin oxide (ITO), indium zinc oxide (IZO), and zinc oxide (ZnO).
While this invention has been described in connection with what are presently considered to be practical exemplary embodiments, it will be appreciated by those skilled in the art that various modifications and changes may be made without departing from the scope of the present disclosure. It will also be appreciated by those of skill in the art that parts included in one embodiment are interchangeable with other embodiments; one or more parts from a depicted embodiment can be included with other depicted embodiments in any combination. For example, any of the various components described herein and/or depicted in the Figures may be combined, interchanged or excluded from other embodiments. With respect to the use of substantially any plural and/or singular terms herein, those having skill in the art can translate from the plural to the singular and/or from the singular to the plural as is appropriate to the context and/or application. The various singular/plural permutations may be expressly set forth herein for sake of clarity. Thus, while the present disclosure has described certain exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.
Number | Date | Country | Kind |
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10-2013-0052587 | May 2013 | KR | national |