Patent Application
20150028300
This application claims the benefit of Korean Patent Application No. 10-2013-0086975, filed on Jul. 23, 2013, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
1. Field
One or more embodiments of the present invention relate to a thin film transistor including an oxide semiconductor, an organic light-emitting display apparatus including the same, and a method of manufacturing the thin film transistor.
2. Description of the Related Art
A flat panel display apparatus such as an organic light-emitting display apparatus, a liquid crystal display apparatus, etc. is manufactured on a substrate including patterns having at least one thin film transistor for driving a pixel, a capacitor, and wirings for connecting the components. The thin film transistor includes an active layer providing a channel region, a source region and a drain region, and a gate electrode formed on the channel region and electrically insulated from the active layer by a gate insulating layer.
The active layer of the thin film transistor having the above-described structure may be commonly formed by using a semiconductor material such as amorphous silicon or polysilicon. When the active layer is formed by using the amorphous silicon, carrier mobility may be low, and it may be difficult to obtain a driving circuit having a rapid operation speed. When the active layer is formed by using the polysilicon, the mobility may be high. However a threshold voltage of the thin film transistor may be non-uniform. Thus, an additional compensating circuit may be necessary to compensate for the non-uniform threshold voltage. In addition, since a common method of forming thin film transistor by using a low temperature polysilicon (LTPS) involves an expensive process such as laser heat treatment, equipment and management costs are high, and it may be difficult to use the method to a large-sized panel. To solve the above-described problems, research on using an oxide semiconductor in an active layer of the thin film transistor is being conducted.
When the oxide semiconductor is used in a thin film transistor as an active layer, mobility of the thin film transistor and the reliability of materials are in a trade-off relationship. High mobility of about 30 cm2/V·sec may be necessary to manufacture a high resolution display apparatus. When an oxide semiconductor material having such a high mobility is used as an active layer, the reliability of the material may be poor, and a device may be easily deteriorated.
One or more embodiments of the present invention considering the above-described defects include a thin film transistor including an oxide semiconductor having a high mobility and a high reliability of materials, an organic light-emitting display apparatus including the same, and a method of manufacturing the thin film transistor. However, the object is an exemplary embodiment, and the scope of the present invention is not limited thereto.
Additional aspects will be set forth in part in the description which follows and, in part, will be apparent from the description, or may be learned by practice of the presented embodiments.
According to one or more embodiments of the present invention, a thin film transistor includes a gate electrode provided on a substrate, a semiconductor layer insulated from the gate electrode, and including gallium, indium, tin and zinc gallium oxides (GITZO) and source/drain electrodes formed on the semiconductor layer.
An amount of the gallium may be from about 5 atom % to about 25 atom % of the semiconductor layer.
An amount of indium (In) may be from about 10 atom % to about 40 atom % of the semiconductor layer.
The thin film transistor may further include a gate insulating layer interposed between the gate electrode and the semiconductor layer and making contact with the gate electrode and the semiconductor layer, and an etch stopping layer interposed between the semiconductor layer and the source/drain electrodes and making contact with the semiconductor layer and the source/drain electrodes. The gate insulating layer and the etch stopping layer may include silicon oxide (SiOx).
According to one or more embodiments of the present invention, an organic light-emitting display apparatus includes a thin film transistor including a gate electrode provided on a substrate, a semiconductor layer insulated from the gate electrode, and including gallium, indium, tin and zinc oxides (GITZO), and source/drain electrodes formed on the semiconductor layer; a passivation layer covering the thin film transistor; and an organic light-emitting device provided on the passivation layer and including a first electrode, an intermediate layer and a second electrode.
According to one or more embodiments of the present invention, a method of manufacturing a thin film transistor includes depositing a gate electrode material on a substrate and patterning to form a gate electrode, depositing a semiconductor material on the gate electrode using a single target including gallium, indium, tin and zinc oxide (GITZO) to be insulated from the gate electrode and patterning the semiconductor material to form a semiconductor layer, and depositing source/drain materials on the semiconductor layer and patterning to form source/drain electrodes to make a contact with the semiconductor layer through a contact hole.
An amount of the gallium may be from about 5 atom % to about 25 atom % of the semiconductor layer.
An amount of indium (In) may be from about 10 atom % to about 40 atom % of the semiconductor layer.
The method may further include forming a gate insulating layer to cover the gate electrode, and depositing an etch stopping material to cover the semiconductor layer and patterning to form the contact hole. The gate insulating layer and the etch stopping layer may include silicon oxide (SiOx).
According to an exemplary embodiment of the present invention, a thin film transistor including an oxide semiconductor improving both of the mobility and the reliability of materials, an organic light-emitting display apparatus including the same, and a method of manufacturing the thin film transistor may be accomplished. Of course, the scope of the present invention is not limited to the effects.
These and/or other aspects will become apparent and more readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings in which:
Hereinafter, embodiments of the inventive concept will be described in detail with reference to the accompanying drawings. Like reference numerals refer to the like elements throughout the specification. The present embodiments may have different forms and should not be construed as being limited to the descriptions set forth herein. Expressions such as “at least one of,” when preceding a list of elements, modify the entire list of elements and do not modify the individual elements of the list.
Referring to the drawings, the same or corresponding elements will be given the same reference symbols, and duplicated explanation thereon will be omitted.
As used herein, the singular forms “a,” “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” when used in this specification, specify the presence of stated features, elements, and/or components, but do not preclude the presence or addition of one or more other features, elements, and/or components. It will be understood that when a layer, a region or an element is referred to as being “on” another layer, region, or element, it can be directly on the other layer, region or element, or formed with intervening layer, region or elements.
For convenience of explanation, the size of elements in the drawings may be exaggerated or reduced. For example, the size and the thickness of each element in the drawings are optional, and the present invention will not be limited thereto.
A base substrate 100 may be formed by using various materials such as a glass material, a metal material or a plastic material. On the base substrate 100, a buffer layer 101 formed by using silicon oxide, silicon nitride, or the like may be disposed to planarize the surface of the base substrate 100 or to prevent the penetration of impurities, etc. into the thin film transistor.
On the buffer layer 101, a thin film transistor array is provided. The thin film transistor array is obtained by arranging a plurality of thin film transistors. Each of the thin film transistors includes a gate electrode 102, a semiconductor layer 104, and source/drain electrodes 106.
On the buffer layer 101, the gate electrode 102 is provided. According to a signal applied into the gate electrode 102, the source/drain electrodes 106 may electrically communicate with a data line which transmits data signal. The gate electrode 102 may be formed by using at least one material among aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W) and copper (Cu). The material of the gate electrode 102 is selected considering an adhesion properties with an adjacent layer, a surface planarization degree and an ease of a process of the layer. The gate electrode 102 may be formed as a single layer or a multi-layer. The gate electrode 102 may be formed by depositing the gate electrode material on the buffer layer by means of an evaporation method, a vaporization method or a sputtering method, and patterning using a conventional photolithography process. While forming the gate electrode 102, a gate line 102a may be formed at the same time using the same layer and the same material as the gate electrode 102.
The semiconductor layer 104 includes an oxide semiconductor material. According to an exemplary embodiment of the present invention, the semiconductor layer 104 may include about 5-25 atom % of gallium, about 10-40 atom % of indium, tin and zinc. Wherein, zinc and tin may include by zinc:tin=1:5. The ITZO including indium (In) in an amount of about 10 atom % to about 40 atom % with respect to the semiconductor layer has high mobility of about 30 cm2/V·sec or above, for example, about 30 cm2/V·sec to about 60 cm2/V·sec. Generally, gallium indium tin oxide (GIZO) has a lower mobility of about 10 cm2/V·sec or less. Using the ITZO as the semiconductor layer, a high resolution organic light-emitting display apparatus such as an ultra high definition (UHD) display may be manufactured because of its high mobility.
Generally, when the indium concentration exceeds about 40 atom %, the thin film transistor may be sensitive to light, and may have bad light reliability. Detailed description with respect to the light reliability will be given herein below.
The semiconductor layer 104 formed by using the ITZO has a bad reliability.
When the semiconductor layer 104 is manufactured using a target including gallium, Indium, Tin and Zinc oxides, the high mobility and the high light reliability of materials may be obtained. The gallium may be included in a range of about 5 atom % to about 25 atom % with respect to the semiconductor layer. When the amount of gallium included in the semiconductor layer is about 5 atom % or less, a similar graph as in
The preferable amount of the gallium included in the semiconductor layer 104 is about 25 atom % or less because carrier concentration of the thin film transistor is inverse proportional to the concentration of gallium. As illustrated in
When forming the semiconductor layer 104, a semiconductor material is sputtered on the gate insulating layer 103b using a single target including gallium indium tin zinc oxide (GITZO). Then, the semiconductor material is patterned by a photolithography process to form the semiconductor layer 104.
A gate insulating layer 103 is formed between the gate electrode 102 and the semiconductor layer 104 to provide insulation therebetween. After forming a gate insulating layer 103 to cover the gate electrode 102, the semiconductor layer 104 is formed on the gate insulating layer 103. The gate insulating layer 103 may be a single layer of silicon oxide. However, the gate insulating layer 103 is not limited thereto, and may be a stacked layer of silicon oxide/silicon nitride/silicon oxide.
An etch stopping layer material is formed to cover the semiconductor layer 104 on the semiconductor layer 104, and a contact hole exposing a portion of the semiconductor layer 104 is formed. An etch stopping layer 105 may be a single layer of silicon oxide. However, the etch stopping layer 105 is not limited thereto, and may be a stacked layer of silicon oxide/silicon nitride/silicon oxide.
When hydrogen ions penetrate into the oxide semiconductor layer 104, the carrier concentration of the oxide semiconductor layer 104 may be increased to exhibit conductivity. Thus, the threshold voltage may be shifted and the thin film transistor may not be suitable to be used as a switch for display device. Generally, the amount of hydrogen in silicon oxide is smaller than that in silicon nitride. When the gate insulating layer 103 and the etch stopping layer 105 making a direct contact with the semiconductor layer 104 are formed using silicon oxide, reliability of a transistor may be improved.
Source/drain electrode materials are formed on the contact hole and the etch stopping layer 105. The Source/drain electrode materials are patterned by a photolithography process to form source/drain electrodes 106. The source/drain electrodes 106 may be formed by using at least one material among aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W) and copper (Cu), or the like in consideration of the conductivity. The source/drain electrodes 106 may be formed as a single layer or a multi-layer. While forming the source/drain electrodes 106, a data line 106a may be formed at the same time, on the same layer, and by using the same material as the source/drain electrodes 106.
A bottom gate type may be applied to the thin film transistor in accordance with an exemplary embodiment of the inventive concept. Since the semiconductor layer of the thin film transistor has high mobility, a high temperature treatment after forming the semiconductor is not preferable. Thus, the gate insulating layer 103 deposited at a high temperature may be formed before the semiconductor layer 104 is formed. In this case, the generation of a short circuit between the semiconductor layer and gate electrode due to high temperature damage that results during the forming of the gate insulating layer 103 may be prevented.
A passivation layer 107 covering the thin film transistor may be formed. The passivation layer 107 may be formed by using an inorganic material such as silicon oxide, silicon nitride, silicon oxynitride, or the like, or may be formed by using an acryl organic material, benzocyclobutene (BCB), or the like. Referring to
On the passivation layer 107, an organic light-emitting device (OLED) including a pixel electrode 111, an opposite electrode 112 and an intermediate layer 113 including a light-emitting layer between the pixel electrode 111 and the opposite electrode 112, is disposed.
In the passivation layer 107, an opening portion exposing a portion of one of source/drain electrodes 106 of a thin film transistor is provided. The pixel electrode 111 is electrically connected to the thin film transistor by making contact with one of the source/drain electrodes 106 through the opening portion, and is disposed on the passivation layer 107. The pixel electrode 111 may be formed as a (semi)transparent electrode or a reflection type electrode. The (semi)transparent electrode may be formed by using, for example, ITO, IZO, ZnO, In2O3, IGO or AZO. The reflection type electrode may include a reflection layer formed by using Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Or or a compound thereof, and a layer formed by using ITO, IZO, ZnO, In2O3, IGO or AZO. Of course, the present invention is not limited thereto, and various materials may be applied. The structure may also include various shapes including a single layer, a multi-layer, or the like.
On the passivation layer 107, a pixel defining layer 109 may be disposed. The pixel defining layer 109 defines a pixel by including an opening corresponding to each of the pixels, that is, an opening exposing at least the center portion of the pixel electrode 111. The pixel defining layer 109 may prevent the generation of an arc at the terminal of the pixel electrode 111 by increasing the distance between the terminal of the pixel electrode 111 and the opposite electrode 112 at the upper portion of the pixel electrode 111. The pixel defining layer 109 may be formed by using an organic material such as polyimide.
The intermediate layer 113 of the OLED may include a low molecular weight material or a high molecular weight material. When the low molecular weight material is used, a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), an electron injection layer (EIL), or the like may be formed as a single layer or by stacking into a complex structure. Various organic materials including copper phthalocyanine (CuPc), N,N-di(naphthalene-1-yl)-N,N′-diphenyl-benzidine (NPB), tris-8-hydroxyquiloline aluminum (Alq3), or the like may be used. The layers may be formed by a vacuum deposition method.
When the intermediate layer 113 includes the high molecular weight material, the intermediate layer 113 may have a structure including the HTL and the EML. In this case, PEDOT may be used as the HTL, and a high molecular weight material such as poly-phenylenevinylene (PPV)-based compound and polyfluorene-based compound may be used as the EML. The layers may be formed by means of a screen printing method, an inkjet printing method, a laser induced thermal imaging (LITI) method, or the like.
Of course, the intermediate layer 113 is not limited thereto, and may include various structures.
The opposite electrode 112 may be disposed to cover the entire substrate. The opposite electrode 112 may be formed as one body on a plurality of OLEDs to correspond to a plurality of pixel electrodes 111. The opposite electrode 112 may be formed as a (semi)transparent electrode or a reflection type electrode. When the opposite electrode 112 is formed as the (semi)transparent electrode, a layer formed by using a metal having a low work function such as Li, Ca, LiF/Ca, LiF/Al, Al, Ag, Mg and a compound thereof, and a (semi)transparent conductive layer such as ITO, IZO, ZnO or In2O3 may be included. When the opposite electrode 112 is formed as the reflection type electrode, a layer formed by using Li, Ca, LiF/Ca, LiF/Al, Al, Ag, Mg and a compound thereof may be included. Of course, the constitution and the material of the opposite electrode 112 are not limited thereto, and various modifications may be possible.
It should be understood that the exemplary embodiments described therein should be considered in a descriptive purpose only and not for purposes of limitation of the invention. Descriptions of features or aspects within each embodiment should typically be considered as available for other similar features or aspects in other embodiments.
While one or more embodiments of the present invention have been described with reference to the figures, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined by the following claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10-2013-0086975 | Jul 2013 | KR | national |
