THIN FILM TRANSISTOR PANEL AND METHOD OF MANUFACTURING THE SAME

Abstract

A thin film transistor panel and a method of manufacturing the same are disclosed. The thin film transistor panel includes a thin film transistor including a drain electrode with an opening, and a transparent electrode contacts a portion of the opening.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention, and together with the description serve to explain the principles of the invention.

FIG. 1 is a schematic block diagram showing a thin film transistor (TFT) panel according to an exemplary embodiment of the present invention.

FIG. 2A is a layout of part of a display area of a TFT panel according to an exemplary embodiment of the present invention, and FIG. 2B is a sectional view taken along line B-B′ of FIG. 2A.

FIG. 3A, FIG. 3B, and FIG. 3C are plan views showing various shapes of openings of drain electrodes configured in relation to contact holes in a display area of a TFT panel according to an exemplary embodiment of the present invention.

FIG. 4A is a layout of part of a display area of a TFT panel according to another exemplary embodiment of the present invention, and FIG. 4B is a sectional view taken along line B-B′ of FIG. 4A.

FIG. 5 is a plan view showing an opening of a drain electrode configured in relation to a contact hole in a display area of a TFT panel according to another exemplary embodiment of the present invention.

FIG. 6A is a layout of part of a display area of a TFT panel according to still another exemplary embodiment of the present invention, and FIG. 6B is a sectional view taken along line B-B′ of FIG. 6A.

FIG. 7A is a layout of part of a non-display area of a TFT panel according to an exemplary embodiment of the present invention, and FIG. 7B is a sectional view taken along line B-B′ of FIG. 7A.

FIG. 8A, FIG. 9A, FIG. 10A, and FIG. 11A are layouts of intermediate structures showing a method of manufacturing a TFT panel according to an exemplary embodiment of the present invention, and FIG. 8B, FIG. 9B, FIG. 10B, and FIG. 11B are sectional views taken along lines B-B′ of FIG. 8A, FIG. 9A, FIG. 10A, and FIG. 11A, respectively.

FIG. 12A and FIG. 13A are layouts of intermediate structures showing a method of manufacturing a TFT panel according to another exemplary embodiment of the present invention, and FIG. 12B and FIG. 13B are sectional views taken along lines B-B′ of FIG. 12A and FIG. 13A, respectively.

FIG. 14A, FIG. 15A, and FIG. 16A are layouts of intermediate structures showing a method of manufacturing a TFT panel according to still another exemplary embodiment of the present invention, and FIG. 14B, FIG. 15B, and FIG. 16B are sectional views taken along lines B-B′ of FIG. 14A, FIG. 15A, and FIG. 16A, respectively.

Claims

1. A thin film transistor panel, comprising: a thin film transistor comprising a drain electrode having an opening; anda transparent electrode contacting a portion of the opening.

2. The thin film transistor panel of claim 1, wherein the transparent electrode contacts a sidewall of the opening.

3. The thin film transistor panel of claim 1, wherein the transparent electrode further contacts an upper surface of the drain electrode.

4. A thin film transistor panel, comprising: a thin film transistor disposed in a display area, the thin film transistor comprising a drain electrode having a first opening;a passivation layer covering the thin film transistor and comprising a first contact hole exposing at least a portion of the drain electrode, the first contact hole overlapping with the first opening; anda pixel electrode disposed on the passivation layer, the pixel electrode being connected to the drain electrode via the first contact hole.

5. The thin film transistor panel of claim 4, wherein the first contact hole is larger than the first opening.

6. The thin film transistor panel of claim 5, wherein the first opening comprises a hole with a closed shape in cross-section.

7. The thin film transistor panel of claim 5, wherein the first opening comprises an open shape in cross-section.

8. The thin film transistor panel of claim 4, further comprising: a gate driver,wherein the gate driver is disposed in a non-display area outside the display area and supplies a gate signal to a gate line that is connected to a control terminal of the thin film transistor.

9. The thin film transistor panel of claim 8, wherein the gate driver comprises: a shift register thin film transistor comprising a drain electrode having a second opening;a passivation layer covering the shift register thin film transistor and comprising a second contact hole exposing at least a portion of the drain electrode of the shift register thin film transistor; anda bridge electrode connected to the drain electrode of the shift register thin film transistor via the second contact hole.

10. The thin film transistor panel of claim 9, wherein the second contact hole overlaps with the second opening, the second contact hole being larger than the second opening.

11. The thin film transistor panel of claim 10, wherein the second opening comprises a hole with a closed shape in cross-section.

12. The thin film transistor panel of claim 10, wherein the second opening comprises an open shape in cross-section.

13. A method for manufacturing a thin film transistor panel, comprising: forming a thin film transistor comprising a drain electrode having an opening; andforming a transparent electrode that contacts a sidewall of the opening.

14. The method of claim 13, wherein the transparent electrode further contacts an upper surface of the drain electrode.

15. A method for manufacturing a thin film transistor panel, comprising: forming a thin film transistor in a display area, the thin film transistor comprising a drain electrode having a first opening;forming a passivation layer that covers the thin film transistor and comprises a first contact hole exposing at least a portion of the drain electrode, the first contact hole overlapping with the first opening; andforming a pixel electrode on the passivation layer, the pixel electrode being connected to the drain electrode via the first contact hole.

16. The method of claim 15, further comprising: forming a gate driver in a non-display area outside the display area, the gate driver to supply a gate signal to a gate line that is connected to a control terminal of the thin film transistor.

17. The method of claim 16, wherein the gate driver comprises: a shift register thin film transistor comprising a drain electrode having a second opening;a passivation layer covering the shift register thin film transistor and comprising a second contact hole exposing at least a portion of the drain electrode of the shift register thin film transistor; anda bridge electrode connected to the drain electrode of the shift register thin film transistor via the second contact hole.

18. The method of claim 17, wherein the second contact hole overlaps with the second opening, the second contact hole being larger than the second opening.

19. The method of claim 18, wherein the first opening and the second opening each comprise a hole with a closed shape in cross-section.

20. The method of claim 18, wherein the first opening and the second opening each comprise an open shape in cross-section.