THIN FILM TRANSISTOR SUBSTRATE AND PROCESS FOR PRODUCING SAME

Abstract

In conventional techniques, there has been a problem such that a pattern failure tends to occur in which electrode patterns formed by coating do not coincide with lyophilic patterns and the coating process is complicated to degrade the productivity. The present invention provides a thin film transistor substrate including: a substrate; a plurality of gate electrodes formed on a flat surface of the substrate so as to form an array constituted with ring-shaped flat patterns formed by continuously connecting the outer peripheries of a plurality of ellipses aligned along the major axis direction, or patterns each formed with the peripheral shape of an ellipse; a gate insulating film formed over the gate electrodes; and source electrodes and drain electrodes formed on the gate insulating film exclusive of the flat surface regions, on the gate insulating film, defined as the projected shapes of the gate electrodes.

Description

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING

FIG. 1 is a view showing an example of the flat patterns of gate electrodes of a thin film transistor substrate according to the present invention;

FIG. 2A1 is a view showing a plane in a production step of a thin film transistor substrate according to the present invention;

FIG. 2A2 is a view showing the A-A section in FIG. 2A1;

FIG. 2B1 is a view showing a plane in a production step of a thin film transistor substrate according to the present invention;

FIG. 2B2 is a view showing the A-A section in FIG. 2B1;

FIG. 2C1 is a view showing a plane in a production step of a thin film transistor substrate according to the present invention;

FIG. 2C2 is a view showing the A-A section in FIG. 2C1;

FIG. 2D1 is a view showing a plane in a production step of a thin film transistor substrate according to the present invention;

FIG. 2D2 is a view showing the A-A section in FIG. 2D1;

FIG. 2E1 is a view showing a plane in a production step of a thin film transistor substrate according to the present invention;

FIG. 2E2 is a view showing the A-A section in FIG. 2E1;

FIG. 2F1 is a view showing a plane in a production step of a thin film transistor substrate according to the present invention;

FIG. 2F2 is a view showing the A-A section in FIG. 2F1;

FIG. 3A is a diagram showing an illustrative example of the procedures for forming the gate electrode flat patterns of the present invention;

FIG. 3B is a diagram showing an illustrative example of the procedures for forming the gate electrode flat patterns of the present invention;

FIG. 3C is a diagram showing an illustrative example of the procedures for forming the gate electrode flat patterns of the present invention;

FIG. 4A is a view showing an example of a process for coating the source electrodes and the drain electrodes of the present invention;

FIG. 4B is a view showing another example of the process for coating the source electrodes and the drain electrodes of the present invention; and

FIG. 5 is a view showing an example of an active matrix display device using the thin film transistor substrate of the present invention.

Claims

1. A thin film transistor substrate comprising: a substrate;a plurality of gate electrodes formed and aligned on a flat surface of the substrate to be constituted with ring-shaped flat patterns having openings;a gate insulating film formed over the gate electrodes; andsource electrodes and drain electrodes formed on the gate insulating film exclusive of flat surface regions, on the gate insulating film, defined as projected shapes of the gate electrodes;wherein the ring-shaped flat patterns of the gate electrodes are patterns formed by continuously connecting outer peripheries of a plurality of ellipses aligned along a major axis direction, or patterns each formed with a peripheral shape of an ellipse.

2. The thin film transistor substrate according to claim 1, wherein flat shapes forming the source electrodes and the drain electrodes are approximately the same.

3. The thin film transistor substrate according to claim 1, wherein the openings of the ring-shaped flat patterns of the gate electrodes are regions enclosed with the outer peripheries, and are regions in which the source electrodes are formed.

4. The thin film transistor substrate according to claim 1, wherein regions between the individual gate electrodes are regions in which the drain electrodes are formed.

5. The thin film transistor substrate according to claim 1, wherein the source electrodes and the drain electrodes are arranged on the flat surface of the substrate respectively with approximately even intervals.

6. The thin film transistor substrate according to claim 1, wherein the source electrodes and the drain electrodes are formed as reverse pattern shapes in relation to the gate electrodes.

7. The thin film transistor substrate according to claim 1, wherein a surface of the source electrodes and a surface of the drain electrodes each are formed with a lyophobic monolayer.

8. The thin film transistor substrate according to claim 7, comprising: a semiconductor film formed in flat surface regions, on the gate insulating film, defined as the projected shapes of the gate electrodes;a passivation insulating film formed over the semiconductor film, the source electrodes and the drain electrodes; andpixel electrodes formed on the passivation insulating film and connected to the source electrodes through the intermediary of through holes.

9. A process for producing a thin film transistor substrate, comprising: forming and aligning on a substrate a plurality of gate electrodes to be constituted with ring-shaped flat patterns wherein the ring-shaped flat patterns of the gate electrodes are patterns formed by continuously connecting the outer peripheries of a plurality of ellipses aligned along the major axis direction, or patterns each formed with the peripheral shape of an ellipse;forming a gate insulating film over the plurality of the gate electrodes formed in an array;forming a photosensitive lyophobic monolayer on the gate insulating film;forming lyophilic regions by irradiating the substrate with light from the side opposite to the side on which the gate electrodes are arranged, and removing the lyophobic monolayer formed in regions which are not light shielded by the gate electrodes; andproducing source electrodes and drain electrodes by applying a conductive ink on the lyophilic regions and by firing the applied conductive ink.

10. The process for producing a thin film transistor substrate according to claim 9, comprising: partially removing the lyophobic monolayer formed between the source electrodes and the drain electrodes;forming the semiconductor film by applying the semiconductor coating liquid to the regions from which the lyophobic monolayer has been removed;forming the passivation insulating film over the source electrodes, the drain electrodes and the semiconductor film;forming the through holes by partially removing the passivation insulating film from above the source electrodes; andforming the pixel electrodes on the passivation insulating film so as to be connected to the source electrodes through the intermediary of the through holes.

11. The process for producing a thin film transistor substrate according to claim 9, wherein the source electrodes and the drain electrodes are formed as reverse patterns in relation to the gate electrodes.

12. The process for producing a thin film transistor substrate according to claim 10, wherein each of the pixel electrodes is formed in one pixel unit constituted with one gate electrode constituted with one ring-shaped flat pattern, and the source electrode and the drain electrode, both corresponding to the gate electrode.

13. The process for producing a thin film transistor substrate according to claim 9, wherein the conductive ink is repelled from the lyophobic regions which is light shielded by the gate electrodes so as to gather together in the lyophilic regions.

14. The process for producing a thin film transistor substrate according to claim 13, wherein the substrate is vibrated while the conductive ink is being applied.