TIME SYNCHRONIZATION METHOD FOR WIRELESS LOAD TESTING SYSTEM

Information

  • Patent Application
  • 20250159629
  • Publication Number
    20250159629
  • Date Filed
    November 20, 2024
    5 months ago
  • Date Published
    May 15, 2025
    3 days ago
  • Inventors
  • Original Assignees
    • Shaanxi Electric Appliance Institute
Abstract
A time synchronization method for a wireless load testing system includes two stages: a stage of constructing a wireless sensor network system and a stage of suppressing communication delay to achieve precise network-wide time synchronization. The method employs a relative skew estimator based on Bayesian estimation theory to suppress the effect of time delay in wireless communication, thereby enhancing the estimation accuracy of the relative skew estimator while reducing memory requirements. By applying the average consensus protocol, high-precision network-wide time synchronization is achieved, and the overall method enhances the robustness to time delay and has higher accuracy. The method solves the problems of reduced time synchronization accuracy and time synchronization failure of partial sub-nodes due to time delay of the traditional time synchronization algorithms in complex spatial layout.
Description
TECHNICAL FIELD

The present disclosure relates to the technical field of wireless sensor networks for aircraft load measurement, and in particular to a time synchronization method for a wireless load testing system.


BACKGROUND

A number of distributed time synchronization algorithms have been proposed in conventional wireless sensor networks. These algorithms have robustness to unreliable communication links and adaptability to dynamic network topology, but all ignore the effect of communication delay on time information. In practical wireless sensor networks, the communication delay cannot be ignored, and is a fundamental limitation for time synchronization, which greatly affects the accuracy of time synchronization and the efficiency of time synchronization methods. The traditional time synchronization algorithms have the problems of reduced time synchronization accuracy and time synchronization failure of partial sub-nodes due to time delay in complex spatial layout.


SUMMARY

The present disclosure provides a time synchronization algorithm for a wireless load testing system, which can precisely achieve the network-wide time synchronization, solves the problems of reduced time synchronization accuracy and time synchronization failure of partial sub-nodes due to time delay of the traditional time synchronization algorithms in complex spatial layout, and is applicable to point-to-multipoint wireless networks where multiple points do not communicate with each other directly.


The present disclosure provides a time synchronization method for a wireless load testing system, including two stages: a stage of constructing a wireless sensor system; and a stage of suppressing communication delay to achieve precise network-wide time synchronization.


The stage of constructing a wireless sensor system includes constructing a network model based on a consensus algorithm, constructing a clock model, updating compensation parameters of virtual logical clocks of nodes, and proposing a timestamp exchange mechanism based on a pseudo-periodic communication scheme.


The stage of suppressing communication delay to achieve precise network-wide time synchronization mainly includes: proposing a relative skew estimation method based on Bayesian theory to perform relative skew estimation; performing skew and offset compensation.


Compared with the prior art, the beneficial effects of the present disclosure are: (1) the relative skew estimator based on Bayesian estimation theory is employed to suppress the effect of time delay in wireless communication, thereby enhancing the estimation accuracy of the relative skew estimator while reducing memory requirements; (2) by applying the average consensus protocol, high-precision network-wide time synchronization is achieved; (3) the overall method enhances the robustness to time delay and has higher accuracy.





BRIEF DESCRIPTION OF THE DRAWINGS

The foregoing and other objects, features, and advantages of the present disclosure will become more apparent from the following detailed description of exemplary embodiments of the present disclosure taken in conjunction with the accompanying drawings, in which like reference numerals generally refer to the same parts throughout the exemplary embodiments of the present disclosure.



FIG. 1 is a flowchart of an exemplary embodiment of the present disclosure;



FIG. 2 is an exemplary wireless network node distribution diagram; and



FIG. 3A is a block diagram of a stage of constructing a wireless sensor network system.



FIG. 3B is a block diagram of a stage of suppressing communication delay to achieve precise network-wide time synchronization.



FIG. 4 is a structure diagram of a time synchronization method for wireless load testing in the present application.





DETAILED DESCRIPTION OF THE EMBODIMENTS

The technical solutions in the embodiments of the present disclosure will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only a part of the embodiments of the present disclosure rather than all of them. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without creative work shall fall within the scope of protection of the present disclosure.


Preferred embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While preferred embodiments of the present disclosure are illustrated in the accompanying drawings, it should be understood that the present disclosure may be embodied in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that the present disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.


The present disclosure provides a time synchronization method for a wireless load testing system. A flowchart of an exemplary embodiment is shown in FIG. 1. An exemplary wireless load testing system includes a central node and 12 sub-nodes, and transmits load data to an upper computer through wireless communication, as shown in FIG. 2.


The method according to the present disclosure mainly includes two stages: a stage of constructing a wireless sensor system, and a stage of suppressing communication delay to achieve precise network-wide time synchronization. A flowchart of each stage is shown in FIG. 3.


The stage of constructing the wireless sensor system includes: constructing a network model based on a consensus algorithm, constructing a clock model, updating compensation parameters of virtual logical clocks of nodes, and proposing a timestamp exchange mechanism based on a pseudo-periodic communication scheme.


The steps of the stage of constructing the wireless sensor system are as follows:


S1, constructing the network model based on the consensus algorithm.


Assuming communication topology is an undirected graph G=(N,ε) in a wireless network, where N={1, 2, . . . , N}represents a set of sensor nodes, and ε⊆N×N represents a set of effective communication links. αij represents a non-empty adjacency element, and if and only if there is a directed link in G, a set of direct neighbor nodes of a sub-node i can be expressed as Ni={j|(i,j)}∈ε, where (i,j)∈ε represents that the node i can communicate with a node j in one hop. For the state of a certain sub-node i, the consensus algorithm can be adopted to construct the following linear model:









x
i

(

k
+
1

)

=



x
i

(
k
)

+




j


N
i





α

ij



[



x
j

(
k
)

-


x
i

(
k
)


]




;






    • where k is the number of iterations; and xi(k) represents the linear model obtained after k iterations of the node i. if the linear model based on the consensus algorithm is applied to a clock update equation, the clocks of the nodes can be driven to a common clock.





S2, constructing a node virtual logic clock updating model based on a timestamp exchange mechanism based on a pseudo-periodic communication scheme.


S21, constructing a clock model.


Each sensor node has a local hardware clock whose first-order dynamic function is expressed as:









C
i

(
t
)

=



α
i


t

+

β
i



;






    • where ci(t) is the hardware clock reading at absolute reference time t, and αi and βi are local hardware clock skew and offset, respectively; the clock model is established as follows by using hardware clock data of any two nodes to obtain indirect information of the nodes:












C
j

(
t
)

=





α
j


α
i





c
j

(
t
)


+

(


β
j

-



α
j


α
i




β
i



)


=



α

ij






c
j

(
t
)


+

β


ij





;






where
,


α
ij

=


α
j


α
i



,


β
ij

=


β
j

-



α
j


α
i





β
i

.








Since the local hardware clock cannot be manually modified, it is proposed that the node maintains a virtual logic clock to represent the synchronization time. The model is as follows:










c
^

j

(
t
)

=




α
i




c
i

(
t
)


+

β
i


=



α
i




α
i

(
t
)


+


α
i



β
i


+

β
i




;






    • where, αi and βi represent skew compensation and offset compensation, respectively, and αi=αiαi and βi=αiβ1i are defined as virtual logical clock skew and offset, respectively.





S22, updating compensation parameters of virtual logical clocks of nodes.


The compensation parameters of the virtual logic clock model are updated periodically and iteratively, such that the logic clocks of each sensor node approximate a common clock, c(t)=αt+β.


The compensation parameters of the virtual logic clocks of the nodes are updated, such that (αi,βi) satisfies:






{







lim

k







α
i

(
k
)



α
i



=

α
¯










lim

k







α
i

(
k
)



β
i



+


β
i

(
k
)


=

β
¯





;







    • wherein, c(t) represents the common clock, and α and β represent the updated compensation parameters of the virtual logic clocks of the nodes.





S23, proposing a timestamp exchange mechanism based on a pseudo-periodic communication scheme.


Each node broadcasts time information with an MAC layer timestamp to neighbor nodes in each synchronization period T. The neighbor nodes record local clocks immediately after receiving the information. Assuming a k-th broadcast of the node i with communication delay to a neighbor node j, ci(tki)=kT represents the k-th transmission time of the node i, where represents the transmission instant at the corresponding absolute moment, and assuming the node j obtains the k-th message at its local time cj(tkij), where tki represents the instant time at which the node j receives the message within the absolute time, so tkij>tki, and








t
k


ij


=



t
k
i

+


d


ij


(

t
k


ij


)


=


t
k
i

+


d


ij

r

(

t
k


ij


)

+

d


ij

f




,

k
=
1

,
2
,



;







    • where, dij(tkij) represents the communication delay, and is composed of random delay dijr(tkij) and fixed delay dijf.





Based on the communication delay, it is assumed that for any communication link between any two nodes, the delay exists as a positive and bounded independent random variable, i.e., 0<dij(tkij)≤Md, where Md is a positive real constant; in addition, it is assumed that each node neither updates the virtual logical clock of the node nor obtains the time information sent by the neighbor nodes of the node until a time duration is greater than Md.


S3, constructing a relative skew estimator based on Bayesian theory, and estimating undetermined parameters in the updating the virtual logic clocks of the nodes, such that the logic clocks of each sensor node approximate a common clock.


Including performing relative skew estimation, and performing skew and offset compensation.


In order to offset the effect of delay, a relative skew estimation method based on Bayesian theory is proposed.


Assuming each node i periodically broadcasts time information to its neighbor node j, where the time information includes a node ID, an information transmission sequence number, a current hardware clock value, a logical skew compensation value and an offset compensation value. Considering that the communication delay includes random delay and fixed delay, the time information exchanged between the node i and the node j is reconstructed as:








c
j

(

t
k


ij


)

=



α


ij





c
i

(

t
k
i

)


+

β


ij


+


d


ij

r

(

t
k


ij


)

+


d


ij

f

.






Analyzing the effect of other unknown parameters of relative skew by subtracting the time information, to obtain the following formula:









c
j

(

t
k


ij


)

-


c
j

(

t

k
-
1



ij


)


=



α


ij


(



c
i

(

t
k
i

)

-


c
i

(

t

k
-
1

i

)


)

+


(



d


ij

r

(

t
k


ij


)

-


d


ij

r

(

t

k
-
1



ij


)


)

.






In the actual time synchronization process, when a message from the node i is not received by the neighbor node j within the time duration Md, the synchronization message will be considered as discarded.


Based on Bayesian estimation theory, an error function of the to-be-estimated parameter αij is expressed as e=αij−αij.


And then a quadratic function is defined as C(e)=e2=(αij−αij)2.


The relative skew is estimated by a Bayesian mean square error R=E(C(e))=E((αij−αij)2).


By applying the relative skew to a probability density function p(Δcj(n),αij), according to Bayesian principle, it can be obtained that p(Δcj (n), αij)=p(αij|Δcj(n)pΔcj(n)).


So,








B


mse


(

α


ij


)

=



(





(


α


ij


-

α


ij



)

2



p

(


α


ij


|

Δ



c
j

(
n
)



d

(


α




ij


)



)

×

p

(

Δ



c
j

(
n
)


)



d
(


(

Δ



c
j

(
n
)


)

.










Since p(Δcj(n))≥0 holds for all Δcj(n), if the integral in parentheses can be minimized for each Δcj(n), then Bmse will be minimized, and the estimator of minimizing Bmse is the average of the posterior joint conditions of αij=E(αij|Δcj(n)).








α




ij


=


E

(


α


ij


|

Δ



c
j

(
n
)



)

=





σ

α


ij


2


T




(

N
-
1

)



T
2



σ

α
ij

2


+

2


σ
2









n
=
1


N
-
1



Δ



c
j

(
n
)




+



2


σ
2



μ

α


ij




T




(

N
-
1

)



T
2



σ

α


ij


2


+

2


σ
2




.







The equivalent recursive solution to the above formula is as follows:








α


ij


(
n
)

=



α


ij


(

n
-
1

)

-




σ

α
ij

2



T
2





(

n
-
1

)



T
2



σ

α
ij

2


+

2


σ
2




×

(



α


ij


(

n
-
1

)

-



Δ



c
j

(

n
-
1

)


T

.









In the case of bounded delay, the bounded convergence of the time synchronization algorithm depends on the convergence rate and attenuation rate of the relative skew estimation error. The convergence and convergence rate of the above formula are analyzed to determine the effectiveness of the relative skew estimation. The analysis method is as follows:








α


ij


(
n
)

=




σ

α
ij

2




T
2

[



c
j

(

t
n


ij


)

-


c
j

(

t

n
-
1



ij


)

+

+


c
j

(

t
2


ij


)

-


c
j

(

t
1


ij


)


]





(

n
-
1

)



T
2



σ

α
ij

2


+

2


σ
2




+



2


σ
2



μ

α
ij






(

n
-
1

)



T
2



σ

α
ij

2


+

2


σ
2




.






After the hardware local time cj(tkij) of the k-th data packet received by the node j is substituted into the above formula, it can be obtained that αij(n)=αij(1+εij(n)).

    • when,









ε
ij

(
n
)

=





σ

α
ij

2




T
2

[



d
ij
r

(

t
n


ij


)

-


d


ij

r

(

t
1


ij


)


]


+

2


σ
2



μ

α


ij







(



(

n
-
1

)



T
2



σ

α
ij

2


+

2


σ
2



)



α


ij




+


2


σ
2





(

n
-
1

)



T
2



σ


α


ij

2


+

2


σ
2






;






    • to obtain,











ε


ij


(
n
)






"\[LeftBracketingBar]"




2


σ

α


ij


2



T
2



M
d


+

2


σ
2



μ

α


ij








α


ij


(

n
-
1

)



T
2



σ

α


ij


2





"\[RightBracketingBar]"


.





Therefore, for any n∈N+,








ε


ij


(
n
)






"\[LeftBracketingBar]"




2


σ

α


ij


2



T
2



M
d


+

2


σ
2



μ

α


ij








α


ij


(

n
-
1

)



T
2



σ

α


ij


2





"\[RightBracketingBar]"


.





The convergence speed of εij(n) is equal to O(1/(n-1)), so limn→∞{circumflex over (α)}ij(n)=αij, which proves the effectiveness of the relative skew estimator.


S4, updating logical skew compensation and offset compensation of the nodes.


When the node j obtains the n-th synchronization packet from the node i, the node j performs the n-th skew and offset compensation update at tnij using the following update rules.









α
j

(

t
+

)

=



(

1
-


a

(
n
)



ρ
a



)




α
j

(
t
)


+


a

(
n
)



ρ
a




α


ij


-
1


(
n
)




α
i

(
t
)




;





and








β
j

(

t
+

)

=



β
j

(
t
)

+


a

(
n
)




ρ
0

[




c
ˆ

i

(

t
n
i

)

-



c
ˆ

j

(

t
n


ij


)


]




,

i


N
j


,


t
=

t
n


ij



;







    • where, ρα∈(0,1) and ρ0∈(0,1) are tuning parameters, α(n)∈(n-1)−u is an attenuation factor, where u∈(0,1), is αj the skew compensation of the node i at t, and the initial condition for any node j∈N is set to αj(0)=1 and βj(0)=1. The introduction of a(n) into the above formula is to further weaken the adverse effect of the relative skew estimation error, so as to ensure the consistency of logical skew under communication delay.





The time synchronization method for wireless load testing system is processed by a time synchronization equipment for wireless load testing system.


As shown in FIG. 4, the time synchronization equipment for wireless load testing system includes: a processor 1001 (such as Central Processing Unit, CPU), a communication bus 1002, an input port 1003, an output port 1004, and a memory 1005. Among them, the communication bus 1002 is used to achieve connection communication between these components; the input port 1003 is used for data input; and the output port 1004 is used for data output, and the memory 1005 can be high-speed RAM memory or non volatile memory, such as disk memory, non-transitory computer-readable storage medium. Optionally, memory 1005 is a storage device independent of the aforementioned processor 1001.


The memory 1005, as a non-volatile readable storage medium, may include an operating system, network communication module, application program module, and a time synchronization equipment for wireless load testing system. The network communication module is mainly used to connect to servers and communicate data with them; And processor 1001 is used to call the program to process the method stored in memory 1005, and execute all steps of the time synchronization method for wireless load testing system mentioned above.


The above technical solutions are only exemplary embodiments of the present disclosure. For those skilled in the art, various modifications and variations can be made to the disclosed methods and principles of the present disclosure, and are not limited to the methods described in the above specific embodiments of the present disclosure. Accordingly, the foregoing description is intended to be illustrative only and not to be taken in a limiting sense.

Claims
  • 1. A time synchronization method for a wireless load testing system, comprising the following steps: S1, constructing a network model based on a consensus algorithm for updating virtual logic clocks of nodes;S2, constructing a node virtual logic clock updating model based on a timestamp exchange mechanism based on a pseudo-periodic communication scheme;S3, constructing a relative skew estimator based on Bayesian theory, and estimating undetermined parameters in the updating the virtual logic clocks of the nodes, such that the logic clocks of each sensor node approximate a common clock; andS4, updating logical skew compensation and offset compensation of the nodes.
  • 2. The method according to claim 1, wherein the network model based on the consensus algorithm in step S1 comprises: assuming communication topology is an undirected graph G=(N,ε) in a wireless network, where N={1, 2, . . . , N}represents a set of sensor nodes, and ε⊆N×N represents a set of effective communication links; and αij represents a non-empty adjacency element, and if and only if there is a directed link in G, a set of direct neighbor nodes of a sub-node i is expressed as Ni={j|(i,j)}∈ε, where (i,j)∈ε represents that the node i communicate with a node j in one hop, for the state of a certain sub-node i, the consensus algorithm is adopted to construct the following linear model:
  • 3. The method according to claim 1, wherein the step S2 specifically comprises: S21, constructing a clock model;wherein, each sensor node having a local hardware clock whose first-order dynamic function is expressed as:
  • 4. The method according to claim 3, wherein step S3 comprises: assuming each node i periodically broadcasts time information to its neighbor node j, where the time information includes a node identification (ID), an information transmission sequence number, a current hardware clock value, a logical skew compensation value and an offset compensation value; considering that the communication delay includes random delay and fixed delay, the time information exchanged between the node i and the node j is reconstructed as:
  • 5. The method according to claim 4, wherein step S4 specifically comprises: when the node j obtains the n-th synchronization packet from the node i, the node j performs the n-th skew and offset compensation update at tnij using the following update rules:
Priority Claims (1)
Number Date Country Kind
2023115241601.0 Nov 2023 CN national
CROSS REFERENCE TO RELATED APPLICATIONS

This application is a continuation application of international application number PCT/CN2023/135751, filed December, 2023, which claims priority to Chinese patent application 2023115241601, filed on Nov. 15, 2023. The contents of these applications are incorporated herein by reference in their entirety.

Continuations (1)
Number Date Country
Parent PCT/CN2023/135751 Dec 2023 WO
Child 18954451 US