The present invention relates generally to tone generation apparatus of a waveform memory type, and more particularly to a tone generation apparatus in which waveform data are prestored in a NAND-type flash memory and the thus-prestored waveform data are reproduced while being read out from a waveform memory via a buffer.
Heretofore, there have been known tone generation apparatus, in which waveform data are prestored in a hard disk (HD) and then read out for audible reproduction by being read out from a buffer to a waveform memory while being read out from the hard disk to the buffer. Examples of such tone generation apparatus are disclosed in Japanese Patent Nos. 2671747 and 4089687. In such tone generation apparatus, where the waveform data are read out, in response to a tone generation instruction, from the hard disk to the waveform memory via the buffer and audibly reproduced, there would occur a delay in tone generation start timing, and thus, an arrangement is employed for pre-reading (pre-loading) a leading portion of the waveform data to the waveform data at the time of powering-on of the tone generation apparatus. Reproduction, of the pre-loaded data of the leading portion thus stored in the waveform memory is started immediately in response to a tone generation instruction. During the reproduction of the leading portion of the waveform data, a next portion of the waveform data following the leading portion is read out from the hard disk to the waveform memory via the buffer. After the reproduction of the leading portion of the waveform data is completed, the waveform data having already been read out to the waveform memory are reproduced, during which time another next portion of the waveform data is read out from the hard disk to the waveform memory via the buffer. Such operations are repeated to continue reproducing the waveform data. In the aforementioned manner, tone generation can be started with no delay in response to the tone generation instruction.
According to the aforementioned conventionally-known technique, a transfer request interrupt is issued to a CPU each time the waveform data (waveform sample data) of one cluster have been read out to the waveform memory (namely, each time the buffer gets empty). In response to such a transfer request interrupt, the CPU specifies another cluster of the hard disk to be read out and instructs a transfer section to transfer the other cluster from the hard disk to the buffer. Therefore, with the conventionally-known technique, an interrupt process by the CPU is essential.
Further, waveform memory tone generators using burst transfers have been known, one example of which is disclosed in Japanese Patent No 3163984. In the waveform memory tone generator, waveform samples read out from a and tones are generated by necessary waveform samples being selectively read out from the buffer memory. The readout of the waveform samples from the waveform memory to the buffer memory is executed by bust-transferring the waveform samples in units or blocks of a plurality of samples. Burst transferring the waveform samples like this can shorten a necessary access time.
In recent years, the NAND-type flash memory has been increasing in capacity and decreasing in cost, and attempts have been made to use NAND-type flash memories, together with hard disks, in a variety of devices. Although the NAND-type flash memory would take time to make immediate access to a page (corresponding to a cluster of the hard disk), it can achieve a rapid data transfer speed once sample readout is started. Further, with the NAND-type flash memory, error correction based on error correction code is essential.
With the aforementioned tone generation apparatus using the hard disk, an access speed to the hard disk would become a bottleneck so that the number of channels capable of simultaneously reproducing waveform sample data (i.e., generating tones based on waveform sample data) is limited, although there is a need for the tone generation apparatus to maximize the number of channels capable of simultaneously generating tones. One conceivable approach for maximizing the number of channels capable of simultaneously generating tones is to use a NAND-type flash memory in place of the hard disk. Because the NAND-type flash memory is much higher in access speed than the hard disk, it can greatly reduce a size of a cluster (page) (that is a minimum unit of waveform sample data), for example, to one-tenth or smaller. In such a case, however, the frequency of transfer request interrupts would greatly increase, for example, to ten times or more; namely, a load on the CPU would greatly increase.
However, with the conventionally-known technique, where the access speed to the hard disk would become a bottleneck, replacing the hard disk as-is with the NAND-type flash memory cannot be said to achieve a well-balanced design.
In view of the foregoing, it is an object of the present invention to reduce a load on a CPU and achieve a well-balanced design in a tone generation apparatus in which waveform data are prestored in a NAND-type flash memory and the thus-prestored waveform data are reproduced while being read out to a waveform memory via a buffer.
In order to accomplish the above-mentioned object, the present invention is characterized in that waveform sample data stored in a NAND-type flash memory or the like are read out on a page-by-page basis, i.e. in units of a page, with no interrupt given to a CPU, so that a buffer of a waveform memory can be supplied or replenished with waveform sample data. A series of waveform sample data are prestored in successive pages of the NAND-type flash memory or the like capable of high-speed page readout. The page number of a page to be read out first at the time of the start of tone generation, and the waveform sample data of that page are read into a buffer in advance. Before completion of readout of the first page, waveform samples data of another page to be read out next are read or loaded into the buffer. After that, the page number is incremented by one each time readout of one page is completed, and the waveform sample data of the incremented page number continue to be reproduced while being read into the buffer. Thus, every readout request generated following the start of tone generation can be processed with simple hardware without any interrupt being given to the CPU.
According to the present invention, page-by-page transfers by a transfer section can be automatically performed in response to an instruction form a transfer queue register without any interrupt being given to a control section (CPU). Thus, a load on the CPU can be reduced. In this way, the present invention can achieve a well-balanced design, taking into consideration bottlenecks of various sections that would occur when waveform sample data are to be transferred from the first memory to the second memory.
The following will describe embodiments of the present invention, but it should be appreciated that the present invention is not limited to the described embodiments and various modifications of the invention are possible without departing from the basic principles. The scope of the present invention is therefore to be determined solely by the appended claims.
For better understanding of the object and other features of the present invention, its preferred embodiments will be described hereinbelow in greater detail with reference to the accompanying drawings, in which:
In
A NAND-type flash memory 107 is a rewritable non-volatile memory having stored therein a plurality of sets of waveform data (i.e., sets of waveform sample data or waveform samples), where the waveform data are read and written on a page-by-page basis (in this case, each page comprises 2,048 bytes). The page-by-page data readout can be executed at a high speed by burst transfers. A memory map of the NAND-type flash memory 107 will be detailed later with reference to
An F-to-DP transfer section 108 performs a process for transferring waveform data from the NAND-type flash memory 107 to the DP RAM 109 on a page-by-page basis. A DP-to-M transfer section 110 performs a process for transferring waveform sample data from the DP RAM 109 to the waveform memory 111 in such a manner that waveform sample data of each page is transferred dividedly in a plurality of blocks. These transfer sections 108 and 110 operate under control of a transfer control section 112. Waveform sample data transfer timing will be detailed later with reference to
A tone generator 113, which includes a plurality of (128 (one-hundred and twenty-eight) in the illustrated example) tone generating channels (also referred to as “channel”), and, for each of the tone generating channels, generates a read address to read out waveform data (waveform sample data) from the waveform memory 11. Further, the tone generator 113 imparts an envelope to the read-out waveform sample data and thereby generates a tone signal for each of the tone generating channel. Further, the tone generator 113 mixes together the generated tone signals and imparts an effect, such as reverberation, to the mixed tone signal. The tone signal output from the tone generator 113 is converted into an analog audio signal via a DAC (Digital-to-Analog Converter) 114 and then audibly reproduced or sounded through a sound system 115.
“PA” indicates one of control registers, which sets a read address, in the pre-load region 301, of the first page to be read out first when the tone generator 113 should read out waveform samples from the waveform memory 111.
Reference numeral 411 in
Reference numeral 421 in
A time length of the waveform sample readout time period 421 is determined by a designer of the instant system on the basis of required specifications as to in how many channels tone generation should be performed in the apparatus and between how many points interpolation should be performed in each of the channels, and specifications as to with what degree of time resolution and how many samples can be read out within one DAC period when the tone generator 113 reads out waveform samples of individual channels on a time-divisional basis. A time length of the burst transfer time period 421 is determined by the designer of the system on the basis of required specifications as to how many samples need be transferred within this time period, and speed (or rate) specifications pertaining to the burst transfer from the DP RAM 109 to the waveform memory 111. However, because the DP RAM 109 is a memory capable of reading and writing data simultaneously and having a size corresponding to one page plus error correction code, waveform sample data of one page having been read out from the flash memory 107 to the DP RAM 109 need be transferred from the DP RAM 109 to the waveform memory 111 within the same number of DAC periods as the number of DAC periods required for the transfer of one page from the flash memory 107 to the DP RAM 109. Thus, in one burst transfer time period 422, it is necessary to transfer a predetermined number of waveform samples calculated by dividing the number of waveform samples of one page by the above-mentioned number of DAC periods (a fraction after the decimal point is rounded up). In the instant embodiment, because it takes four DAC periods to read out 2,048-data (=1,024 samples) of one page from the flash memory 107 to the DP RAM 109, the transfer of the waveform sample data, having been read out to the DP RAM 109, to the waveform memory 111 is also performed dividedly in four DAC periods. Thus, in one burst transfer time period 422, 256 waveform samples, which is one quarter of 2,048 bytes (=1,024 samples) of one page, are transferred to the waveform memory 111.
The instant embodiment is based on the assumption that interpolations between two points are performed in each of the channels so that tone generation is performed in a total of 128 channels, and it is assumed that the waveform sample readout time period 421 has a time length necessary for permitting such a tone generation process. Further, let it be assumed that the instant embodiment employs hardware capable of performing a burst transfer of 256 samples (=512 bytes) in the burst transfer time period 422 that is a time section, other than the waveform sample readout time period 421 and refreshing time period 423, of one DAC period. After waveform sample data of one page have been transferred from the DP RAM 109 to the waveform memory 111 in four DAC periods, error correction is performed on the waveform samples of one page (2,048 bytes), having been transferred to the buffer region of the waveform memory 111 by that time, on the basis of the error correction code stored in the DP RAM 109. With the NAND-type flash memory, such error correction is not required.
The “DP memory to→waveform memory” burst transfer is started in a DAC period two DAC periods later than the time point when the “NAND-type Flash→DP memory” was started. The reason why the “DP memory to→waveform memory” burst transfer is started in a DAC period two DACs later than the time point when the “NAND-type Flash→DP memory” was started is to allow one-page data of 2,048 bytes (=1,024 samples) (indicated at 412 in
(1) WA: This register is for setting therein an address of the second page W*(1) of the waveform data Wave* to be read out for the assigned channel from the NAND-type flash memory 107 shown and described in
(2)PA: This register is for setting therein the first page W*(0) of the waveform data Wave* to be read out for the assigned channel from the pre-load region 301 of the waveform memory 111 described above in relation to
(3) BA: This register is for setting therein respective addresses of the dual (double) buffers Bna and Bnb, corresponding to the assigned channel 302, in the buffer region 302 of the waveform memory 111 described above in relation to
(4) F: This register is for setting therein an F number that is a parameter for shifting the pitch of the waveform data to be read out. A value of the F number is determined in accordance with a pitch of a tone to be generated. Namely, the F number is set at a value “1” when no pitch shift from the pitch of the waveform data is to be made, at a value greater than “1” when an upward pitch shift from the pitch of the waveform data is to be made, and at a value smaller than “1” when a downward pitch shift from the pitch of the waveform data is to be made.
(5) IL, HT, 1DR, 2DR, 2DL and RR: These registers are for setting therein parameters for controlling an envelope of the tone. IL indicates an initial level, and HT indicates a hold time. These parameters instruct that the initial value IL should continue to be fixedly output throughout the hold time HT following the start of tone generation. The waveform data prestored in the NAND-type flash memory 107 are each waveform data that appears to allow a real tone to be achieved if tone volume variation in an original waveform is used as-is for a rising portion of the tone. For this reason, the initial value IL is output as envelope waveform data throughout the time section of the hold time HT corresponding to the rising portion of the tone. 1DR indicates a first decay rate, and 1DL indicates a first decay level. These are parameters for outputting an envelope waveform that, following the hold time HT, leads to a first target value indicated by the first decay level 1DL at a variation rate indicated by the first decay rate 1DR. Similarly to above, 2DR indicates a second decay rate, and 2DL indicates a second decay level. These are parameters for outputting an envelope waveform that, following the first decay, leads to a second target value indicated by the second decay level 2DL at a variation rate indicated by the second decay rate 2DR. Once note-off timing arrives after the second decay, the tone volume level is gradually decreased at a variation rate indicated by the release rate RR. Once the tone volume level decreases to a predetermined level or below, the tone is deadened (silenced).
(6) NON: This register is for setting therein a note-on parameter instructing the start of tone generation.
Once the CPU 101 sets the above-mentioned parameters, including the note-on parameter, into the control register 501 corresponding to the assigned channel, the tone generator 113 starts a tone generation process in the channel. Note that various parameters shown in the block of the tone generator 113 of
The following describe processing performed for one of the channels in various blocks. Similar processing is performed for all of the 128 channels on the time-divisional basis so that a plurality of tones are generated concurrently in a parallel fashion.
Note-on parameter and F number are input to the pitch counter 503. The pitch counter 503 is reset to zero at the note-on timing and then accumulates the F number every DAC period. The accumulated value is output as an integer portion address and a decimal portion address. Although the pitch counter 503 continues accumulating the F number even after note-off of the tone, it stops accumulating the F number once the tone generation processing for the channel is brought to an end, Lower ten bits of the integer portion of the accumulated value output from the pitch counter 503 are supplied to a readout section 506.
A PB address generation section 505 receives the PA (i.e., address of the first page in the pre-load region 301 of the waveform memory 111 (see
An interpolation section 507 performs, every DAC period, two-point (linear) interpolation between the read-out two samples in accordance with a decimal portion address (output from the pitch counter 503), to thereby calculates one interpolated sample. The interpolation section 507 outputs an interpolated sample “0” for each channel of where the tone generation process has been terminated.
An amplitude envelope generator (EG) 502 generates an amplitude envelope (AE) waveform on the basis of an envelope waveform generating parameter of the channel in question, and then it outputs the thus-generated amplitude envelope to a tone volume control section 508. Every DAC period, the tone volume control section 508 controls an amplitude of the interpolated sample on the basis of a value of the amplitude envelope (AE) waveform and outputs the amplitude-controlled interpolated sample as a tone sample of the channel in question. Every DAC period, an accumulation section 509 accumulates tone samples of all of the channels and outputs the accumulated result as a tone sample of all of the channels. Note that the tone sample may be output with a reverberation and other effect imparted thereto via a not-shown effect imparting section.
The upper bits of the integer portion (from which the lower ten bits of the integer portion have been removed) output from the pitch counter 503 are input to a C address generation section 504 and the PB address generation section 505. To the C address generation section 504 is also input an address WA of a second page in the NAND-type flash memory 107 (see
The C address generated for the channel in question is input, together with the channel number of the channel, to a transfer queue (register) 521 provided within the transfer control section 112. The transfer queue (register) 521 is a first-in-first-out (FIFO) queue. Once a transfer instruction is output from the pitch counter 503, the transfer queue 521 takes in and registers the C address and channel number into the transfer queue, timing of which will be described later with reference to
When no page data is being transferred from the NAND-type flash memory 107 to the DP RAM 109, an F-to-DP transfer instruction section 522 takes out the C address and channel number from the transfer queue 521 and instructs the F-to-DP transfer section 108 to transfer the page data, stored in the NAND-type flash memory 107 and specified by the C address, to the DP RAM 109. In response to the instruction from An F-to-DP transfer instruction section 522, the F-to-DP transfer section 108 transfers the one-page data (411-413 in
Further, when the F-to-DP transfer instruction section 522 outputs the transfer instruction to the F-to-DP transfer section 108, it also transmits the transfer instruction and channel number to a DP-to-M transfer instruction section 523. In response to the transfer instruction, the DP-to-M transfer instruction section 523 outputs the channel number and transfer instruction to the DP-to-M transfer 110 to control the DP-to-M transfer 110 to burst transfer the page data of the DP RAM 109 to the buffer of the waveform memory 111 corresponding to the channel. In this manner, a burst transfer (422 in
Note that, when 256 words are to be transferred to the buffer of the channel in the waveform memory 111 through the “DP memory→waveform memory” burst transfer, it is necessary to determine in advance to which of the two buffers B*a and B*b the 256 words should be transferred. At that time point, the tone generator 113 in the instant embodiment should already being reading out waveform samples from any one of the pre-load region 301 and buffers B*a and B*b of the waveform memory 111 for that channel, and thus, the instant embodiment sets the buffer B*b as the burst transfer destination if waveform samples are being read out from the pre-load region 301 or buffer B*a, or sets the buffer B*a as the burst transfer destination if waveform samples are being read out from the buffer B*b.
“Transfer Instruction” in
“C Address” in
Furthermore, “Transfer Execution Timing” in
The following describe a timing design pertaining to access to the NAND-type flash memory 107. In the instant embodiment, the sampling frequency is 44.1 kHz, and one DAC period is 22.67 nsec, as mentioned earlier. As described above in relation to
Now consider a case where an upward pitch shift is made through one octave in all of the tone generating channels. In this case, the waveform samples are read out with the F number set at a value “2” in all of the tone generating channels, and thus, 1,024 every other (i.e., every second) waveform sample of one page transferred to the waveform memory 111 in response to one access is used in each DAC period, so that reproduction of the 1,024 waveform samples can be completed in 512 DACS that is half of the DACs in the fundamental reproduction period. Therefore, the unit access can be performed 512/4 (=128) times during the fundamental reproduction period. Thus, in the case where an upward pitch shift is made through one octave in all of the tone generating channels, the maximum number of reproducible channels is 128. This case corresponds to a later-described first example.
As seen from the foregoing, the number of the channels capable of generating tones and an upper limit of the F number (upper limit of an upward pitch shift) are in a tradeoff relationship. Thus, because the fundamental reproduction period is determined on the basis of the specifications of the flash memory 107 (particularly, size of a page and the number of DACs required for the unit access), the number of the channels capable of generating tones and the upper limit of the F number (when an upward pitch shift is to be made simultaneously in all of the channels) may be determined on the basis of such specifications of the flash memory 107. Namely, if the number of the channels capable of generating tones is already determined, the F number may be determined in correspondence with the number of the channels capable of generating tones. If, on the other hand, the upper limit of the F number is already determined, then the number of the channels capable of generating tones may be determined in correspondence with the upper limit of the F number. Note that, when a downward pitch shift is to be made, waveform sample data can be reproduced for more than the fundamental reproduction period with each page comprising 1,024 waveform samples, and the unit access can be performed an increased number of times than in the aforementioned case; thus, the relationship between the number of the channels capable of generating tones and the upper limit of the F number will have a little leeway.
The following describe a timing design pertaining to access to the waveform memory 111. In the instant embodiment, 1,024 samples transferred to the DP RAM 109 in response to one unit access are burst transferred to the waveform memory 111 dividedly in four DAC periods, 512 bytes per DAC period (see
The following explain terms “band width” and “total band width” used herein. The term “total band width” is used herein to refer to a maximum number of pages that can be read out from the flash memory 107 in the abovementioned fundamental reproduction period (i.e., reproduction period in which waveform sample data of one page are reproduced at a rate of one sample per sampling period); in other words, the “total band width” means an upper limit of the number of times the transfer instruction can be issued in the fundamental reproduction period. For example, in a case where tone generation is performed in a given tone generating channel with the F number set at “1”, and if the transfer instruction is issued only once in the fundamental reproduction period (1,024 DACs), then 1,024 samples written into the waveform memory 111 through the one transfer can realize waveform sample reproduction with the F number of “1” in the fundamental reproduction period; thus, the band width for the channel is “1”. If the F number is “2”, the band width for the channel is “2”. Further, if the F number is “1.1”, eleven transfer instructions (i.e., transfers of eleven pages) are required in ten fundamental reproduction periods, and thus, two extra transfer instructions must be issued somewhere in the ten fundamental reproduction periods, in which case the band width for the channel is “2”. Thus, a value obtained by rounding up a decimal portion of the F number becomes the band width of that channel. Further, there is a need for preventing a sum of the band widths of all of the tone generating channels from exceeding the total band width.
Now, a description will be given about three examples employed in the embodiment of the system corresponding to various conditions of the timing design.
The following describe the first example. In the first example, the upper limit of the F number is limited to “2”, and the number S of the tone generating channels is set at “128” that is an upper limit assuming a case where an upward pitch shift is made through one octave in all of the channels simultaneously. Here, the total band width T is “256”, and the number S of the tone generating channels is set at “128” smaller than the total band width of “256”.
As noted above, a plurality of waveform data recorded with different tone pitches are prestored in advance for each of various tone colors. At step 702 of
In the first example, the waveform selection information is devised in such a manner that waveform data, of which the F number determined at step 704 above takes a value equal to or smaller than “2” is selected. More specifically, for each of a plurality of waveform data of a certain tone color, an upper limit of note numbers of regions to which the waveform data is allocated is made equal to or smaller than a note number corresponding to a pitch to which the waveform data is shifted upward through one octave.
By providing such waveform selection information in corresponding relation to various tone colors, the F number determined at step 704 in relation to the waveform data selected at step 702 in accordance with the note number nn can be made equal to or smaller than “2”. Whereas the F number has been described above as limited to the upper limit of “2”, the upper limit need not necessarily be “2” and may be “2.5” or less, or “3” or less. In short, it is only necessary that an integer portion of a quotient, calculated by the total band width T being divided by the number S of the channels (i.e., TIS), be equal to or smaller than the F number. Thus, it is only necessary to prepare in advance a plurality of waveform data per tone color, select one of the waveform data such that the F number can be equal to or smaller than the integer portion of the quotient TIS and determine the F number when determining, at steps S702 and 704 of
The following describe the second example. In the second example, the upper limit of the F number is not limited, and the number of unit access (band width) for all of the channels in the fundamental reproduction period is limited to the total band width that is an upper limit. Namely, while an increased number of unit access in the fundamental reproduction period is required for each channel where an upward pitch shift has been made, the number of unit access can be reduced for each channel where a downward pitch shift has been made. Thus, in the second example, it is only necessary that the number of unit access (band width) for all of the channels in the fundamental reproduction period be limited to an upper limit of the number of times of unit access (i.e., total band width) as a whole.
If bw≦Tbw−Abw at step 722, it means that there is a band width that is to be allocatable, so that control jumps to step 726, where a search is made for an empty channel. If any empty channel has been found at step 727, the channel number of the empty channel is set into the register a at step 728, and control proceeds to step 732. If no empty channel has been found at step 727, the channel number of a channel where a generated tone is to be deadened is determined as a “note-off channel” and set into the register a at step 729, and then the generated tone of the channel determined at step 729 is rapidly attenuated and deadened (silenced) so that the channel is released at step 730. Then, Cbw(b) is subtracted from Abw at step 731, and control proceeds to step 732, where the band width bw allocated to the channel (a ch) is set into Cbw(a) and the band width bw is added to the currently-allocated total band width Abw.
Once the tone of the channel (c ch) designated as a note-off channel attenuates to below a predetermined level, the tone generation of the channel (c ch) is terminated to release the channel, and band information updating, i.e. “Abw←Abw−Cbw” and “Cbw(c)←0”, is performed. Whereas the process of
The following describe a third example. In the third example, an upper limit of the number of times of unit access and the number of the channels capable of generating tones are set at a same number to simplify the processing. Whereas the total band width Tbw of the tone generator 113 is “256” in the above-described embodiment of
In each of the first to third examples, as shown and described in
The various values mentioned above in each of the examples may be modified as necessary. Each of the pages in the flash memory 107 is not limited to the size of 2,048 bytes and may be of any other suitable size, such as 1,024 bytes or 4,096 bytes, depending on the specifications of the flash memory 107. Further, the number T of times of unit access in the fundamental reproduction period is not limited to 256 and may be any other suitable number, such as 300, 450 or 512, depending on the specifications of the flash memory 107. Further, the number of waveform sample data read out from the waveform memory 111 is not limited to 256 (two samples for each of 128 channels) and may be any other suitable number, such as 310, 460 or 512, depending on specifications as to with what degree of time resolution of slots each waveform data sample can be read out when the tone generator 113 reads out waveform samples from the waveform memory 111. Furthermore, the number of channels capable of generating tones is not limited to 128 and may be any other suitable number, such as 64, 80 or 160, under various conditions that may become bottlenecks as discussed above.
Furthermore, whereas the embodiment of the present invention has been described in relation to the case where a two-point interpolation process is performed by the interpolation section 507, the interpolation section 507 may perform interpolation between any desired number of points, such as three point or four points. If four-point interpolation is performed, for example, successive four waveform samples are read out per channel from the waveform memory 111 through one readout operation, and thus, the number of channels capable of generating tones may have to be reduced. When a plurality of waveform samples are to be read out from the waveform memory 111, they may be read out at a high speed in the burst mode; the third example has been described as constructed to read out a plurality of waveform samples per channel in the burst mode. Furthermore, the interpolation section 507 may be provided with a waveform sample buffer.
In the above-described embodiment, desired blocks may be integrated together in a one-chip LSI in any one of the following three ways.
(1) Five blocks of the tone generator 113, transfer control section 112, F→DP transfer section 108, DP RAM 109 and DP→M transfer section 110 may be integrated in a single chip. The waveform memory 111 is constructed by another chip. In this case, it is necessary to perform waveform sample writing and reading to and from the waveform memory 111 in the burst mode to increase the writing and reading speed.
(2) Six blocks of the tone generator 113, transfer control section 112, F→DP transfer section 108, DP RAM 109, DP→M transfer section 110 and waveform memory 111 may be integrated in a single chip. In this case, the waveform memory 111 in the single chip can achieve waveform sample writing and reading at a sufficiently high speed, and thus, the waveform sample writing and reading need not be performed in the burst mode.
(3) The number of the blocks to be integrated in a single chip may be increased as desired in accordance with evolution of processing, for example, by incorporating various I/Os and CPU into a single chip.
In the above-described embodiment, each waveform data is stored in successive pages of the NAND-type flash memory. Alternatively, desired waveform data may be stored distributively in non-successive pages of the NAND-type flash memory. Furthermore, the functions performed by the C address generation section and transfer queue (register) may be performed by the CPU as interrupt processes using a transfer request signal as an interrupt signal.
This application is based on, and claims priority to, JP PA 2009-069357 filed on 23 Mar. 2009. The disclosure of the priority application, in its entirety, including the drawings, claims, and the specification thereof, is incorporated herein by reference.
Number | Date | Country | Kind |
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2009-069357 | Mar 2009 | JP | national |