Claims
- 1. A method of identifying stuck-on transmitting of a transceiver in a train network where the transceiver draws a first current for transmitting and a second current for receiving, the method comprising:sensing the current drawn by the transceiver; determining if the sensed current is between the first and second currents; and identifying a stuck-on transmitter if the sensed current is determined to be between the first and second currents for more than a preset amount of time.
- 2. The method according to claim 1, wherein the current is sensed using a current mirror and the determining is performed by a comparator connected to the current mirror.
- 3. The method according to claim 2, wherein the identifying is performed by a microprocessor which measures the time and identifies a stuck-on transmitter.
- 4. The method according to claim 3, wherein the microprocessor disables the transmitter when identified a stuck-on.
- 5. The method according to claim 1, including disabling the transmitter when identified as stuck-on.
- 6. A transceiver control circuit for a transceiver in a train network wherein the transceiver draws a first current for transmitting and a second current for receiving, the circuit comprising:a current sensor sensing the current drawn by the transceiver; a comparator determining if the sensed current is between the first and second currents; a timer determining the amount of time the sensed current is between the first and second currents; and a controller identifying a stuck-on transmitter when the amount of time, the sensed current is determined to be between the first and second currents, is more than a preset amount of time.
- 7. The circuit according to claim 6, wherein the current senor includes a current mirror connected to the transceiver and the comparator.
- 8. The circuit according to claim 6, wherein the timer and the controller are in a microprocessor.
- 9. The circuit according to claim 6, wherein the controller disables the transmitter when identified as stuck-on.
- 10. The circuit according to claim 9, the controller maintains a disable signal at a reset terminal of the transceiver to disable the transmitter.
- 11. The circuit according to claim 10, including a reset circuit connected to reset terminals of the transceiver and the controller and a diode connected between the reset terminals of the transceiver and the controller to isolate the disable signal from the transceiver reset terminal.
- 12. The circuit according to claim 10, including a reset circuit connected to reset terminals of the transceiver and the controller and the controller subsequently removes the disable signal from the transceiver reset terminal and the reset circuit provides a reset signal to the reset terminals of the transceiver and the controller.
Parent Case Info
This application is a 371 of PCT/US01/42011 filed Sep. 6, 2001 which claims benefit of 60/232,482 filed Sep. 13, 2000.
PCT Information
Filing Document |
Filing Date |
Country |
Kind |
PCT/US01/42011 |
|
WO |
00 |
Publishing Document |
Publishing Date |
Country |
Kind |
WO02/23503 |
3/21/2002 |
WO |
A |
US Referenced Citations (5)
Provisional Applications (1)
|
Number |
Date |
Country |
|
60/232482 |
Sep 2000 |
US |