The present application relates to ultrasound devices having an amplifier for amplifying received ultrasound signals.
Ultrasound probes often include one or more ultrasound sensors which sense ultrasound signals and produce corresponding electrical signals. The electrical signals are processed in the analog or digital domain. Sometimes, ultrasound images are generated from the processed electrical signals.
According to an aspect of the present application, an ultrasound apparatus is provided, comprising an ultrasound sensor and a variable current trans-impedance amplifier (TIA). The variable current TIA is coupled to the ultrasound sensor and configured to receive and amplify an output signal from the ultrasound sensor. The variable current TIA has a variable current source.
According to an aspect of the present application, a method is provided, comprising acquiring an ultrasound signal with an ultrasound sensor during an acquisition period and outputting, from the ultrasound sensor, an analog electrical signal representing the ultrasound signal. The method further comprises amplifying the electrical signal with a variable current trans-impedance amplifier (TIA), including varying a current of the variable current TIA during the acquisition period.
According to an aspect of the present application, a method is provided, comprising acquiring an ultrasound signal with an ultrasound sensor during an acquisition period and outputting, from the ultrasound sensor, an analog electrical signal representing the ultrasound signal. The method further comprises amplifying the electrical signal with a variable current trans-impedance amplifier (TIA), including decreasing a noise floor of the variable current TIA during the acquisition period.
Various aspects and embodiments of the application will be described with reference to the following figures. It should be appreciated that the figures are not necessarily drawn to scale. Items appearing in multiple figures are indicated by the same reference number in all the figures in which they appear.
Aspects of the present application relate to amplification circuitry for an ultrasound device. An ultrasound device may include one or more ultrasonic transducers configured to receive ultrasound signals and produce electrical output signals. Thus, the ultrasonic transducers may be operated as ultrasound sensors. The ultrasound device may include one or more amplifiers for amplifying the electrical output signals. The power consumed by, the noise generated by, and the linear signal amplification quality provided by, the amplifier may depend on an amount of current consumed by the amplifier. In some embodiments, the amplifier has a variable current source. The variable current source is adjusted during acquisition of an ultrasound signal to maintain the noise level of the amplifier below the signal level and to maintain linear amplification, while at the same time reducing the amount of power consumed by the amplifier. In some embodiments, the amplifier is a TIA.
The aspects and embodiments described above, as well as additional aspects and embodiments, are described further below. These aspects and/or embodiments may be used individually, all together, or in any combination of two or more, as the application is not limited in this respect.
The circuit 100 further comprises N circuitry channels 104a . . . 104n. The circuitry channels may correspond to a respective ultrasonic transducer 102a . . . 102n. For example, there may be eight ultrasonic transducers 102a . . . 102n and eight corresponding circuitry channels 104a . . . 104n. In some embodiments, the number of ultrasonic transducers 102a . . . 102n may be greater than the number of circuitry channels.
The circuitry channels 104a . . . 104n may include transmit circuitry, receive circuitry, or both. The transmit circuitry may include transmit decoders 106a . . . 106n coupled to respective pulsers 108a . . . 108n. The pulsers 108a . . . 108n may control the respective ultrasonic transducers 102a . . . 102n to emit ultrasound signals.
The receive circuitry of the circuitry channels 104a . . . 104n may receive the electrical signals output from respective ultrasonic transducers 102a . . . 102n. In the illustrated example, each circuitry channel 104a . . . 104n includes a respective receive switch 110a . . . 110n and an amplifier 112a . . . 112n. The receive switches 110a . . . 110n may be controlled to activate/deactivate readout of an electrical signal from a given ultrasonic transducer 102a . . . 102n. More generally, the receive switches 110a . . . 110n may be receive circuits, since alternatives to a switch may be employed to perform the same function. The amplifiers 112a . . . 112n, as well as amplifier 300 of
The circuit 100 further comprises an averaging circuit 114, which is also referred to herein as a summer or a summing amplifier. In some embodiments, the averaging circuit 114 is a buffer or an amplifier. The averaging circuit 114 may receive output signals from one or more of the amplifiers 112a . . . 112n and may provide an averaged output signal. The averaged output signal may be formed in part by adding or subtracting the signals from the various amplifiers 112a . . . 112n. The averaging circuit 114 may include a variable feedback resistance. The value of the variable feedback resistance may be adjusted dynamically based upon the number of amplifiers 112a . . . 112n from which the averaging circuit receives signals. In some embodiments, the variable resistance may include N resistance settings. That is, the variable resistance may have a number of resistance settings corresponding to the number of circuitry channels 104a . . . 104n. Thus, the average output signal may also be formed in part by application of the selected resistance to the combined signal received at the inputs of the averaging circuit 114.
The averaging circuit 114 is coupled to an auto-zero block 116. The auto-zero block 116 is coupled to a programmable gain amplifier 118 which includes an attenuator 120 and a fixed gain amplifier 122. The programmable gain amplifier 118 is coupled to an ADC 126 via ADC drivers 124. In the illustrated example, the ADC drivers 124 include a first ADC driver 125a and a second ADC driver 125b. The ADC 126 digitizes the signal(s) from the averaging circuit 114.
While
The components of
According to an embodiment, the components of
In this non-limiting embodiment, the amplifier 112a is implemented as a two-stage operational amplifier (“op-amp” for short). The first stage 202 is coupled to the ultrasonic transducer 102a. The second stage 204 is coupled between the first stage 202 and the averaging circuit 114. The second stage 204 provides the output signal of the amplifier 112a, in this non-limiting example.
The first stage 202 and second stage 204 each have a variable current source. The variable current source 203 is provided for the first stage 202 and sinks a current I1. The variable current source 205 is provided for the second stage 204 and sinks a current I2. Although the variable current sources 203 and 205 are illustrated as distinct from the respective stages 202 and 204, they may be considered part of the respective stages.
With a two-stage amplifier construction as shown in
Early during an acquisition period, the variable current source 203 may be controlled to sink a relatively small amount of current, while the current source 205 may be controlled to sink a relatively large amount of current. In such a scenario, the second stage 204 may operate to control the linearity of the amplified signal produced by the amplifier 112a, while the first stage 202 may control the noise of the amplified signal 202 to a lesser extent than that to which it is capable. Later in the acquisition period, the current sunk by the variable current source 203 may be increased while the current sunk by the variable current source 205 may be decreased. As the current sunk by the variable current source 203 is increased, the first stage 202 may operate to control the noise of the amplifier 112a to a greater extent. As the current sunk by the variable current source 205 is decreased, the second stage 204 may operate to control the linearity of the amplifier 112a to a lesser extent. Thus, dynamic current biasing of the amplifier 112a, and first stage 202 and second stage 204 more specifically, may be implemented to control the power, noise, and linearity characteristics of the amplifier during an acquisition period.
The dynamic control of current sources 203 and 205 may be achieved using a digital controller, an example being shown in
The amplifier 112a also includes a variable feedback impedance 206. In some embodiments, the variable feedback impedance is a variable RC feedback circuit. An example of the variable RC feedback circuit is illustrated in
It should be appreciated from
The amplifier 300 includes a first stage 306 and a second stage 308, which may be implementations of the first stage 202 and second stage 204 of
The second stage 308 includes a PMOS transistor 318 configured to receive the output of the first stage 306. In particular, the gate of PMOS transistor 318 is coupled to a node between transistors 314 and 316 of the first stage 306. The source of PMOS transistor 318 receives VDDA. A variable impedance circuit 320 is also provided in the second stage 308. The variable impedance circuit 320 includes a variable capacitor CC in series with a variable resistor RZ, and thus is a variable RC circuit in this embodiment. Variable impedance circuit 320 may provide stable operation of the amplifier 300 when the gain of the amplifier, or the currents of the currents sources, are varied. Thus, the variable impedance circuit may be provided to maintain stable operation of the amplifier 300 for all the current magnitudes sunk by the variable current sources 321 and 325. That is, the values of CC and RZ may be adjusted during operation of the amplifier 300 to account for the different current settings programmed by the digital controller 330
A variable current source is provided for each of the stages 306 and 308. The variable current source 321 for the first stage 306 includes three parallel connected current sources 322a, 322b, and 322c. Current source 322a sinks a current IA, current source 322b sinks a current 2IA, and current source 322c sinks a current 4IA. The current sources 322a-322c are coupled to the first stage 306 by respective switches 324a, 324b, and 324c, which effectively provides 3 bits (8 states) of control of the current. The current IA may equal 100 microAmps or +/−20% of that value, or any value or range of values within such ranges, as examples.
The variable current source 325 for the second stage 308 includes three parallel connected current sources 326a, 326b, and 326c. Current source 326a sinks a current IB, current source 326b sinks a current 2IB, and current source 326c sinks a current 4IB. The current sources 326a-326c are coupled to the second stage 308 by respective switches 328a, 328b, and 328c, which effectively provides 3 bits (8 states) of control of the current. The current IB may equal 50 microAmps or +/−20% of that value, or any value or range of values within such ranges, as examples.
While
A digital controller 330 is provided to control operation of the variable current sources 321 and 325. The digital controller provides control signals to (digitally) program the currents of the variable current sources. In the illustrated example, the digital controller 330 provides one or more switching signals S1 to control operation of the switches 324a-324c, and one or more switching signals S2 to control operation of the switches 328a-328c. In this manner, the amount of current sunk by the variable current sources may be varied independently during operation of the amplifier 300, for example during an acquisition period. According to a non-limiting example, the digital controller 330 decreases the current sunk by variable current source 325 during the acquisition period and increases the current sunk by variable current source 321 during the acquisition period through suitable operation of the switching signals S1 and S2.
The digital controller 330 may be any suitable type of controller. The digital controller may include integrated circuitry. In some embodiments, the digital controller 330 may include or be part of an application specific integrated circuit (ASIC). In some embodiments, the digital controller 330 may not be specific to the amplifier 300. For example, a digital controller may be provided to control more than one component of the circuit of
The amplifier 300 further includes a variable feedback impedance 332 formed by variable capacitor Cf and variable resistor Rf. The capacitor Cf and resistor Rf may be coupled between the output 304 and the input 302, and may be in parallel with each other. The variable feedback impedance 332 may control the gain of the amplifier 300. Thus, the values of Cf and Rf may be adjusted to vary the amplifier's gain.
The variable feedback impedance 332 and the variable impedance circuit 320 may be controlled in any suitable manner. In one embodiment, the digital controller 330 may set the values of the feedback impedances. However, alternatives manners of control may be used.
It should be appreciated that the described groupings of components in connection with
In both
In both
Curve 402 represents the current of a variable current source of a second stage of a variable current amplifier. Thus, curve 402 may represent the current of current source 205 of
As previously described in connection with
While
As described previously, an aspect of the present application provides an amplifier with a variable current source which is controlled to adjust the noise of the amplifier during an acquisition period.
In
The amount of power savings may be significant. For example, in the circuit 100, the amplifiers 112a . . . 112n may consume a significant amount of power. In some embodiments, the amplifiers 112a . . . 112n may consume more power than any other components of the circuit 100. Accordingly, reducing the power consumption of the amplifiers 112a . . . 112n may provide a significant reduction in power of the circuit 100. In some embodiments, utilizing variable current amplifiers of the types described herein may provide up to a 25% power reduction, up to a 40% power reduction, up to a 50% power reduction, or any range or value within such ranges, in terms of the operation of the amplifier. The resulting power reduction for the circuit 100 may be up to 10%, up to 20%, up to 25%, or any range or value within such ranges.
Having thus described several aspects and embodiments of the technology of this application, it is to be appreciated that various alterations, modifications, and improvements will readily occur to those of ordinary skill in the art. Such alterations, modifications, and improvements are intended to be within the spirit and scope of the technology described in the application. It is, therefore, to be understood that the foregoing embodiments are presented by way of example only and that, within the scope of the appended claims and equivalents thereto, inventive embodiments may be practiced otherwise than as specifically described.
As an example, certain embodiments described herein have focused on two-stage amplifiers. However, the techniques described herein may apply to multi-stage amplifiers having two or more stages. When more than two stages are used, the first stage may predominantly control the noise of the amplifier, while the last stage may predominantly control the linearity of the amplifier.
As described, some aspects may be embodied as one or more methods. The acts performed as part of the method(s) may be ordered in any suitable way. Accordingly, embodiments may be constructed in which acts are performed in an order different than illustrated, which may include performing some acts simultaneously, even though shown as sequential acts in illustrative embodiments.
All definitions, as defined and used herein, should be understood to control over dictionary definitions, definitions in documents incorporated by reference, and/or ordinary meanings of the defined terms.
The phrase “and/or,” as used herein in the specification and in the claims, should be understood to mean “either or both” of the elements so conjoined, i.e., elements that are conjunctively present in some cases and disjunctively present in other cases.
As used herein in the specification and in the claims, the phrase “at least one,” in reference to a list of one or more elements, should be understood to mean at least one element selected from any one or more of the elements in the list of elements, but not necessarily including at least one of each and every element specifically listed within the list of elements and not excluding any combinations of elements in the list of elements.
As used herein, the term “between” used in a numerical context is to be inclusive unless indicated otherwise. For example, “between A and B” includes A and B unless indicated otherwise.
In the claims, as well as in the specification above, all transitional phrases such as “comprising,” “including,” “carrying,” “having,” “containing,” “involving,” “holding,” “composed of,” and the like are to be understood to be open-ended, i.e., to mean including but not limited to. Only the transitional phrases “consisting of” and “consisting essentially of” shall be closed or semi-closed transitional phrases, respectively.
This Application is a continuation, claiming the benefit under 35 U.S.C. § 120, of U.S. patent application Ser. No. 14/957,395, filed Dec. 2, 2015, and entitled “TRANS-IMPEDANCE AMPLIFIER FOR ULTRASOUND DEVICE AND RELATED APPARATUS AND METHODS,” which is hereby incorporated herein by reference in its entirety.
Number | Name | Date | Kind |
---|---|---|---|
3274821 | Weighart | Sep 1966 | A |
3367173 | Uphoff | Feb 1968 | A |
3787803 | Beebe | Jan 1974 | A |
4098130 | Coffey et al. | Jul 1978 | A |
4504747 | Smith et al. | Mar 1985 | A |
4512350 | Cimilluca | Apr 1985 | A |
4783819 | De Koning et al. | Nov 1988 | A |
4819071 | Nakamura | Apr 1989 | A |
5057719 | Niedra | Oct 1991 | A |
5622177 | Breimesser et al. | Apr 1997 | A |
5844445 | Takeyari | Dec 1998 | A |
6404281 | Kobayashi | Jun 2002 | B1 |
7176720 | Prather et al. | Feb 2007 | B1 |
7256654 | White et al. | Aug 2007 | B2 |
7313053 | Wodnicki | Dec 2007 | B2 |
7449958 | Voo | Nov 2008 | B1 |
7605660 | Kobayashi | Oct 2009 | B1 |
8089309 | Jansen et al. | Jan 2012 | B2 |
8662395 | Melandso et al. | Mar 2014 | B2 |
8766721 | Dusad | Jul 2014 | B1 |
8852103 | Rothberg et al. | Oct 2014 | B2 |
9112521 | Dedic et al. | Aug 2015 | B2 |
9229097 | Rothberg et al. | Jan 2016 | B2 |
9473136 | Chen et al. | Oct 2016 | B1 |
9492144 | Chen et al. | Nov 2016 | B1 |
9705518 | Chen et al. | Jul 2017 | B2 |
9933516 | Chen et al. | Apr 2018 | B2 |
9958537 | Chen et al. | May 2018 | B2 |
10014871 | Chen et al. | Jul 2018 | B2 |
10082488 | Chen et al. | Sep 2018 | B2 |
10175347 | Chen et al. | Jan 2019 | B2 |
10187020 | Chen et al. | Jan 2019 | B2 |
10277236 | Chen et al. | Apr 2019 | B2 |
10624613 | Ralston | Apr 2020 | B2 |
10707886 | Chen et al. | Jul 2020 | B2 |
20050203392 | Petersen et al. | Sep 2005 | A1 |
20050206412 | Moraveji | Sep 2005 | A1 |
20070001764 | Huang et al. | Jan 2007 | A1 |
20070242567 | Daft et al. | Oct 2007 | A1 |
20070287923 | Adkins et al. | Dec 2007 | A1 |
20080225639 | Hongou | Sep 2008 | A1 |
20090140810 | Kim et al. | Jun 2009 | A1 |
20090250729 | Lemmerhirt et al. | Oct 2009 | A1 |
20090289716 | Jaeger et al. | Nov 2009 | A1 |
20100026343 | Yang et al. | Feb 2010 | A1 |
20100152587 | Haider et al. | Jun 2010 | A1 |
20100237807 | Lemmerhirt | Sep 2010 | A1 |
20100317972 | Baumgartner et al. | Dec 2010 | A1 |
20110055447 | Costa | Mar 2011 | A1 |
20120262221 | Bottarel et al. | Oct 2012 | A1 |
20130064043 | Degertekin et al. | Mar 2013 | A1 |
20130106485 | Mukhopadhyay et al. | May 2013 | A1 |
20130187697 | Choy et al. | Jul 2013 | A1 |
20130314154 | Yoshikawa | Nov 2013 | A1 |
20140078866 | Kanamori et al. | Mar 2014 | A1 |
20140288428 | Rothberg et al. | Sep 2014 | A1 |
20150032002 | Rothberg et al. | Jan 2015 | A1 |
20150297193 | Rothberg et al. | Oct 2015 | A1 |
20170160239 | Chen et al. | Jun 2017 | A1 |
20170160387 | Chen et al. | Jun 2017 | A1 |
20170160388 | Chen et al. | Jun 2017 | A1 |
20170163225 | Chen et al. | Jun 2017 | A1 |
20170163276 | Chen et al. | Jun 2017 | A1 |
20170202541 | Ralston | Jul 2017 | A1 |
20170264307 | Chen et al. | Sep 2017 | A1 |
20170307739 | Chen et al. | Oct 2017 | A1 |
20180210073 | Chen et al. | Jul 2018 | A1 |
20180262200 | Chen et al. | Sep 2018 | A1 |
20180364200 | Chen et al. | Dec 2018 | A1 |
20190086525 | Chen et al. | Mar 2019 | A1 |
20190253061 | Chen et al. | Aug 2019 | A1 |
20190336111 | Chen et al. | Nov 2019 | A1 |
20200150252 | Chen et al. | May 2020 | A1 |
Number | Date | Country |
---|---|---|
1832338 | Sep 2006 | CN |
103607130 | Feb 2014 | CN |
1 932 479 | Jun 2008 | EP |
2 726 408 | May 1996 | FR |
04-062494 | Feb 1992 | JP |
H06-085585 | Mar 1994 | JP |
H11-261764 | Sep 1999 | JP |
2002-125969 | May 2002 | JP |
2006-061695 | Mar 2006 | JP |
2008-042521 | Feb 2008 | JP |
2010-022761 | Feb 2010 | JP |
2010-034855 | Feb 2010 | JP |
2010-042146 | Feb 2010 | JP |
2010-167167 | Aug 2010 | JP |
2010-193329 | Sep 2010 | JP |
2012-528685 | Nov 2012 | JP |
2013-247536 | Dec 2013 | JP |
2014-198234 | Oct 2014 | JP |
2014-204195 | Oct 2014 | JP |
2015-033123 | Feb 2015 | JP |
2015-056890 | Mar 2015 | JP |
2006-345481 | Dec 2016 | JP |
10-1024849 | Mar 2011 | KR |
201445554 | Dec 2014 | TW |
Entry |
---|
PCT/US2019/060399, Jan. 29, 2020, International Search Report and Written Opinion. |
EP 16871486.3, Jun. 18, 2019, Extended European Search Report. |
EP 16871492.1, Jul. 18, 2019, Extended European Search Report. |
EP 16871500.1, Jun. 17, 2019, Extended European Search Report. |
EP 16871466.5, May 28, 2019, Extended European Search Report. |
EP 16871463.2, Jun. 4, 2019, Extended European Search Report. |
International Search Report and Written Opinion dated Jan. 29, 2020 for Application No. PCT/US2019/060399. |
Extended European Search Report dated Jun. 18, 2019 in connection with European Application No. 16871486.3. |
Extended European Search Report dated Jul. 18, 2019 in connection with European Application No. 16871492.1. |
Extended European Search Report dated Jun. 17, 2019 in connection with European Application No. 16871500.1. |
Extended European Search Report dated May 28, 2019 in connection with European Application No. 16871466.5. |
Extended European Search Report dated Jun. 4, 2019 in connection with European Application No. 16871463.2. |
Reyes et al., A 2GS/s 6-bit CMOS time-interleaved ADC for analysis of mixed-signal calibration techniques. Analog Integrated Circuits and Signal Processing. Springer New York LLC. Jul. 3, 2015; 85(1):3-16. |
Um et al., An Analog-digital-hybrid single-chip RX beamformer with non-uniform sampling for 2D-CMUT ultrasound imaging to achieve wide dynamic range of delay and small chip area. IEEE International Solid State Circuits Conference. IEEE Service Center. Feb. 9, 2014; pp. 427-7. |
International Search Report and Written Opinion dated Feb. 7, 2017 for Application No. PCT/US2016/064314. |
International Preliminary Report on Patentablility dated Jun. 14, 2018 in connection with International Application No. PCT/US2016/064314. |
Taiwanese Office Action dated Jan. 19, 2018 in connection with Taiwanese Application No. 105139662. |
Agarwal et al., Single-Chip Solution for Ultrasound Imaging Systems: Initial Results. 2007 IEEE Ultrasonics Symposium. Oct. 1, 2007;1563-6. |
Chen et al., Ultrasonic Imaging Front-End Design for CMUT: A 3-Level 30Vpp Pulse-Shaping Pulser with Improved Efficiency and a Noise-Optimized Receiver. IEEE Asian Solid-State Circuits Conference. Nov. 12-14, 2012; 173-6. |
Cheng et al., An Efficient Electrical Addressing Method Using Through-Wafer Vias for Two-Dimensional Ultrasonic Arrays. 2000 IEEE Ultrasonics Symposium. 2000;2:1179-82. |
Cheng et al., CMUT-in-CMOS ultrasonic transducer arrays with on-chip electronics. Transducers 2009. IEEE. Jun. 21, 2009;1222-5. |
Cheng et al., Electrical Through-Wafer Interconnects with Sub-PicoFarad Parasitic Capacitance. 2001 Microelectromechan Syst Conf. Aug. 24, 2001;18-21. |
Daft et al., 5F-3 A Matrix Transducer Design with Improved Image Quality and Acquisition Rate. 2007 IEEE Ultrasonics Symposium. Oct. 1, 2007;411-5. |
Daft et al., Microfabricated Ultrasonic Transducers Monolithically Integrated with High Voltage Electronics. 2004 IEEE Ultrasonics Symposium. Aug. 23, 2004;1:493-6. |
Gurun et al., Front-end CMOS electronics for monolithic integration with CMUT arrays: circuit design and initial experimental results. Proc Ultrason Symp. 2008;390-3. |
Khuri-Yakub et al., Miniaturized Ultrasound Imaging Probes Enabled by CMUT Arrays with Integrated Frontend Electronic Circuits. Conf Proc IEEE Eng Med Biol Soc. 2010;1:5987-90. doi:10.1109/IEMBS.2010.5627580. Epub Dec. 6, 2010. 13 pages. |
Kim et al., Design and Test of A Fully Controllable 64x128 2-D CMUT Array Integrated with Reconfigurable Frontend ASICs for Volumetric Ultrasound Imaging. IEEE. International Ultrasonics Symposium Proceedings. Oct. 7-10, 2012;77-80. doi: 10.1109/ULTSYM.2012.0019. |
Orozco, Programmable-Gain Transimpedance Amplifiers Maximize Dynamic Range in Spectroscopy Systems. Analog Dialogue. May 2013;47(05):1-5. |
Number | Date | Country | |
---|---|---|---|
20190140603 A1 | May 2019 | US |
Number | Date | Country | |
---|---|---|---|
Parent | 14957395 | Dec 2015 | US |
Child | 16178117 | US |