Claims
- 1. Within an apparatus employing a single memory device, a method of effecting a high resolution linearization of an analog input voltage signal having a characteristic profile over a predetermined voltage range, said profile varying from an idealized profile by an error component, said error component equaling the arithmetic difference between the input and idealized profiles at finite points within said range, said method comprising:
- digitizing said input signal;
- addressing predetermined correction quantity data within said single memory device with said digitized input signal, said data comprising a finite number of constants, each constant correlating with an error component;
- outputting said addressed constant as a digital error signal;
- converting said digitized error signal to an equivalent analog error signal;
- arithmetically adding said analog error signal with said input voltage signal in a summing junction; and
- outputting the resultant sum of said analog error and input voltage signals as an approximation of said idealized profile.
- 2. The method of claim 1, further comprising the step of amplifying said analog signal prior to digitization.
Parent Case Info
This application is a continuation of application Ser. No. 783,512, filed Oct. 3, 1985, now abandoned.
US Referenced Citations (4)
Foreign Referenced Citations (5)
Number |
Date |
Country |
2710857 |
Oct 1978 |
DEX |
0042058 |
Apr 1977 |
JPX |
0029762 |
Mar 1980 |
JPX |
0029763 |
Mar 1980 |
JPX |
0029764 |
Mar 1980 |
JPX |
Continuations (1)
|
Number |
Date |
Country |
Parent |
783512 |
Oct 1985 |
|