Patent Application
20060250736
This invention relates generally to a Transient Blocking Unit (TBU) provided with Electrostatic Discharge (ESD) protection and in particular with ESD mechanisms that protect a transient blocking core of the TBU.
Many circuits, networks, electrical devices and data handling systems are operated in configurations and environments where external factors can impair their performance, cause failure or even result in permanent damage. Among the most common of these factors are over-voltage, over-current and over-temperature. Protection against these factors is important and has been addressed in the prior art in a number of ways, depending on the specific electronics and their application.
Protection circuits are specialized depending on conditions and application. For example, in the case of protecting batteries or rechargeable elements from overcharging and over-discharging one can refer to circuit solutions described in U.S. Pat. Nos. 5,789,900; 6,313,610; 6,331,763; 6,518,731; 6,914,416; 6,948,078; 6,958,591 and U.S. Published Application 2001/0021092. Still other protection circuits, e.g., ones associated with power converters for IC circuits and devices that need to control device parameters and electric parameters simultaneously also use these elements. Examples can be found in U.S. Pat. Nos. 5,929,665; 6,768,623; 6,855,988; 6,861,828.
When providing protection for very sensitive circuits, such as those encountered in telecommunications, the performance parameters of the fuses and protection circuits are frequently insufficient. A prior art solution, commonly referred to as a transient blocking unit (TBU), satisfies a number of the constraints and is taught in international publications PCT/AU94/00358; PCT/AU04/00117; PCT/AU03/00175; PCT/AU03/00848 as well as U.S. Pat. Nos. 4,533,970; 5,742,463 and related literature cited in these references.
There are specific instances where a TBU of the type mentioned above requires electrostatic discharge (ESD) protection. Conventional ESD protection uses shunt semiconductor devices such as avalanche diodes and SCR structures to shunt the power generated by the ESD event to equipment ground. To apply this technique in protecting the TBU requires that a ground or earth pin be made available within the TBU. However, the TBU is a series device that has no ground reference. Therefore, the ESD protection mechanism or component must be applied across the TBU, i.e., between TBU input pin and the TBU output pin.
TBU components have high blocking voltages and thus, to work effectively, the ESD protection of the TBU needs to have a rated voltage above the TBU rated blocking voltage but below the TBU maximum voltage that causes irreparable harm to the TBU. This requirement places a large number of constraints on the rating of the TBU. ESD shunt components can be manufactured efficiently with a tolerance of 10% or greater. Therefore, the maximum protection rating that can be applied to the TBU is 100%-10%=90% of the maximum rating of the TBU. This is a significant reduction in the overall blocking rating of the resultant TBU.
In addition, the ESD protection must be made with a high protection voltage. High protection voltages increase exponentially the die size and cost of the ESD device due to a non-linear increase in the power-handling requirement of the die. Clearly, it would be an advance in the art to overcome these limitations affecting ESD protection for the TBU.
In view of the above prior art limitations, it is an object of the invention to provide ESD protection for the TBU that does not negatively affect thee overall blocking rating of the TBU.
It is another object of the invention to provide ESD protection that can be efficiently integrated with the TBU and does not exponentially increase the die size.
These and other objects and advantages of the invention will become apparent from the ensuing description.
The objects and advantages of the invention are addressed by a transient blocking apparatus with electrostatic discharge (ESD) protection. The apparatus has a transient blocking core with an input, an output and at least one depletion mode n-channel device interconnected with at least one depletion mode p-channel device such that a transient alters a bias voltage Vp of the p-channel device and a bias voltage Vn of the n-channel device so that these devices mutually switch off to block the transient. Further, the apparatus has a high-voltage depletion mode device connected before the input or past the output of the transient blocking core. An ESD protection unit is connected between the input and output to protect the transient blocking apparatus.
The apparatus can be uni-directional or bi-directional. In the uni-directional embodiment only one high-voltage depletion mode device is required and the transient blocking core is uni-directional. In a bi-directional embodiment of the apparatus the transient blocking core is bi-directional and the apparatus has an additional high-voltage depletion mode device. Here the high-voltage depletion mode device is connected before the input and the additional high-voltage depletion mode device is connected after the output of the transient blocking core.
It is preferred that the high-voltage depletion mode devices are metal-oxide-semiconductor field effect transistors (MOSFETs). Furthermore, at least one and preferably both of the high-voltage MOSFETs are configured to switch off when the depletion mode devices in the transient blocking core mutually switch off.
Above a certain voltage the ESD protection unit is configured to reduce the voltage across the transient blocking core such that the core, and more specifically the depletion mode devices of the core switch back on and the core becomes conductive. When this happens, the core will bias the high-voltage MOSFETs to switch on as well. Typically, the voltage at which this occurs is the rated voltage of the ESD protection unit dictated by its components. Among other options, the ESD protection unit may comprise a fold-back type semiconductor that has a diac structure to fulfill this functionality. Furthermore, when the ESD protection unit is used to operate in the fold-back mode to create a low impedance shunt it should have a rated voltage lower than the rated voltage of the transient blocking core.
There are many ways in which an apparatus according to the invention can be implemented. For example, the transient blocking core can be uni-directional to block only forward transients, or bi-directional to block both forward and reverse transients (transients of both polarities). In the preferred embodiment, the transient blocking core, the high-voltage depletion mode device or devices and the ESD protection unit are all integrated. In other words, they all reside on the same die.
According to the method of invention, ESD protection is achieved by providing the transient blocking core that has an input, an output and at least one depletion mode n-channel device interconnected with at least one depletion mode p-channel device such that the transient alters the bias voltage Vp of the p-channel device and the bias voltage Vn of the n-channel device, whereby said devices mutually switch off to block the transient. A high-voltage depletion mode device is connected before the input or past the output of the transient blocking core. The ESD protection unit is connected between the input and the output to protect the transient blocking apparatus. The high-voltage device, e.g., MOSFET, is switched off as the devices in the core mutually switch off. In the bi-directional case two high-voltage devices, e.g., MOSFETs are employed before the input and after the output of the transient blocking core and they are preferably both switched off as the devices in the core mutually switch off.
In the preferred embodiment a certain voltage is selected above which the ESD protection unit reduces the voltage across the transient blocking core such that the core switches back on. This biases the high-voltage device to switch on as well and thus render the entire transient blocking apparatus conductive. In the case of a typical ESD protection unit, the certain voltage is the rated voltage of the ESD protection unit or its components. For proper shunting operation above the rated voltage of the ESD protection unit is selected to be lower than the rated voltage of the transient blocking core.
A detailed description of the preferred embodiments of the invention is presented below in reference to the appended drawing figures.
The present invention and its principles will be best understood by first reviewing prior art uni-directional and bi-directional transient blocking units (TBUs) designed for over-voltage and over-current protection. The diagram in
More specifically, devices 14, 16 have corresponding n- and p-channels 15, 17 as well as gate G, source S and drain D terminals. Resistances Rn, Rp of devices 14, 16 are low when voltage differences or bias voltages Vgsn and Vgsp between their gate G and source S terminals are zero. Normally, TBU 10 is unblocked and devices 14, 16 act as small resistors that allow a load current Iload to pass to load 12. Application of negative bias Vgsn to n-channel device 14 and positive bias Vgsp to p-channel device 16 increases resistances Rn, Rp, as indicated by the arrows and turns devices 14, 16 off. The interconnection of devices 14, 16 source-to-source and gate-to-drain reinforces the biasing off process in response to a transient. Specifically, as load current Iload increases device 16 develops a larger voltage drop across it, thus increasing negative bias Vgsn applied to device 14 and consequently increasing resistance Rn. Higher resistance Rn increases positive bias Vgsp on device 16 thereby increasing Rp. Thus, the transient alters bias voltages Vgsn and Vgsp in concert such that devices 14, 16 mutually increase their resistances Rn, Rp and switch off and thus TBU 10 blocks the transient.
The above principle of interconnection of n- and p-channel devices to achieve mutual switch off (sometimes also referred to as mutual pinch-off) is extended to bi-directional TBUs by using two uni-directional TBUs with one configured in reverse to block negative spikes. A simpler, bi-directional TBU 20 that protects load 12 from negative and positive spikes, is shown in
In fact, the prior art teaches a number of variants of TBUs based on the above principles. These include, among other, TBUs that use p-channel devices at inputs, a larger number of n-channel or p-channel devices as well as TBUs that employ high-voltage depletion devices. More detailed information about prior art TBUs and associated applications and methods can be found in published literature including, in particular, PCT/AU94/00358, PCT/AU04/00117; PCT/AU03/00175; PCT/AU03/00848 and U.S. Pat. No. 5,742,463 that are herein incorporated by reference. Additional information about the use of high-voltage depletion devices in TBUs is found in U.S. patent application Ser. No. 11/130,829.
Further, apparatus 100 has a high-voltage depletion mode device 114 connected before input 106 of core 104. ESD protection unit 102 is connected between input 106 and output 108 to protect apparatus 100. It is preferred that high-voltage depletion mode device 114 be a normally on depletion mode MOSFET. Furthermore, high-voltage device 114 is configured to also switch off when the depletion mode devices 110, 112 in core 104 mutually switch off. This is accomplished by interconnecting gate G terminal of high-voltage device 114 between source S terminals of devices 110, 112.
During normal operation, when no forward transient or ESD current are present, apparatus 100 is in the conducting state and thus load current Iload is applied to load 12. Devices 110, 112 and high-voltage device 114 are all in the on state at this time.
We note that high-voltage device 114, especially when it is embodied by a MOSFET, can handle very high ESD currents (drain D to source S). In the off state, however, high-voltage device 114 is quite sensitive to damage by ESD voltages.
Now, during a forward transient core 104 senses it and reacts by blocking it in accordance with the above-described principles. Specifically, p-channel device 112 and n-channel device 110 mutually switch off in response to the forward transient. Because of its interconnection with n-channel and p-channel devices 110, 112, high-voltage device 114 is also biased to switch off as devices 110, 112 mutually switch off. Therefore, apparatus 100 is in the non-conducting or off state and thus blocks the forward transient as intended. In fact, the presence of high-voltage device 114 enhances the blocking capability of apparatus 100 to between 500 and 2,000 Volts—considerably above what core 104 would be able to block by itself.
However, if the forward transient is due to an ESD event that takes on the form of a fast rising over-voltage then high-voltage device 114 could be damaged. In particular, as the ESD voltage goes over the maximum blocking level of apparatus 100, high-voltage device 114 could begin to break down and additional voltage may develop across core 104 to damage it. An artisan skilled in the art will be able to ensure that this outcome (where the additional voltage develops across core 104) will only occur during fast rising ESD events and not during the more manageable slow rising transient events of lightning or power faults.
At this point, ESD protection unit 102 connected between input 106 and output 108 of core 104 comes into play. That is because above a certain voltage, ESD protection unit 102 is configured to reduce the voltage across core 104 such that devices 110, 112 switch back on and core 104 becomes conductive. The appropriate voltage for this to occur is below the rated voltage of core 104. In other words, the rated voltage of ESD protection unit 102 is selected to be lower than the rated voltage of core 104.
Once devices 110 and 112 become unblocked and core 104 switches back on, then core 104 will bias high-voltage device 114 to switch on as well because of the configuration of the connections between devices 110, 112 and 114. This renders entire apparatus 100 conductive once again. Of course, in the on state high-voltage device 114 can handle very large ESD currents.
Meanwhile, core 104 is does not take on the very large ESD current because ESD protection unit 102 is set to divert most of the current thus effectively shunting core 104. This happens above a certain voltage that is typically selected to be the rated voltage of the ESD protection unit 102. Of course, for proper shunting operation the rated voltage of ESD protection unit 102 is selected to be lower than the rated voltage of core 104.
In most applications the transients or ESD events can produce large forward or reverse currents. Therefore, it is preferable that the invention be implemented in a bi-directional apparatus. An exemplary bi-directional transient blocking apparatus 120 with a fold-back type ESD protection unit 122 is shown in
Core 124 has an input 136 and an output 138. A high-voltage depletion mode device 140 is connected before input 136. An additional high-voltage depletion mode device 142 is connected after output 138 of core 124. High-voltage devices 140, 142 are configured or interconnected with core 124 such that they are switched off as devices 126, 128, 130 in core 124 mutually switch off. Preferably, high-voltage devices 136, 138 are MOSFETs.
During operation, high-voltage devices 140, 142 are switched off as devices 126, 128, 130 in core 124 mutually switch off in response to forward or reverse transients. In the event of an ESD event that produces a large over-current of either polarity, ESD protection unit 122 causes devices 126, 128, 130 to switch back on. As a result of the interconnections, high-voltage devices 140, 142 are also switched on from their off state and entire apparatus 120 becomes conductive. Fold back ESD protection unit 122 shunts core 124 to thus protect it from the large over-current. Meanwhile, high-voltage devices 140, 142 are capable of handling the larger over-current since they are on.
In the preferred embodiment, transient blocking core 124, high-voltage depletion mode devices 140, 142 and ESD protection unit 122 are all integrated. In other words, they all reside on the same die. Suitable fold-back protection components for unit 122 include any typical crowbar devices such as thyristor surge suppressors or any other type of fold-back type semiconductor device. In a preferred embodiment unit 122 has a diac structure.
Many other embodiments of the apparatus and method are possible. For example, although in the preferred embodiment described above the apparatus uses on or more high-voltage devices before the input or after the output to its core, the apparatus and method of invention can be practiced when to protect a low voltage rated transient blocking core operating on its own. In such case fold-back of the device is not need and the ESD protection unit can be a clamp type component such as an avalanche diode or MOV. Of course, the ESD protection unit can also be a crowbar device (diac, sidac, fold-back diode). In those embodiments the ESD protection unit simply shunts the over-voltage and thus protects the core from damage. The voltage ratings of the core and the ESD protection unit are chosen in the manner described above to satisfy these requirements.
Still other embodiments may use additional high-voltage circuitry and/or fast response components to speed up the operation of the apparatus to rapidly rising voltage. Given all these additional possibilities, the scope of the invention should be judged by the appended claims and their legal equivalents.
The present application claims priority from provisional U.S. application 60/678,632 filed on 6 May 2005 and U.S. application Ser. No. 11/130,829 filed on May 17, 2005, both of which are herein incorporated in their entirety.
| Number | Date | Country | |
|---|---|---|---|
| 60678632 | May 2005 | US |
